TW202501839A - Semiconductor device - Google Patents
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- H01S5/00—Semiconductor lasers
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- H01S5/32—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures
- H01S5/323—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser
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- H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
- H01S5/22—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
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- H01S5/00—Semiconductor lasers
- H01S5/30—Structure or shape of the active region; Materials used for the active region
- H01S5/32—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures
- H01S5/323—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser
- H01S5/32308—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser emitting light at a wavelength less than 900 nm
- H01S5/32316—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser emitting light at a wavelength less than 900 nm comprising only (Al)GaAs
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- H01S5/00—Semiconductor lasers
- H01S5/30—Structure or shape of the active region; Materials used for the active region
- H01S5/32—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures
- H01S5/323—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser
- H01S5/32308—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser emitting light at a wavelength less than 900 nm
- H01S5/32341—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser emitting light at a wavelength less than 900 nm blue laser based on GaN or GaP
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- H01S5/00—Semiconductor lasers
- H01S5/30—Structure or shape of the active region; Materials used for the active region
- H01S5/32—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures
- H01S5/323—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser
- H01S5/3235—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser emitting light at a wavelength longer than 1000 nm, e.g. InP-based 1300 nm and 1500 nm lasers
- H01S5/32391—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser emitting light at a wavelength longer than 1000 nm, e.g. InP-based 1300 nm and 1500 nm lasers based on In(Ga)(As)P
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- H01S5/00—Semiconductor lasers
- H01S5/30—Structure or shape of the active region; Materials used for the active region
- H01S5/32—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures
- H01S5/327—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIBVI compounds, e.g. ZnCdSe-laser
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Abstract
Description
本發明是有關於一種半導體元件,且特別是有關於一種光電半導體元件。The present invention relates to a semiconductor device, and in particular to a photovoltaic semiconductor device.
半導體元件的用途十分廣泛,相關材料的開發研究也持續進行。舉例來說,包含III族及V族元素的III-V族半導體材料可應用於各種光電半導體元件如發光晶片(例如:發光二極體或雷射二極體)、吸光晶片(光電偵測器或太陽能電池)或不發光晶片(例如:開關或整流器的功率元件),能用於照明、醫療、顯示、通訊、感測、電源系統等領域。隨著科技的發展,現今對於半導體元件仍存在許多技術研發的需求。雖然現有的半導體元件大致上已經符合多種需求,但並非在各方面皆令人滿意,仍需要進一步的改良。Semiconductor components have a wide range of uses, and the development and research of related materials are also ongoing. For example, III-V semiconductor materials containing group III and group V elements can be applied to various optoelectronic semiconductor components such as light-emitting chips (e.g., light-emitting diodes or laser diodes), light-absorbing chips (photodetectors or solar cells) or non-light-emitting chips (e.g., power components of switches or rectifiers), which can be used in lighting, medical, display, communication, sensing, power supply systems and other fields. With the development of technology, there are still many technical research and development needs for semiconductor components. Although existing semiconductor components generally meet various needs, they are not satisfactory in all aspects and still need further improvement.
一種半導體元件包含第一半導體結構,具有第一導電型態且包含第一摻雜、第二摻雜及第三摻雜;第二半導體結構,具有不同於該第一導電型態之第二導電型態;以及活性結構,位於第一半導體結構與第二半導體結構之間;其中,第一摻雜的摻雜濃度小於3.5×10 17atoms/cm 3,第三摻雜的摻雜濃度與第二摻雜的摻雜濃度的比值大於5,第一半導體結構含有鋁。 A semiconductor device comprises a first semiconductor structure having a first conductivity type and including a first doping, a second doping and a third doping; a second semiconductor structure having a second conductivity type different from the first conductivity type; and an active structure located between the first semiconductor structure and the second semiconductor structure; wherein the doping concentration of the first doping is less than 3.5×10 17 atoms/cm 3 , the ratio of the doping concentration of the third doping to the doping concentration of the second doping is greater than 5, and the first semiconductor structure contains aluminum.
為了對本揭露之上述及其他方面有更佳的瞭解,下文特舉實施例,並配合所附圖式詳細說明如下。In order to better understand the above and other aspects of the present disclosure, embodiments are specifically described below with reference to the accompanying drawings.
以下揭露提供了許多的實施例或範例,用於實施所提供的標的物之不同元件。各元件和其配置的具體範例描述如下,以簡化本揭露實施例之說明。當然,這些僅僅是範例,並非用以限定本揭露實施例。舉例而言,敘述中若提及第一元件形成在第二元件之上,可能包含第一和第二元件直接接觸的實施例,也可能包含額外的元件形成在第一和第二元件之間,使得它們不直接接觸的實施例。The following disclosure provides a number of embodiments or examples for implementing different elements of the subject matter provided. Specific examples of each element and its configuration are described below to simplify the description of the disclosed embodiments. Of course, these are merely examples and are not intended to limit the disclosed embodiments. For example, if the description refers to a first element formed on a second element, it may include an embodiment in which the first and second elements are directly in contact, and it may also include an embodiment in which an additional element is formed between the first and second elements so that they are not in direct contact.
再者,其中可能用到與空間相對用詞,例如「在……之下」、「下方」、「較低的」、「上方」、「較高的」等類似用詞,是為了便於描述圖式中一個(些)部件或特徵與另一個(些)部件或特徵之間的關係。空間相對用詞用以包括使用中或操作中的裝置之不同方位,以及圖式中所描述的方位。當裝置被轉向不同方位時(旋轉90度或其他方位),其中所使用的空間相對形容詞也將依轉向後的方位來解釋。Furthermore, spatially relative terms such as "under", "below", "lower", "above", "higher" and the like may be used to facilitate describing the relationship between one component or feature and another component or feature in the drawings. Spatially relative terms are used to include different orientations of the device in use or operation, as well as the orientations described in the drawings. When the device is rotated 90 degrees or in other orientations, the spatially relative adjectives used will also be interpreted based on the rotated orientation.
除非另外定義,在此使用的全部用語(包含技術及科學用語)具有與本揭露所屬技術領域中具通常知識者所理解的相同涵義。應理解的是,這些用語例如在通常使用的字典中定義用語,應被解讀成具有與相關技術及本揭露的背景或上下文一致的意思,而不應以一理想化或過度正式的方式解讀,除非在本揭露實施例有特別定義。Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meanings as those understood by those of ordinary skill in the art to which the present disclosure belongs. It should be understood that these terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning consistent with the background or context of the relevant technology and the present disclosure, and should not be interpreted in an idealized or overly formal manner unless specifically defined in the present disclosure embodiments.
本揭露內容的半導體元件包含的各層組成、摻質(dopant)及缺陷可用任何適合的方式分析而得,例如:二次離子質譜儀(secondary ion mass spectrometer;SIMS)、穿透式電子顯微鏡(transmission electron microscopy;TEM)或是掃描式電子顯微鏡(scanning electron microscope;SEM);各層的厚度也可用任何適合的方式分析而得,例如:穿透式電子顯微鏡或是掃描式電子顯微鏡。The composition, dopant and defects of each layer included in the semiconductor device disclosed herein can be analyzed by any suitable method, such as secondary ion mass spectrometer (SIMS), transmission electron microscopy (TEM) or scanning electron microscope (SEM); the thickness of each layer can also be analyzed by any suitable method, such as transmission electron microscope or scanning electron microscope.
本揭露之半導體元件可包含發光晶片(例如,發光二極體或雷射二極體)、吸光晶片(例如,光電偵測器或太陽能電池)、或者不發光晶片(例如,開關或整流器的功率元件)。雷射二極體可為邊射型雷射二極體(Edge Emitting Laser;EEL)。在下方描述的各種示意圖和例示性實施例中,相似的元件符號用來表示相似的元件。The semiconductor device disclosed herein may include a light-emitting chip (e.g., a light-emitting diode or a laser diode), a light-absorbing chip (e.g., a photodetector or a solar cell), or a non-light-emitting chip (e.g., a power element of a switch or a rectifier). The laser diode may be an edge emitting laser diode (EEL). In the various schematic diagrams and exemplary embodiments described below, similar element symbols are used to represent similar elements.
第1圖為本揭露一實施例之半導體元件10的剖面示意圖。半導體元件10包含一基板100、一半導體疊層110位於基板100上、一上電極102及一下電極104,上電極102位於半導體疊層110上,下電極104位於基板100下方。基板100具有一第一表面100a及一第二表面100b相對於第一表面100a。半導體疊層110包含一第二半導體結構112、一活性結構113及一第一半導體結構111沿著Z軸的方向依序堆疊於第一表面100a上。半導體元件10另選擇性地可包含一第一保護層106覆蓋半導體疊層110且位於上電極102下方、及一第二保護層108位於第一保護層106及上電極102間。FIG. 1 is a cross-sectional schematic diagram of a semiconductor device 10 according to an embodiment of the present disclosure. The semiconductor device 10 comprises a
第2圖為本揭露一實施例之半導體元件10之半導體疊層110的剖面示意圖。半導體疊層110包含第一半導體結構111、第二半導體結構112及活性結構113位於第一半導體結構111及第二半導體結構112之間,第一半導體結構111具有一第一導電型態,第二半導體結構112具有一第二導電型態不同於第一導電型態,例如:第一半導體結構111為p型且第二半導體結構112為n型,或者第一半導體結構111為n型且第二半導體結構112為p型,藉此,第一半導體結構111與第二半導體結構112可分別提供電洞與電子或電子與電洞,以於活性結構113結合且發光。FIG. 2 is a schematic cross-sectional view of a semiconductor stack 110 of a semiconductor device 10 according to an embodiment of the present disclosure. The semiconductor stack 110 includes a
第一半導體結構111含有鋁(Al),且包含一第一摻雜、一第二摻雜及一第三摻雜。第二摻雜的原子量小於第一摻雜的原子量及第三摻雜的原子量,且第三摻雜的原子量大於第一摻雜的原子量。在本實施例中,第一摻雜及第三摻雜可使同一半導體材料具有相異的導電型態,例如:摻雜濃度為1
10
18atoms/cm
3以上的第一摻雜及摻雜濃度為1
10
18atoms/cm
3以上的第三摻雜,可使半導體材料形成n型及p型、或p型及n型。在本實施例中,第三摻雜的濃度大於第二摻雜的濃度,且第二摻雜的濃度大於第一摻雜的濃度;因第一半導體結構111中的第三摻雜的摻雜濃度大於第一摻雜的摻雜濃度,第一半導體結構111的導電型態係由第三摻雜決定,換言之,第三摻雜使第一半導體結構111具有第一導電型態。第三摻雜為在成長第一半導體結構111時為刻意摻雜,第一摻雜與第二摻雜則是在成長第一半導體結構111時為非刻意摻雜,而是長晶過程中,特定元素沉積於磊晶片導致不可避免的摻雜。第三摻雜可以例如是鎂(Mg)或鋅(Zn)等元素。在本實施例中,第一摻雜為碳(C)、第二摻雜為氫(H)、第三摻雜為鎂(Mg)。本實施例中的第一半導體結構111的材料為含有氮及鋁的化合物,例如:氮化鋁鎵(AlGaN)。
The
在一實施例中,可藉由晶體成長溫度、磊晶成長所需氣體的種類、前述氣體的通入時間等製程參數,使得在第一半導體結構111中,第一摻雜的摻雜濃度小於3.5
10
17atoms/cm
3,第三摻雜的摻雜濃度與該第二摻雜的摻雜濃度的比值大於5,例如:5至10,藉此使半導體元件10具有較高的輸出功率。在本實施例中,於第一半導體結構111的第三摻雜的摻雜濃度與該第一摻雜的摻雜濃度的比值為25至100。
In one embodiment, the doping concentration of the first dopant in the
如第1、2圖所示,在本實施例中,第一半導體結構111包含一第一子層111a及一第二子層111b,且第一子層111a較第二子層111b靠近活性結構113。第3圖為本揭露一實施例之半導體元件10的二次離子質譜(SIMS)圖。第一摻雜為碳(C)、第二摻雜為氫(H)、第三摻雜為鎂(Mg)。如第3圖所示,第一半導體結構111的第三摻雜之摻雜濃度與第二摻雜之摻雜濃度的比值約為5.6,第一摻雜的摻雜濃度約為2.8
10
17atoms/cm
3 。第一半導體結構111的第三摻雜之摻雜濃度與第一摻雜之摻雜濃度的比值約為62.5。
As shown in FIGS. 1 and 2, in this embodiment, the
由SIMS圖可觀察到,第一子層111a中的第三摻雜之摻雜濃度小於第二子層111b中的第三摻雜之摻雜濃度,藉此,可以降低第一半導體結構111吸收活性結構113發出之光的程度,進而得到高輸出效率之半導體元件10。於本實施例中,第一子層111a中的第二摻雜之摻雜濃度亦小於第二子層111b中的第二摻雜之摻雜濃度;第一子層111a中的第一摻雜之摻雜濃度與第二子層111b中的第一摻雜之摻雜濃度則大致相同。It can be observed from the SIMS image that the doping concentration of the third doping in the
第二半導體結構112包含第一摻雜、第二摻雜及一第四摻雜,第四摻雜使第二半導體結構112具有第二導電型態。足夠摻雜濃度的第四摻雜及第一摻雜可使同一半導體材料具有相同的導電型態,例如:摻雜濃度為1
10
18atoms/cm
3以上的第一摻雜及摻雜濃度為1
10
18atoms/cm
3以上的第四摻雜,可使半導體材料形成n型或p型。在本實施例中,第二半導體結構112中的第四摻雜的摻雜濃度大於第二摻雜的摻雜濃度,且第四摻雜的摻雜濃度大於第一摻雜的摻雜濃度,第一摻雜的摻雜濃度可以大於或等於第二摻雜的摻雜濃度。第四摻雜為在成長第二半導體結構112時為刻意摻雜,第一摻雜與第二摻雜則是在成長第二半導體結構112時為非刻意摻雜,而是長晶過程中,特定元素沉積於磊晶片導致不可避免的摻雜。第四摻雜可以例如是矽(Si)或碳(C)等元素。在本實施例中,在本實施例中,第一摻雜為碳(C)、第二摻雜為氫(H)、第三摻雜為鎂(Mg)、第四摻雜為矽(Si),第二半導體結構112的材料為含有氮及鋁的化合物,例如:氮化鋁鎵(AlGaN)。
The
如第2圖所示,在本實施例中,半導體疊層110更選擇性地包含一阻擋層114位於第一半導體結構111及活性結構113之間,以及一接觸層115位於第一半導體結構111的第二子層111b上。阻擋層114的能隙(band gap)大於第一半導體結構111的能隙,因此可用以抑制載子(例如:電子、電洞)溢流。在本實施例中,阻擋層114含有鋁。第一半導體結構111的鋁具有一第一原子百分比、阻擋層114的鋁具有一第二原子百分比大於第一原子百分比,藉此使阻擋層114具有較高的能隙,第一原子百分比例如為3%至8%,第二原子百分比例如為10%至25%。上述原子百分比係指在化合物中某一元素於同族元素中的原子數占比,例如:氮化鋁鎵的化學式可表示為Al
XGa
YN,Al及Ga為同族元素,因此X+Y=1,其中,
的原子百分比。在本實施例中,阻擋層114位於第一子層111a與活性結構113之間,阻擋層114包含第三摻雜,阻擋層114中第三摻雜的摻雜濃度大於第一子層111a中第三摻雜的摻雜濃度。阻擋層114中第三摻雜的摻雜濃度小於第二子層111b中第三摻雜的摻雜濃度,如第3圖所示。詳言之,在製程設計中,使阻擋層114中第三摻雜的摻雜濃度大於第一子層111a中第三摻雜的摻雜濃度時,可確保第一子層111a中有足夠之第三摻雜,使第一子層111a能提供適量的載子(例如電子或電洞),以提升半導體元件10之效能。本實施例中的阻擋層114的材料為含有氮及鋁的化合物,且阻擋層114與第一半導體結構111為具有相同元素的化合物,例如:氮化鋁鎵(AlGaN)。
As shown in FIG. 2 , in this embodiment, the semiconductor stack 110 further selectively includes a
在本實施例中,接觸層115也具有第三摻雜,且接觸層115的第三摻雜之摻雜濃度大於第一半導體結構111中的第三摻雜之摻雜濃度,藉此使半導體疊層110與上電極102之間具有較低的接觸電阻。在一實施例中,接觸層115之第三摻雜的摻雜濃度大於1×10
20atoms/cm
3,第一半導體結構111之第三摻雜的摻雜濃度介於5×10
17atoms/cm
3與5×10
19atoms/cm
3之間,然本揭露之實施例並不以此為限。
In this embodiment, the
在本揭露中,摻雜濃度為在厚度方向(如第1圖之Z方向)上的平均摻雜濃度。由於上述各層(例如:第一半導體結構111、第一子層111a、第二子層111b、阻擋層114、接觸層115、第二半導體結構112等)為具有一厚度的層狀結構,可能在同一層的不同厚度位置有不同的摻雜濃度,此摻雜濃度的變動可以是刻意(例如:於磊晶過程中通入不同流量的氣體磊晶源)或是非刻意(例如:於磊晶過程中不可避免的因素)造成。In the present disclosure, the doping concentration is the average doping concentration in the thickness direction (such as the Z direction in FIG. 1). Since the above-mentioned layers (e.g., the
如第2圖所示,半導體疊層110還可以選擇性地包含第一光導層116位於第一半導體結構111及活性結構113之間、及/或第二光導層117位於第二半導體結構112及活性結構113之間。在本實施例中,第一光導層116位於阻擋層114及活性結構113之間。第一光導層116及第二光導層117的折射率小於活性結構113的折射率,故可用以將產生自活性結構113的光限制住。As shown in FIG. 2 , the semiconductor stack 110 may further selectively include a first light-conducting
第一半導體結構111、第二半導體結構112、阻擋層114、接觸層115、第一光導層116及第二光導層117為氮基半導體,如通式In
xAl
yGa
1-x-yN (0≦x, 0≦y, 0≦x+y≦1)所示。活性結構113可以是三五族二元素化合物半導體(例如是砷化鎵(GaAs)、磷化銦(InP)、磷化鎵(GaP)、氮化鎵(GaN))、三五族多元素化合物半導體(例如是砷化鋁鎵(AlGaAs)、氮化銦鎵(InGaN)、氮化鋁鎵(AlGaN)、氮化鋁銦鎵(AlInGaN)、磷砷化鎵(GaAsP)、磷化鋁鎵銦(AlGaInP)、砷化鋁銦鎵(AlInGaAs))或二六族二元素化合物半導體(例如是硒化鎘(CdSe)、硫化鎘(CdS)、硒化鋅(ZnSe))。
The
請參照第1及2圖,為了提高發出光的基礎模態(fundamental mode)與橫向模態(lateral mode)之比例,第一半導體結構111更包含一基部1111及一脊部1112凸出於基部1111。於一實施例中,脊部1112形成的方式係於形成第一半導體結構111之後,再藉由黃光顯影、蝕刻方式去除部分第二子層111b及部分第一子層111a,而未被移除的部分第二子層111b及部分第一子層111a則構成脊部1112。本實施例之半導體元件10為雷射元件,活性結構113具有兩個相對應的端面(圖未示),兩端面構成一共振腔,發自活性結構113的光在兩端面之間來回共振,並產生雷射光。雷射光可以為可見光或非可見光,例如:波長為400 nm至500 nm之藍光。Referring to FIGS. 1 and 2 , in order to increase the ratio of the fundamental mode to the lateral mode of light emission, the
接觸層115置於第一半導體結構111的脊部1111上,上電極102覆蓋於脊部1111且與第一半導體結構111電性連接。第一保護層106用以保護半導體疊層110的側壁,且第一保護層106延伸至覆蓋基部1111的上表面、脊部1112的相對兩個側面、接觸層115的部分上表面、以及基板100的部分第一表面100a。第二保護層108位於第一保護層106及上電極102之間,藉此第二保護層108可以加強阻隔第一半導體結構111及上電極102,避免兩者之間產生電性連接。The
在一些實施例中,基板100例如是矽基板、氮基半導體基板、碳化矽基板、或砷化鎵基板。於一實施例中,基板100可再進行圖形化等加工,例如,基板100可為圖形化加工而形成一粗糙表面,但並不以此為限。詳言之,本實施例之基板100的第一表面100a及第二表面100b具有不同的粗糙度,第二表面100b具有一粗化結構且粗糙度大於第一表面100a,基板100以第一表面100a與半導體疊層110互相連接、並以第二表面100b與下電極104連接。粗化結構可以增加基板100及下電極104之間的附著性。在一實施例中,基板100包含氮之半導體材料,例如是氮化鎵(GaN)或其他合適的材料。基板100之上表面100a包含(0001)面、(000-1)面、(10-10)面、(11-20)面、(10-14)面、(10-15)面、(11-24)面,優選地使用(0001)面作為半導體疊層110的磊晶成長面。基板100的厚度可介於50 μm~500 μm之間。In some embodiments, the
此外,一透明導電層(圖未示)可選擇性地位於接觸層115上,以將電流更均勻地散布於半導體元件10中。透明導電層覆蓋部分的第一保護層106。透明導電層的材料可以為氧化銦錫(ITO)、氧化銦(InO)、氧化錫(SnO)、氧化鎘錫(CTO)、氧化銻錫(ATO)、氧化鋁鋅(AZO)、氧化鋅錫(ZTO)、氧化鎵鋅(GZO)、氧化鋅(ZnO)、氧化銦鈰(ICO)、氧化銦鎢(IWO)、氧化銦鈦(ITiO)、氧化銦鋅(IZO)、氧化銦鎵(IGO)、氧化鎵鋁鋅(GAZO)或上述材料之組合、或者為透明金屬層(例如厚度小於500埃之鋁、鎳、金)。In addition, a transparent conductive layer (not shown) may be selectively disposed on the
在一些實施例中,上電極102的材料可包括鉻(Cr)、鋁(Al)、鈀(Pd)、鉑(Pt)、鎳(Ni)、金(Au)、鈦(Ti)、鎢(W)、上述之任意組合或其他合適的導電材料。下電極104的材料可包括鈀(Pd)、鉻(Cr)、鈦(Ti)、鋁(Al)、金(Au)、鉑(Pt)、上述之任意組合或其他合適的導電材料,亦可為多種導電材料所形成的複合材料。In some embodiments, the material of the upper electrode 102 may include chromium (Cr), aluminum (Al), palladium (Pd), platinum (Pt), nickel (Ni), gold (Au), titanium (Ti), tungsten (W), any combination thereof, or other suitable conductive materials. The material of the lower electrode 104 may include palladium (Pd), chromium (Cr), titanium (Ti), aluminum (Al), gold (Au), platinum (Pt), any combination thereof, or other suitable conductive materials, and may also be a composite material formed by multiple conductive materials.
第一保護層106及/或第二保護層108包含矽(Si)、鋯(Zr)、鋁(Al)、或鉭(Ta)的氧化物、氮化物、氮氧化物、或包含前述材料的單層或前述材料之任兩種以上的多層。第一保護層106及/或第二保護層108的厚度沒有特別限定,只要可降低或阻止外部注入之電流直接由上電極102流向半導體疊層110、及對半導體疊層110達到保護作用的厚度即可。The first protective layer 106 and/or the second protective layer 108 include oxides, nitrides, oxynitrides of silicon (Si), zirconium (Zr), aluminum (Al), or tantalum (Ta), or a single layer of the aforementioned materials or a multilayer of any two or more of the aforementioned materials. The thickness of the first protective layer 106 and/or the second protective layer 108 is not particularly limited, as long as the thickness can reduce or prevent the externally injected current from directly flowing from the upper electrode 102 to the semiconductor stack 110 and achieve a protective effect on the semiconductor stack 110.
第4圖為本揭露一實施例之雷射二極體裝置2的剖面示意圖。雷射二極體裝置2包括一散熱座21、第一接腳22a及第二接腳22b、一固定座23、一次固定座231、一雷射二極體晶片24以及一金屬封蓋27。第一接腳22a及第二接腳22b設置於散熱座21的背面。固定座23係凸出地設置在散熱座21的表面,並與接地(GND)之第二接腳22b連接。次固定座231設置於固定座23的內側,並提供雷射二極體晶片24接合。金屬封蓋27更包括設置於其頂面的玻璃窗271,金屬封蓋27的底緣則接合於散熱座21上方。其中,雷射二極體晶片24可包括根據本揭露一實施例之半導體元件10,然本揭露並不以此為限。FIG. 4 is a cross-sectional schematic diagram of a
綜上所述,雖然已以實施例揭露如上,然其並非用以限定本揭露。本揭露所屬技術領域中具有通常知識者,在不脫離本揭露之精神和範圍內,當可作各種之更動與潤飾。因此,本揭露之保護範圍當視後附之申請專利範圍所界定者為準。In summary, although the embodiments have been disclosed above, they are not intended to limit the present disclosure. Those with ordinary knowledge in the technical field to which the present disclosure belongs can make various changes and modifications without departing from the spirit and scope of the present disclosure. Therefore, the protection scope of the present disclosure shall be determined by the scope of the attached patent application.
10:半導體元件
100:基板
100a:第一表面
100b:第二表面
102:上電極
104:下電極
106:第一保護層
108:第二保護層
110:半導體疊層
111:第一半導體結構
111a:第一子層
111b:第二子層
1111:基部
1112:脊部
112:第二半導體結構
113:活性結構
114:阻擋層
115:接觸層
116:第一光導層
117:第二光導層
2:雷射二極體裝置
21:散熱座
22a:第一接腳
22b:第二接腳
23:固定座
231:次固定座
24:雷射二極體晶片
27:金屬封蓋
271:玻璃窗
10: semiconductor element
100: substrate
100a: first surface
100b: second surface
102: upper electrode
104: lower electrode
106: first protective layer
108: second protective layer
110: semiconductor stack
111:
第1圖為本揭露一實施例之半導體元件的剖面示意圖。FIG. 1 is a schematic cross-sectional view of a semiconductor device according to an embodiment of the present disclosure.
第2圖為本揭露一實施例之半導體元件之半導體疊層的剖面示意圖。FIG. 2 is a schematic cross-sectional view of a semiconductor stack of a semiconductor device according to an embodiment of the present disclosure.
第3圖為本揭露一實施例之半導體元件的二次離子質譜(SIMS)圖。FIG. 3 is a secondary ion mass spectrum (SIMS) diagram of a semiconductor device according to an embodiment of the present disclosure.
第4圖為本揭露一實施例之雷射二極體裝置的剖面示意圖。FIG. 4 is a cross-sectional view of a laser diode device according to an embodiment of the present disclosure.
10:半導體元件 10: Semiconductor components
100:基板 100: Substrate
100a:第一表面 100a: first surface
100b:第二表面 100b: Second surface
102:上電極 102: Upper electrode
104:下電極 104: Lower electrode
106:第一保護層 106: First protective layer
108:第二保護層 108: Second protective layer
110:半導體疊層 110: Semiconductor stacking
111:第一半導體結構 111: First semiconductor structure
111a:第一子層 111a: First sublayer
111b:第二子層 111b: Second sublayer
1111:基部 1111: Base
1112:脊部 1112: Spine
112:第二半導體結構 112: Second semiconductor structure
113:活性結構 113: Active structure
Claims (10)
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