TW202435405A - Method of manufacturing electronic device - Google Patents

Abstract

An electronic device includes a designation substrate, a semiconductor array with plural semiconductor structures, a conductor array with plural conductor members, and a connection layer. The semiconductor structures of the semiconductor array are arranged on the designation substrate. The conductors of the conductor array correspond to the semiconductor structures of the semiconductor array for electrically connecting the semiconductor structures to the designation substrate. The conductors are independent and individual from each other. Each of the conductors is formed of integrity by eutectic bonding between a contact pad of the designation substrate and an electrode of a corresponding one of the semiconductor structures. The connection layer, which excludes conductive materials, joins the semiconductor structures to the designation substrate; and contacts a peripheral surface of each conductor for accommodating the conductors therewith.

Description

Method for manufacturing electronic device

The present invention relates to an electronic device, and an electronic device with eutectic bonding of micro-semiconductor structures and a manufacturing method thereof.

In the process of manufacturing optoelectronic devices, traditional LEDs (side length greater than 150 microns) are made by epitaxy, photolithography, metallization, etching and other processes, and then cut into individual LED grains, and the electrodes of the LEDs are electrically connected to the circuit substrate by wire bonding or eutectic bonding. However, for micro-LEDs, due to their very small size (for example, only 25 microns or less), it is impossible to use traditional wire bonding or eutectic bonding equipment to electrically connect the electrodes.

Therefore, the industry is in urgent need of a corresponding method for electrically connecting micro-LEDs or micro-semiconductor structures of micron size or smaller.

The present invention provides an electronic device and a manufacturing method thereof, which can be widely applied to electronic devices with different micro-semiconductor structures.

The present invention provides an electronic device and a manufacturing method thereof, which can solve the electrical connection requirements of micro-semiconductor structures of micron size or smaller.

The present invention provides an electronic device and a manufacturing method thereof, which not only provides electrical connection for micro-semiconductor structures of micron size or smaller, but also reduces the cost.

The present invention provides an electronic device including: a target substrate, an array micro-semiconductor structure, an array bonding member, and a bonding layer. The array micro-semiconductor structure is arranged on the target substrate. The array bonding member corresponds to the array micro-semiconductor structure and electrically connects the array micro-semiconductor structure to the pattern circuit of the target substrate; the two bonding members are independent of each other; each bonding member is an integral component formed by a conductive pad arranged on the target substrate and a conductive electrode arranged on each micro-semiconductor structure through eutectic bonding; each bonding member is defined by a first end connected to each micro-semiconductor structure, a second end connected to the target substrate, and a peripheral portion connected to the first end and the second end. The bonding layer connects each micro-semiconductor structure to the target substrate; wherein the bonding layer does not have a conductive material; the periphery of each bonding element is just contacted and covered by the bonding layer, and the bonding layer forms a same-layer relationship with the array bonding elements.

In one embodiment, each of the bonding members is eutectic bonded with an indium-gold alloy system.

In one embodiment, each of the bonding members is a eutectic bond of an Indium-Ni alloy system.

In one embodiment, the polymer material of the bonding layer includes epoxy resin or acrylic resin.

In one embodiment, the curing temperature of the polymer material of the bonding layer is 170-220°C.

In one embodiment, the glass transition temperature of the polymer material of the bonding layer is greater than 240°C.

The present invention provides a method for manufacturing an electronic device, comprising: coating a polymer material to a predetermined thickness on a target substrate having a conductive pad; picking up an array micro-semiconductor structure having a conductive electrode from the polymer material coated on the target substrate; and eutectic bonding the conductive electrode and the conductive pad corresponding to each other.

The conductive pad includes a first metal, and the polymer material does not have conductive particles; the polymer material defines a viscosity-temperature variation characteristic: it has a first viscosity at a first temperature, a second viscosity at a second temperature, a third viscosity at a third temperature, a fourth viscosity at a fourth temperature, and a fifth viscosity at a fifth temperature; the first temperature to the fifth temperature increase in an orderly manner, the first temperature is a room temperature, and the fifth temperature is a glass transition temperature; the third and fifth viscosities are respectively limit values, the third viscosity is a minimum value, and the fifth viscosity is a maximum value; the second viscosity is adjacent to the third viscosity.

The conductive electrode comprising a second metal is disposed on each of the micro-semiconductor structures, and the conductive electrode disposed on each of the micro-semiconductor structures corresponds to the conductive pad disposed on the target substrate; wherein a eutectic temperature is defined between the first and second metals, and the eutectic temperature is between the third and fourth temperatures.

The method includes heating the array-type micro-semiconductor structures, the polymer material, and the target substrate from the first temperature to the fourth temperature, and sequentially performing the following steps:

Starting from the second temperature, the array-type micro-semiconductor structures and the target substrate are brought into close proximity with each other with a first pressure: the first pressure is applied to the array-type micro-semiconductor structures and/or the target substrate; and

Starting from the eutectic temperature, the array-type micro-semiconductor structures and the target substrate are pressed against each other with a second pressure: the second pressure is applied to the array-type micro-semiconductor structures and/or the target substrate, so that the conductive pad having the first metal and the conductive electrode having the second metal are mutually melted and a eutectic bond is generated through pressing.

In one embodiment, in the step of coating the polymer material to the predetermined thickness on the target substrate: the second temperature is 10° C. lower than the third temperature.

In one embodiment, in the step of coating the polymer material to the predetermined thickness on the target substrate: the fourth temperature is 90-100° C. higher than the third temperature.

In one embodiment, in the step of coating the polymer material to the predetermined thickness on the target substrate: the fourth temperature is 10-40° C. higher than the eutectic temperature.

In one embodiment, the first metal and the second metal are indium and gold, respectively.

In one embodiment, the first metal and the second metal are indium and nickel respectively.

In one embodiment, in the step of coating the polymer material to the predetermined thickness on the target substrate: the eutectic temperature is 160°C.

In one embodiment, in the step of coating the polymer material to the predetermined thickness on the target substrate, the polymer material includes epoxy resin or acrylic resin.

In one embodiment, in the step of coating the polymer material to the predetermined thickness on the target substrate: the fifth temperature (glass transition temperature) is greater than 240°C.

In one embodiment, in the step of coating the polymer material to the prepared thickness on the target substrate: the prepared thickness is 2-7 μm.

In one embodiment, in the step of coating the polymer material to the predetermined thickness on the target substrate: the second temperature is 70-110°C.

In one embodiment, in the step of coating the polymer material to the predetermined thickness on the target substrate: the second temperature is 90°C.

In one embodiment, in the step of coating the polymer material to the predetermined thickness on the target substrate: the third temperature is 80-120°C.

In one embodiment, in the step of coating the polymer material to the predetermined thickness on the target substrate: the fourth temperature is 170-220°C.

In one embodiment, in the eutectic bonding step: the first pressure is between 1-10 MPa and lasts for 2-40 seconds.

In one embodiment, during the eutectic bonding step: the second pressure is between 0.5 MPa and 50 MPa and lasts for 5-60 seconds.

The electronic device and the manufacturing method thereof according to the preferred embodiment of the present invention will be described below with reference to the relevant drawings, wherein the same components will be described with the same reference symbols.

The present invention includes "electronic devices" having arrayed "semiconductor elements", such as (but not limited to) display panels, advertising billboards, sensing devices, semiconductor devices or lighting devices. The "micro" semiconductor structures and "micro" semiconductor devices used are used synonymously and generally refer to micro-scale semiconductor elements. "Semiconductor structures" include (but are not limited to) high-quality single-crystal semiconductors and polycrystalline semiconductors, semiconductor materials manufactured by high temperature treatment, doped semiconductor materials, organic and inorganic semiconductors, and combined semiconductor materials and structures with one or more additional semiconductor components or non-semiconductor components (such as dielectric layers or materials, or conductive layers or materials). In addition, semiconductor structures such as (but not limited to) transistors, photovoltaic devices including solar cells, diodes, light-emitting diodes, energy beams, p~n junctions, photodiodes, integrated circuits and sensors, and components using the aforementioned devices.

As used herein, "target substrate" refers to a non-native substrate for receiving a micro-semiconductor structure. Examples of materials for the native substrate or non-native substrate include, but are not limited to, polymers, plastics, resins, polyimide, polyethylene naphthalate, polyethylene terephthalate, metal, metal foil, glass, quartz, glass fiber, flexible glass, semiconductors, sapphire, metal-glass fiber composites, metal-ceramic composites, etc.

As used herein, "picking up" refers to picking up at least a portion of at least one row of micro-semiconductor structures, the quantity and range of which depend on the design requirements of the target substrate.

The term "array" used herein refers to an array that can be arranged in a straight line, a horizontal row, a matrix of rows and columns, or a polygonal or irregular shape according to needs, without limitation.

Please refer to FIG. 1 for a schematic diagram of an embodiment of the electronic device 10 of the present invention. The electronic device 10 includes: a target substrate 100, an arrayed micro-semiconductor structure 200, an arrayed bonding member 300, and a bonding layer 400. Please also refer to FIG. 3A , the target substrate 100 includes a plate 110, on which a pattern circuit (not shown) designed according to the requirements of the electronic device 10 is disposed, and the pattern circuit has a plurality of conductive pads. Referring again to FIG. 1 , the arrayed micro-semiconductor structure 200 is disposed on the target substrate 100 and corresponds to the pattern circuit of the target substrate 100. Each micro-semiconductor structure 200 includes a body 210. The arrayed bonding member 300 corresponds to the arrayed micro-semiconductor structure 200 and electrically connects the arrayed micro-semiconductor structure 200 to the pattern circuit of the target substrate 100. The two bonding members 300 are independent of each other. Please also refer to FIG. 3E , each bonding member 300 is an integral component composed of a conductive pad disposed on the target substrate 100 and a conductive electrode disposed on each micro-semiconductor structure 200, which correspond to each other and are bonded by eutectic bonding. As shown in FIG1A , each bonding member 300 is defined to have a first end 310 connected to each micro-semiconductor structure 200, a second end 320 connected to the target substrate 100 (or its pattern circuit), and a periphery 330 connecting the first end 310 and the second end 320. The bonding layer 400 connects each micro-semiconductor structure 200 to the target substrate 100; wherein the bonding layer 400 does not have a conductive material, for example, a polymer material without conductive particles; the periphery 330 of each bonding member 300 is just contacted and covered by the bonding layer 400, so that the bonding layer 400 and the aforementioned multiple (array) bonding members 300 form a same-layer relationship. The bonding layer 400 is a polymer material that is cured after a specific process (see FIG. 3D to FIG. 3E ), and is similar to each bonding member 300 , and can provide a connection between each micro-semiconductor structure 200 (body 210 ) and the target substrate 100 (or its pattern circuit).

Please refer to FIG. 2 and FIG. 3A to FIG. 3E , which are a flow chart and a schematic diagram of one embodiment of a method for manufacturing the electronic device 100 of the present invention.

As shown in FIG. 2A , the manufacturing method of the electronic device of the present invention includes the following steps S10, S20, and S30:

Step S10: As shown in FIG3B , a polymer material 400a is coated to a predetermined thickness h1 on the target substrate 100. Referring to FIG3A , the target substrate 100 includes a plate 110, a pattern circuit disposed on the plate 110, and a conductive pad 120 having a first metal disposed on the pattern circuit.

The polymer material 400a is a curable material without conductive particles, such as (but not limited to) epoxy or acrylic. The polymer material 400a without conductive particles is different from the traditional anisotropic conductive film (ACF), and does not need conductive particles/conductive balls dispersed in the glue and accounting for a very high cost. In combination with the following steps, it can be widely used in different electronic devices with micro-semiconductor structures, and obviously has the advantage of low cost.

In which, referring to FIG. 4A , the polymer material 400a defines a viscosity-temperature variation characteristic: a first viscosity V1 at a first temperature T1, a second viscosity V2 at a second temperature T2, a third viscosity V3 at a third temperature T3, a fourth viscosity V4 at a fourth temperature T4, and a fifth viscosity V5 at a fifth temperature T5. As shown in FIG. 4A , the first temperature T1 to the fifth temperature T5 increase in an orderly manner, and the first temperature T1 is a normal temperature, usually between 25° C. and 30° C. The temperature at which the polymer material solidifies can be traced back to the third temperature T3 at the earliest, and the fifth temperature T5 is a glass transition temperature of the polymer material 400a; the third viscosity V3 and the fifth viscosity V5 are respectively limit values, as shown in FIG4A , the third viscosity V3 is a minimum value, and the fifth viscosity V5 is a maximum value; the second temperature T2 is one of the working temperatures selected by the present invention, so that the second viscosity V2 is close to the third viscosity V3; the fourth temperature T4 is another working temperature selected by the present invention, which is between the third temperature T3 and the fifth temperature T5, so that the fourth viscosity V4 is between the third viscosity V3 and the fifth viscosity V5.

The prepared thickness h1 may be selected from a thickness range of 2 to 7 micrometers (μm), such as 2μm, 3μm, 5μm, 6μm, 6.5μm, or 7μm, depending on the selected polymer material and the viscosity-temperature variation characteristics as shown in FIG. 4A .

Please note that since the polymer material 400a has different viscosities at different temperatures, although they are essentially the same material, the bonding between the polymers at each stage is different. In FIG. 3A to FIG. 3E , the polymer material 400a is a polymer material bonded at room temperature, the polymer material 400b is a polymer material bonded at the second temperature T2, and the polymer material 400c is a polymer material bonded at the fourth temperature T4. Finally, the polymer material bonded stably after curing forms the bonding layer 400 shown in FIG. 1 ; wherein the bonding layer 400 can be manufactured according to the manufacturing method shown in the present invention or an equivalent manufacturing method.

In this embodiment, the conductive pad 120 is illustrated as a pair, which is used in conjunction with the dual-electrode element disclosed below, but is not limited to a pair of conductive pads 120. In this embodiment, the polymer material 400a is illustrated as covering the conductive pad 120, but is not limited to covering the conductive pad 120.

Step S20: As shown in FIG. 3C , the polymer material 400 a coated on the target substrate 100 contacts a starting substrate (not shown), and a part or all of the arrayed micro-semiconductor structure 200 is picked up from the starting substrate.

In this embodiment, the starting substrate may be a native substrate or a non-native substrate, and the number of arrayed micro-semiconductor structures 200 picked up from the starting substrate may account for part or all of the starting substrate; the picked-up number ratio is not considered by the present invention.

Each microsemiconductor structure 200 includes not only a body 210 but also a conductive electrode 220 having a second metal, and the conductive electrode 220 is disposed on the body 210. The microsemiconductor structure 200 in this embodiment is a double-electrode structure, but is not limited to a double-electrode structure.

The conductive electrodes 220 provided in each microsemiconductor structure 200 can correspond one-to-one to the conductive pads 300 provided in the pattern circuit 120. In this embodiment, the conductive electrodes 220 of each microsemiconductor structure 200 and the conductive pads 120 of the target substrate 100 are connected to each other with a polymer material, but this is not limited to it; for example, the body 210 of each microsemiconductor structure 200 and the plate 110 of the target substrate 100 or its pattern circuit are connected to each other with a polymer material, so that the conductive electrodes 220 and the conductive pads 300 correspond one-to-one.

Please note that a eutectic temperature Tm is defined between the first metal of the conductive pad 120 and the second metal of the conductive electrode 220; referring to FIG. 4A , this eutectic temperature Tm varies depending on the selected metal system, and this metal system must also be matched with the aforementioned polymer material so that the eutectic temperature Tm is between the third temperature T3 and the fourth temperature T4 of the polymer material. In this embodiment, the first and second metals are selected from the indium-gold alloy system, that is, the first and second metals include indium and gold, respectively, or the first and second metals are alternately arranged to include gold and indium. In order to make this embodiment easier to understand, a specific ratio of indium and gold can be selected to keep the eutectic temperature Tm at about 160°C; the specific ratio can be selected as an indium-gold ratio of 2:1.

Step S30: eutectic bonding the conductive electrodes 220 and the conductive pads 120 corresponding to each other; wherein the arrayed micro-semiconductor structure 200, the polymer material 400a, and the target substrate 200 are continuously heated from the first temperature T1 to the fourth temperature T4, and the following steps are sequentially performed during the heating process, including step S32 as shown in FIG. 3D and step S34 as shown in FIG. 3E.

Step S32: Referring to FIG. 3D and FIG. 4A at the same time, starting from the second temperature T2, the arrayed micro-semiconductor structure 200 and the target substrate 100 are brought close to each other with a first pressure P1: and it is not limited to applying pressure to the arrayed micro-semiconductor structure 200 alone or to the target substrate 100 alone, or to applying pressure to both at the same time.

In this embodiment, a pressure applying device 500 shown in a virtual diagram is used as an example to apply pressure to the array-type micro-semiconductor structure 200.

As the temperature continues to increase from the first temperature T1, the polymer material 400a with a viscosity V1 becomes a polymer material 400b with a lower viscosity V2 due to the temperature increase to the second temperature T2. The polymer material 400b has freer fluidity. At this time, the micro-semiconductor structure 200 and the target substrate 100 are brought closer to each other. As the temperature continues to increase to the third temperature T3, the polymer material that flows more and more freely between the conductive electrode 220 and the conductive pad 120 has a higher probability of being expelled or even completely expelled.

As can be seen from FIG. 4A , the polymer material at the third temperature T3 has a relatively small viscosity V3, so the polymer material at the third temperature T3 has a relatively high fluidity, which is inferred to be the temperature point at which the polymer material is most easily removed; however, at the third temperature T3, the viscosity of the polymer material immediately reverses from the viscosity V3. The present invention intentionally selects the second temperature T2 before the third temperature T3 to start bringing the conductive electrode 220 and the conductive pad 120 closer to each other, so that the time point for removing the polymer material is advanced, and the time for the polymer material to be removed is thereby extended.

In this step, the time when the first pressure P1 is applied to the two electrodes may last for a first time period. In other words, the first pressure P1 is used to push away the polymer material between the conductive electrode 220 and the conductive pad 120 corresponding to each other, and the first time period is the time length of the push away.

In this step, the first pressure P1 is applied to the conductive electrode 220 and the conductive pad 120 until they are in contact with each other.

Step S34: Referring to FIG. 3E and FIG. 4A simultaneously, starting from the eutectic temperature Tm, the array-type micro-semiconductor structure 200 and the target substrate 100 are pressed against each other with a second pressure P2: since the fourth temperature T4 is higher than the aforementioned eutectic temperature Tm, the second pressure P2 is applied to the array-type micro-semiconductor structure 200 and/or the target substrate 100, so that the conductive pad 120 having the first metal and the conductive electrode 220 having the second metal are mutually melted and a eutectic bond is generated by pressing.

As above, the second pressure P2 in this step can be applied to one of the arrayed micro-semiconductor structure 200 and the target substrate 100 or both.

At this time, the conductive pad 120 with the first metal and the conductive electrode 220 with the second metal are eutectic bonded to form an integral component as shown in FIG. 1A . As the temperature increases, the polymer material 400c continues to solidify to form a bonding layer 400 as shown in FIG. 1 , which is used to connect each micro-semiconductor structure 200 (body 210) and the target substrate 100 (or its pattern circuit).

As can be seen from FIG. 4A , the fourth temperature T4 is the temperature at which the polymer material begins to solidify. The present invention intentionally selects the eutectic temperature Tm between the third temperature T3 and the fourth temperature T4. Before the polymer material solidifies, the conductive electrode 220 and the conductive pad 120 are pressed together to achieve a eutectic bond between the two. While the temperature is increased, the polymer material can be gradually solidified into a bonding layer 400 as shown in FIG. 1 .

In this step, the time for pressing the two together with the second pressure P2 may last for a second time period.

Referring again to FIG. 4A , relative to the indium-gold alloy system selected for the first and second metals and the eutectic temperature Tm achieved therefrom, the polymer material is selected from a system (but not limited to) an epoxy resin system or an acrylic system, so that the fifth temperature T5 (glass transition temperature) is greater than 240° C., or a polymer material is further selected that maintains the fifth temperature T5 (glass transition temperature) at about 260° C. According to step S32, the eutectic temperature Tm is between the third temperature T3 and the fourth temperature T4, and the polymer material between the conductive electrode 220 and the conductive pad 120 is excluded before the viscosity of the polymer material reaches a minimum, that is, the second temperature T2 before the third temperature T3 is selected to exclude the polymer material between the conductive electrode 220 and the conductive pad 120; when the temperature is increased to about the eutectic temperature Tm and not exceeding the fifth temperature T5 (glass transition temperature), pressure is applied to make the conductive electrode 220 and the conductive pad 120 eutectic bond. In other words, as long as the eutectic temperature Tm of the metal system is selected to be between the temperature T3 of the minimum viscosity of the polymer material system and the fourth temperature T4, through the segmented steps S32 and S34 of step S30, it can be achieved as shown in Figure 1 that the bonding member 300 and the bonding layer 400 form a same-layer relationship.

It is worth noting that one way to define the polymer material system is to first select the alloy system of the first and second metals, and then select the polymer material system corresponding to the aforementioned alloy system; or reverse selection. Taking the selected indium-gold alloy system and its eutectic temperature Tm of about 160°C as an example, find out the viscosity-temperature variation characteristics of the polymer material corresponding to Figure 4A, and define the temperature range for each temperature: a polymer material with a fourth temperature T4 between 170-220°C can be selected, or a polymer material with a fourth temperature T4 between 180-200°C can be further selected. A polymer material with a third temperature T3 between 80-120°C can be selected, or a polymer material with a third temperature T3 at 100°C can be further selected. The polymer material whose second temperature T2 is between 70-110°C can be selected, or the polymer material whose second temperature T2 is 90°C can be further selected.

Alternatively, another way to define the polymer material system is to take the selected indium-gold alloy system and its eutectic temperature Tm of about 160°C as an example, find out the viscosity-temperature variation characteristics of the polymer material corresponding to Figure 4A, and prioritize at least one of the following three temperatures: the fourth temperature T4, the third temperature (minimum viscosity) T3, and the eutectic temperature Tm; thereby determining the associated temperature according to the following formula: the fourth temperature T4 is 10-40°C higher than the eutectic temperature Tm; the fourth temperature T4 is 90-100°C higher than the third temperature T3; the second temperature T2 is 10°C lower than the third temperature T3. In FIG. 4B , a real curve C1 is used to represent the viscosity-temperature variation characteristic curve of FIG. 4A , and a virtual curve C2 is used to represent the fourth temperature decreasing from T4 to T4′. The virtual curve C2 is the same or similar to the real curve C1 and can conform to the range defined in this paragraph, while still maintaining the eutectic temperature Tm (about 160°C) between the third temperature T3′ and the fourth temperature T4′; or, allowing the eutectic temperature Tm′ of another eutectic metal system (for example, lower than the eutectic temperature Tm) to be maintained between the third temperature T3′ and the fourth temperature T4′.

In addition, in the eutectic bonding process, the first pressure P1 and its first time period, the second pressure P2 and its second time period can be selected according to the process requirements. For example, the first pressure P1 can be selected to be between 1-10 MPa, and the first time period can be made to last for 2-40 seconds, such as the first pressure P1 can be further selected to be between 1-10 MPa, and the first time period can be made to last for 2, 5, 10, 20, 30, or 40 seconds. For example, the second pressure P2 can be selected to be between 0.5 MPa and 50 MPa, and the second time period can be made to last for 5-60 seconds, such as the second pressure P2 can be further selected to be between 0.5 MPa and 50 MPa, and the second time period can be made to last for 5, 10, 20, 30, 40, 50, or 60 seconds.

It is worth noting that the first metal and the second metal can be selected from the indium-nickel alloy system, that is, the first metal and the second metal respectively include nickel and gold, or one of them and the other. A specific ratio of indium and nickel is selected to keep the eutectic temperature Tm approximately within the range of 150°C-160°C, which can also be applied to C1 of the realization curve of FIG. 4B.

In summary, the electronic device 10 and its manufacturing method of the present invention use a curable polymer material without conductive particles, which does not require conductive particles/conductive balls that have a very high cost. In combination with the manufacturing method of the present invention, it can be widely used in electronic devices with micro-semiconductor structures in different fields. It can not only solve the electrical connection requirements of micro-semiconductor structures of micron size or smaller, but also has a lower manufacturing time and cost.

The above description is for illustrative purposes only and is not intended to be limiting. Any equivalent modifications or changes made to the invention without departing from the spirit and scope of the invention shall be included in the scope of the attached patent application.

10: electronic device 100: target substrate 110: plate 120: conductive pad 200: microsemiconductor structure 210: body 220: conductive electrode 300: bonding member 310: first end 320: second end 330: periphery 400: bonding layer 400a, 400b, 400c: polymer material 500: pressure device h1: prepared thickness T1~T5, T3’, T4’, Tm, Tm’: temperature V1~V5: viscosity C1: actual curve C2: virtual curve S10, S20, S30, S32, S34: steps

FIG1 is a schematic diagram of the electronic device of the present invention; FIG1A is a partial enlarged diagram of FIG1; FIG2 is a schematic diagram of the process of the electronic device manufacturing method of the present invention. FIG3A to FIG3E are schematic diagrams of manufacturing of an embodiment of the electronic device manufacturing method of the present invention corresponding to FIG2; and FIG4A is a viscosity-temperature variation characteristic diagram of the polymer material in the present invention; and FIG4B is another viscosity-temperature variation characteristic diagram corresponding to FIG4A.

10: Electronic devices

100: Target substrate

110: Board

200: Microsemiconductor structure

210:Entity

300:Joint parts

40:Joint layer

Claims (34)

A method for manufacturing an electronic device includes: providing a substrate having a first conductive pad; picking up at least one microsemiconductor unit on the substrate, wherein the at least one microsemiconductor unit has a first conductive electrode; aligning the first conductive pad and the first conductive electrode with each other; eutectic bonding the first conductive pad and the first conductive electrode into an integral component to form a first connector, wherein the first connector electrically connects the at least one microsemiconductor unit to the substrate; forming a bonding layer to cover at least a portion of the at least one microsemiconductor unit, wherein the first connector is located in the bonding layer; wherein a pressure is applied to the at least one microsemiconductor unit while the first conductive pad and the first conductive electrode are eutectic bonded. The manufacturing method of the electronic device as described in item 1 of the patent application scope further includes: aligning a second conductive pad of the substrate and a second conductive electrode of the at least one microsemiconductor unit with each other; and eutectic bonding the second conductive pad and the second conductive electrode into an integral component to form a second connector, wherein the second connector electrically connects the at least one microsemiconductor unit to the substrate, and the second connector is located in the bonding layer. The manufacturing method of the electronic device as described in item 1 of the patent application scope, wherein the bonding layer has a central area and a peripheral area surrounding the central area, the first connector is located in the central area, and the central area and the peripheral area have different heights relative to the substrate. A method for manufacturing an electronic device as described in item 3 of the patent application, wherein the height of the central area relative to the substrate is higher than the height of the peripheral area relative to the substrate. The method for manufacturing an electronic device as described in claim 1, wherein the bonding layer comprises an organic material. The method for manufacturing an electronic device as described in claim 5, wherein the bonding layer comprises an epoxy resin material or an acrylic material The method for manufacturing an electronic device as described in claim 1, wherein the bonding layer comprises a polymer material. A method for manufacturing an electronic device as described in claim 1, wherein the first connector is formed by eutectic bonding of an indium-gold alloy system. A method for manufacturing an electronic device as described in claim 8, wherein the ratio of indium to gold in the indium-gold alloy system is 2:1. A method for manufacturing an electronic device as described in claim 1, wherein the first connector is formed by eutectic bonding of an indium-nickel alloy system. The method for manufacturing an electronic device as described in claim 1, wherein the bonding layer is formed by coating a polymer material on the substrate to a predetermined thickness. A method for manufacturing an electronic device as described in claim 11, wherein the polymer material is non-conductive. A method for manufacturing an electronic device as described in item 11 of the patent application scope, wherein the polymer material defines a viscosity-temperature variation characteristic: having a first viscosity at a first temperature, a second viscosity at a second temperature, a third viscosity at a third temperature, a fourth viscosity at a fourth temperature, and a fifth viscosity at a fifth temperature; wherein the first temperature to the fifth temperature increase in an orderly manner; wherein the first temperature is a room temperature, and the fifth temperature is a glass transition temperature; wherein the third and fifth viscosities are limit values; wherein the third viscosity is a minimum value, and the fifth viscosity is a maximum value; and wherein the second viscosity is adjacent to the third viscosity. A method for manufacturing an electronic device as described in item 13 of the patent application scope, wherein a eutectic temperature is defined between a first metal of the first conductive pad and a second metal of the first conductive electrode, and the eutectic temperature is between the third and fourth temperatures. The manufacturing method of the electronic device as described in item 14 of the patent application scope further includes: starting from the first temperature to the fourth temperature of the at least one microsemiconductor unit, the polymer material, and the substrate; starting from the second temperature, applying a first pressure to the at least one microsemiconductor unit and the substrate by using a pressure-applying device; and starting from the eutectic temperature, applying a second pressure to the at least one microsemiconductor unit and the substrate by using the pressure-applying device, so that the first metal of the first conductive pad and the second metal of the first conductive electrode produce a eutectic bond. A method for manufacturing an electronic device as described in claim 15, wherein, in eutectic bonding, the first pressure is between 1-10 MPa and lasts for 2-40 seconds. A method for manufacturing an electronic device as described in claim 15, wherein, in eutectic bonding, the second pressure is between 0.5 MPa and 50 MPa and lasts for 5-60 seconds. The method for manufacturing an electronic device as described in claim 14, wherein in the step of forming the bonding layer by coating the polymer material on the substrate to the predetermined thickness, the fourth temperature is 10-40° C. higher than the eutectic temperature. The method for manufacturing an electronic device as described in claim 14, wherein in the step of forming the bonding layer by coating the polymer material on the substrate to the prepared thickness, the eutectic temperature is between 150°C and 160°C. The method for manufacturing an electronic device as described in claim 19, wherein in the step of forming the bonding layer by coating the polymer material on the substrate to the predetermined thickness, the eutectic temperature is 160°C. The method for manufacturing an electronic device as described in claim 13, wherein in the step of forming the bonding layer by coating the polymer material on the substrate to the predetermined thickness, the second temperature is 10° C. lower than the third temperature. The method for manufacturing an electronic device as described in claim 13, wherein in the step of forming the bonding layer by coating the polymer material on the substrate to the predetermined thickness, the fourth temperature is 90-100° C. higher than the third temperature. The method for manufacturing an electronic device as described in claim 13, wherein in the step of forming the bonding layer by coating the polymer material on the substrate to the predetermined thickness, the fifth temperature is greater than 240°C. In the method for manufacturing an electronic device as described in claim 13, in the step of forming the bonding layer by coating the polymer material on the substrate to the predetermined thickness, the second temperature is 70-110°C. In the method for manufacturing an electronic device as described in claim 13, in the step of forming the bonding layer by coating the polymer material on the substrate to the predetermined thickness, the second temperature is 90°C. In the method for manufacturing an electronic device as described in claim 13, in the step of forming the bonding layer by coating the polymer material on the substrate to the predetermined thickness, the third temperature is 80-120°C. In the method for manufacturing an electronic device as described in claim 13, in the step of forming the bonding layer by coating the polymer material on the substrate to the predetermined thickness, the fourth temperature is 170-220°C. The method for manufacturing an electronic device as described in claim 13, wherein in the step of forming the bonding layer by coating the polymer material on the substrate to the prepared thickness, the prepared thickness is 2-7 μm. A method for manufacturing an electronic device as described in item 28 of the patent application scope, wherein in the step of forming the bonding layer by coating the polymer material on the substrate to the prepared thickness, the prepared thickness is 2, 3, 5, 6, 6.5 or 7 μm. The method for manufacturing an electronic device as described in claim 11, wherein the bonding layer is formed by curing the polymer material to achieve stable bonding between multiple polymer molecules of the polymer material. A method for manufacturing an electronic device as described in item 1 of the patent application, wherein the material of the substrate includes at least one of a polymer, a plastic, a resin, a polyimide, a polyethylene naphthalate, a polyethylene terephthalate, a metal, a metal foil, a glass, a quartz, a glass fiber, a flexible glass, a semiconductor, a sapphire, a metal-glass fiber composite board, and a metal-ceramic composite board. A method for manufacturing an electronic device as described in item 1 of the patent application scope, wherein the size of at least one microsemiconductor unit is 25 microns or less. A method for manufacturing an electronic device as described in item 1 of the patent application, wherein the at least one microsemiconductor unit includes at least one of a transistor, a photovoltaic device, a solar cell, a diode, a light-emitting diode, an energy beam, a p~n junction, a photodiode, an integrated circuit and a sensor. A method for manufacturing an electronic device includes: providing a substrate having a first conductive pad; picking up at least one microsemiconductor unit on the substrate, wherein the at least one microsemiconductor unit has a first conductive electrode; eutectic bonding the first conductive pad and the first conductive electrode into an integral component to form a first connector, wherein the first connector electrically connects the at least one microsemiconductor unit to the substrate; and forming a bonding layer to cover at least a portion of the at least one microsemiconductor unit, wherein the first connector is located in the bonding layer.