TW202425469A

TW202425469A - Electric circuit protection device

Info

Publication number: TW202425469A
Application number: TW111145797A
Authority: TW
Inventors: 盧昭正
Original assignee: 盧昭正
Priority date: 2022-11-30
Filing date: 2022-11-30
Publication date: 2024-06-16

Abstract

The electric circuit protection device of the invention comprises a first semiconductor, a second semiconductor, a third semiconductor, a first resistor, a second resistor and a third resistor, constituting an application circuit with load overload or short circuit protection function of a DC load, which avoids the damage caused by overload or short circuit at both terminals of the load.

Description

Circuit protection device

本發明電路保護裝置，具有在直流電路應用過程中負載兩端發生過載或短路之保護功能及其包括有第一半導體、第二半導體、第三半導體、第一電阻器、第二電阻器與第三電阻器之電子技術領域。 The circuit protection device of the present invention has the function of protecting the load from overload or short circuit at both ends during the application of the DC circuit and the electronic technology field including the first semiconductor, the second semiconductor, the third semiconductor, the first resistor, the second resistor and the third resistor.

如圖1所示，為習知「電池放電保護裝置」之實施例，台灣專利證書發明第I583089號，其發明人同本發明專利申請人，其負載200短路保護之動作原理為： As shown in Figure 1, an example of the known "battery discharge protection device" is provided in Taiwan Patent Certificate No. I583089, whose inventor is the same as the applicant of the present invention. The operating principle of the load 200 short-circuit protection is:

當電池11對負載200執行放電動作中發生負載200短路時，第二半導體14之基極B之電位為電路正電位，因此第二半導體14之基極B之電位高於射極E而使第二半導體14導通，此時第一半導體12之閘極G與源極S之電位相等，因此第一半導體12開路，此時第一半導體12之汲極電流中止，以保護電池11因發生負載200短路而造成電池11之損壞，若欲解除第二半導體14之導通狀態只需將短路原因去除，即可解除第二半導體14之導通狀態，而恢復第一半導體12之正常狀態，其缺點如下： When the load 200 is short-circuited during the discharge operation of the battery 11, the potential of the base B of the second semiconductor 14 is the positive potential of the circuit, so the potential of the base B of the second semiconductor 14 is higher than the emitter E, making the second semiconductor 14 conductive. At this time, the potential of the gate G and the source S of the first semiconductor 12 are equal, so the first semiconductor 12 is open-circuited. At this time, the drain current of the first semiconductor 12 is stopped to protect the battery 11 from damage caused by the short circuit of the load 200. If you want to release the conductive state of the second semiconductor 14, you only need to remove the cause of the short circuit to release the conductive state of the second semiconductor 14 and restore the normal state of the first semiconductor 12. Its disadvantages are as follows:

1.將負載200兩端造成短路的原因解除後，要設一個開關將負載200開路(Off)，再將所設之開關導通(On)電池11才能再供電於負載200，因此造成增加裝置成本及應用上之不便。 1. After the cause of the short circuit at both ends of the load 200 is eliminated, a switch must be set to open the circuit (Off) of the load 200, and then the switch is turned on (On) so that the battery 11 can supply power to the load 200 again, thereby increasing the device cost and causing inconvenience in application.

2.若要恢復正常之電路功能，將負載200兩端造成短路之原因解除後，再重新將電池11送電，也要增加一個開關，造成增加裝置成本與應用上之不便。 2. To restore normal circuit function, the cause of the short circuit at both ends of the load 200 must be eliminated, and then the battery 11 must be powered again. This also requires an additional switch, which increases the device cost and causes inconvenience in application.

本發明之目的： The purpose of this invention is:

本發明應用第一半導體、第二半導體、第三半導體、第一電阻器、第二電阻器與第三電阻器，達到能在直流電路供電中發生負載過載或短路時直流電源得到保護。 The present invention uses a first semiconductor, a second semiconductor, a third semiconductor, a first resistor, a second resistor and a third resistor to protect the DC power supply when a load overload or short circuit occurs in the DC circuit power supply.

當負載發生短路時，本發明應用第二半導體能在極短之時間內執行第一半導體開路動作，達到保護直流電源電路之功能與避免因負載短路而引起之各種災害。 When a load short circuit occurs, the second semiconductor of the present invention can perform the first semiconductor open circuit action in a very short time, thereby achieving the function of protecting the DC power supply circuit and avoiding various disasters caused by load short circuit.

本發明有下列之特徵： The present invention has the following characteristics:

1.本發明之第一半導體，其負責第一直流電源之開路與導通供電於負載。 1. The first semiconductor of the present invention is responsible for opening and closing the first DC power source to supply power to the load.

2.本發明之第二半導體，其負責控制第一半導體之開路與導通動作，以達到負載兩端發生短路時保護直流電源電路之目的。 2. The second semiconductor of the present invention is responsible for controlling the opening and closing actions of the first semiconductor to achieve the purpose of protecting the DC power supply circuit when a short circuit occurs at both ends of the load.

3.本發明之第二電阻器是第三半導體之閘極電阻。 3. The second resistor of the present invention is the gate resistor of the third semiconductor.

4.本發明之第一電阻器具有限制電流之功能，以防止第一半導體因為閘極過大電流而損壞第一半導體。 4. The first resistor of the present invention has the function of limiting current to prevent the first semiconductor from being damaged due to excessive gate current.

5.本發明之第三電阻器具有限制電流之功能，以防止第二半導體因為閘極與第三半導體有過大電流而損壞第二半導體與第三半導體。 5. The third resistor of the present invention has the function of limiting current to prevent the second semiconductor from being damaged due to excessive current in the gate and the third semiconductor.

6.本發明之第一半導體為N通道金屬氧化半導體場效電晶體(N Channel Metal Oxide Semiconductor Field Effect Transistor,N Channel MOSFET)或絕緣閘極雙極電晶體(Insulated Gate Bipolar Transistor,IGBT)。 6. The first semiconductor of the present invention is an N-channel metal oxide semiconductor field effect transistor (N-channel MOSFET) or an insulated gate bipolar transistor (IGBT).

7.本發明之第二半導體為N通道金屬氧化半導體場效電晶體或N型電晶體。 7. The second semiconductor of the present invention is an N-channel metal oxide semiconductor field effect transistor or an N-type transistor.

8.本發明之第三半導體為P通道金屬氧化半導體場效電晶體。 8. The third semiconductor of the present invention is a P-channel metal oxide semiconductor field effect transistor.

10:第一直流電源 10: First DC power supply

11:第一開關 11: First switch

12:負載 12: Load

20:第二直流電源 20: Second DC power supply

21:第二開關 21: Second switch

30:本發明電路保護裝置 30: Circuit protection device of the present invention

31:第一電阻器 31: First resistor

32:第二電阻器 32: Second resistor

33:第三電阻器 33: The third resistor

34:第一半導體 34: The first semiconductor

35:第二半導體 35: Second semiconductor

36:第三半導體 36: The third semiconductor

40:本發明第一接線端 40: The first terminal of the present invention

50:本發明第二接線端 50: The second terminal of the present invention

60:本發明第三接線端 60: The third terminal of the present invention

圖1為習知電池放電保護裝置之實施例。 Figure 1 is an example of a conventional battery discharge protection device.

圖2本發明電路保護裝置之第一實施例。 Figure 2 shows the first embodiment of the circuit protection device of the present invention.

圖3本發明電路保護裝置之第二實施例。 Figure 3 shows the second embodiment of the circuit protection device of the present invention.

圖4本發明電路保護裝置之第三實施例。 Figure 4 shows the third embodiment of the circuit protection device of the present invention.

如圖2所示，為本發明電路保護裝置之第一實施例，自圖中可知，本發明電路保護裝置30包括有第一半導體34、第二半導體35、第三半導體36、第一電阻器31、第二電阻器32與第三電阻器33；第一直流電源10的正電端連接第一開關11，第一開關11連接負載12之第一端，負載12之第二端連接第二接線端50、第一半導體34之汲極D(Drain,D)與第三電阻器33之第一端，第三電阻器33之第二端連接第二半導體35之閘極G(Gate,G)與第三半導體36之源極S(Source,S)；第二直流電源20之正電端連接第二開關21之第一端，第二開關21之第二端連接第一接線端40、第一電阻器31之第一端、第三半導體36之閘極G與第二電阻器32之第一端；第二電阻器32之第二端、第三半導體36之汲極D、第二半導體35之源極S、第一半導體34之源極S、第一直流電源10之負電端與第二直流電源20之負電端連接第三接線端60成為接地端；其第二直流電源20可視為一電壓源，而不自限為直流電源，亦就是可以採用脈波電源替代；第一半導體34為N通道金屬氧化半導體場效電晶體，第二半導體35為N通道金屬氧化半導體場效電晶體，第三半導體36為P通道金屬氧化半導體場效電晶體。 As shown in FIG. 2, the first embodiment of the circuit protection device of the present invention is shown. As can be seen from the figure, the circuit protection device 30 of the present invention includes a first semiconductor 34, a second semiconductor 35, a third semiconductor 36, a first resistor 31, a second resistor 32 and a third resistor 33; the positive terminal of the first DC power source 10 is connected to the first switch 11, the first switch 11 is connected to the first end of the load 12, the second end of the load 12 is connected to the second wiring terminal 50, the drain D (Drain, D) of the first semiconductor 34 and the first end of the third resistor 33, the second end of the third resistor 33 is connected to the gate G (Gate, G) of the second semiconductor 35 and the source S (Source, S) of the third semiconductor 36; the positive terminal of the second DC power source 20 is connected to the first end of the second switch 21. The second end of the second switch 21 is connected to the first terminal 40, the first end of the first resistor 31, the gate G of the third semiconductor 36 and the first end of the second resistor 32; the second end of the second resistor 32, the drain D of the third semiconductor 36, the source S of the second semiconductor 35, the source S of the first semiconductor 34, the negative end of the first DC power source 10 and the negative end of the second DC power source 20 are connected to the third terminal 60 to form a ground terminal; the second DC power source 20 can be regarded as a voltage source, not limited to a DC power source, that is, it can be replaced by a pulse power source; the first semiconductor 34 is an N-channel metal oxide semiconductor field effect transistor, the second semiconductor 35 is an N-channel metal oxide semiconductor field effect transistor, and the third semiconductor 36 is a P-channel metal oxide semiconductor field effect transistor.

如圖2所示，本發明電路保護裝置之動作原理為：當第一開關11導通時，第一直流電源10之電流經過第一開關11與負載12，再經由第二接線端50到第一半導體34之汲極D與第三電阻器33之第一端，第三電阻器33之第二端再到第二半導體35之閘極G與第三半導體37之源極S，此時第一半導體34之閘極G因無閘極G電壓所以第一半導體34之汲極D與源極S開路，同時第二半導體35之汲極D與源極S開路，第三半導體36之源極S與汲極D導通，因為第二直流電源20沒有供電，所以負載12無第一直流電源10供應；當第二開關21導通時，第二直流電源20之電流經過第一接線端40，再到第一電阻器31供電於第一半導體34之閘極G，因此第一半導體35之汲極D與源極S導通，此時第一直流電源10供電於負載12，同時供電於第三半導體36之閘極G，因而第三半導體36之源極S與汲極D開路；當第二開關21開路時，由於第二直流電源20不供電於第一半導體34之閘極G，因此第一半導體34之汲極D與源極S開路，此時第一直流電源10不供電於負載12。 As shown in FIG. 2 , the operating principle of the circuit protection device of the present invention is as follows: when the first switch 11 is turned on, the current of the first DC power source 10 passes through the first switch 11 and the load 12, and then passes through the second terminal 50 to the drain D of the first semiconductor 34 and the first end of the third resistor 33, and then to the gate G of the second semiconductor 35 and the source S of the third semiconductor 37 from the second end of the third resistor 33. At this time, since the gate G of the first semiconductor 34 has no gate G voltage, the drain D and source S of the first semiconductor 34 are open-circuited, and at the same time, the drain D and source S of the second semiconductor 35 are open-circuited, and the source S and drain D of the third semiconductor 36 are turned on. Since the second DC power source 20 is not powered, The load 12 is not supplied by the first DC power source 10; when the second switch 21 is turned on, the current of the second DC power source 20 passes through the first terminal 40 and then to the first resistor 31 to supply power to the gate G of the first semiconductor 34, so the drain D and source S of the first semiconductor 35 are turned on. At this time, the first DC power source 10 supplies power to the load 12 and to the gate G of the third semiconductor 36 at the same time, so the source S and drain D of the third semiconductor 36 are open; when the second switch 21 is open, since the second DC power source 20 does not supply power to the gate G of the first semiconductor 34, the drain D and source S of the first semiconductor 34 are open, and at this time the first DC power source 10 does not supply power to the load 12.

如圖2所示，本發明電路保護裝置外接之負載12短路保護動作原理為：當第一開關11與第二開關21導通時，負載12由第一直流電源10供電；當負載12兩端短路時，根據第一半導體34之輸出特性曲線表(Output Characteristics)可知，當第一半導體34之汲極電流(Drain Current)上升到其相對應之汲源極電壓(Drain Source Voltage)到達高於第二半導體35之閘極G與源極S之間的導通電壓(On State Voltage)時，此時第二半導體35之汲極D與源極S導通，於是第一半導體34之汲極D與源極S開路，第一直流電源10不供電於短路負載12，而使第一直流電源10受到保護；同理，適當之選擇第一半導體34之汲源極電壓所相對應之過載(Over Load)汲極電流，亦可達到過載保護之功能。 As shown in FIG. 2 , the short-circuit protection action principle of the external load 12 of the circuit protection device of the present invention is as follows: when the first switch 11 and the second switch 21 are turned on, the load 12 is powered by the first DC power source 10; when the two ends of the load 12 are short-circuited, according to the output characteristics curve table (Output Characteristics) of the first semiconductor 34, when the drain current (Drain Current) of the first semiconductor 34 rises to its corresponding drain source voltage (Drain Source Voltage) reaches a higher than the conduction voltage (On State Voltage) between the gate G and the source S of the second semiconductor 35, the first semiconductor 35 is turned on. Voltage), the drain D and source S of the second semiconductor 35 are conducting, so the drain D and source S of the first semiconductor 34 are open, and the first DC power supply 10 does not supply power to the short-circuit load 12, so that the first DC power supply 10 is protected; similarly, the overload (Over Load) drain current corresponding to the drain-source voltage of the first semiconductor 34 can also achieve the overload protection function.

如圖3所示，為本發明電路保護裝置之第二實施例，自圖中可知，其係將圖2中之第一半導體34由N金屬氧化半導體場效電晶體改為絶緣閘極雙極電晶體，其他電路結構皆與圖2相同，其動作原理亦相同，而不贅述。 As shown in FIG. 3, it is the second embodiment of the circuit protection device of the present invention. As can be seen from the figure, the first semiconductor 34 in FIG. 2 is changed from an N-metal oxide semiconductor field effect transistor to an insulated gate bipolar transistor. The other circuit structures are the same as those in FIG. 2, and the operating principles are also the same, so they will not be described in detail.

如圖3所示，本發明電路保護裝置外接之負載12短路保護動作原理為： As shown in Figure 3, the short-circuit protection action principle of the external load 12 of the circuit protection device of the present invention is:

當第一開關11與第二開關21導通時，負載12由第一直流電源10供電；當負載12兩端短路時，根據第一半導體34之輸出特性曲線表可知，當第一半導體34之集極電流(Collector Current)上升到其相對應之集射極電壓(Collector Emitter Voltage)到達高於第二半導體35之閘極G與源極S之間之導通電壓時，此時第二半導體35之汲極D與源極S導通，於是第一半導體34之集極C與射極E開路，第一直流電源10不供電於短路負載12，而使第一直流電源10受到保護；同理，適當之選擇第一半導體34之集射極電壓所相對應之過載集極電流，亦可達到過載保護之功能。 When the first switch 11 and the second switch 21 are turned on, the load 12 is powered by the first DC power source 10. When the two ends of the load 12 are short-circuited, according to the output characteristic curve of the first semiconductor 34, when the collector current of the first semiconductor 34 rises to its corresponding collector-emitter voltage, the collector-emitter voltage of the first semiconductor 34 is increased. When the voltage reaches a value higher than the conduction voltage between the gate G and the source S of the second semiconductor 35, the drain D and the source S of the second semiconductor 35 are turned on, so the collector C and the emitter E of the first semiconductor 34 are open, and the first DC power source 10 does not supply power to the short-circuited load 12, so that the first DC power source 10 is protected; similarly, the overload collector current corresponding to the collector-emitter voltage of the first semiconductor 34 can also achieve the overload protection function.

如圖4所示，為本發明電路保護裝置之第三實施例，自圖中可知，其係將圖2中之第一半導體34由N金屬氧化半導體場效電晶體改為絶緣閘極雙極電晶體與將第二半導體35由N金屬氧化半導體場效電晶體改為N型電晶體(N Type Transistor)，其他電路結構皆與圖2相同，其動作原理亦相同，而不贅述。 As shown in FIG. 4, it is the third embodiment of the circuit protection device of the present invention. As can be seen from the figure, the first semiconductor 34 in FIG. 2 is changed from an N-metal oxide semiconductor field effect transistor to an insulated gate bipolar transistor and the second semiconductor 35 is changed from an N-metal oxide semiconductor field effect transistor to an N-type transistor. The other circuit structures are the same as those in FIG. 2, and the operating principles are also the same, so they will not be described in detail.

如圖4所示，本發明電路保護裝置外接之負載12短路保護動作原理為： As shown in Figure 4, the short-circuit protection action principle of the external load 12 of the circuit protection device of the present invention is:

當第一開關11與第二開關21導通時，負載12由第一直流電源10供電；當負載12兩端短路時，根據第一半導體34之輸出特性曲線表可知，當第一半導體34之集極電流上升到其相對應之集射極電壓到達高於第二半導體35之基極B(Base,B)與射極E之間之導通電壓時，此時第二半導體35之集極C與射極E導通，於是第一半導體34之集極C與射極E開路，第一直流電源10不供電於短路負載12，而使第一直流電源10受到保護；同理，適當之選擇第一半導體34之集射極電壓所相對應之過載集極電流，亦可達到過載保護之功能。 When the first switch 11 and the second switch 21 are turned on, the load 12 is powered by the first DC power source 10. When the two ends of the load 12 are short-circuited, according to the output characteristic curve of the first semiconductor 34, when the collector current of the first semiconductor 34 rises to a point where the corresponding collector-emitter voltage reaches a voltage higher than the conduction voltage between the base B (Base, B) and the emitter E of the second semiconductor 35, the load 12 is powered by the first DC power source 10. When the voltage is 0, the collector C and emitter E of the second semiconductor 35 are turned on, so the collector C and emitter E of the first semiconductor 34 are open, and the first DC power supply 10 does not supply power to the short-circuited load 12, so that the first DC power supply 10 is protected; similarly, the overload collector current corresponding to the collector-emitter voltage of the first semiconductor 34 can also achieve the overload protection function.

由上述動作原理與功能動作之說明可知本發明可據於實施。 From the above description of the action principle and functional action, it can be seen that the present invention can be implemented accordingly.

10:第一直流電源 10: First DC power supply

11:第一開關 11: First switch

12:負載 12: Load

20:第二直流電源 20: Second DC power supply

21:第二開關 21: Second switch

31:第一電阻器 31: First resistor

32:第二電阻器 32: Second resistor

33:第三電阻器 33: The third resistor

34:第一半導體 34: The first semiconductor

35:第二半導體 35: Second semiconductor

36:第三半導體 36: The third semiconductor

40:本發明第一接線端 40: The first terminal of the present invention

50:本發明第二接線端 50: The second terminal of the present invention

60:本發明第三接線端 60: The third terminal of the present invention

Claims

A circuit protection device has the function of protecting the first DC power source from overload or short circuit during the power supply process. The circuit protection device includes:

A first semiconductor having a drain, a source and a gate;

A second semiconductor having a drain, a source and a gate; the drain of the second semiconductor is connected to the gate of the first semiconductor, and the source of the second semiconductor is connected to the source of the first semiconductor;

A third semiconductor having a drain, a source and a gate. The source of the third semiconductor is connected to the gate of the second semiconductor. The drain of the third semiconductor is connected to the source of the first semiconductor and the source of the second semiconductor to form a third terminal. The third terminal has the function of connecting the negative terminal of the external first DC power source to the negative terminal of the second DC power source;

A first resistor having a first end and a second end, the second end of the first resistor is connected to the gate of the first semiconductor and the drain of the second semiconductor, and has the function of limiting current;

A second resistor having a first end and a second end, the second end of the second resistor is connected to the drain of the third semiconductor, the first end of the second resistor is connected to the gate of the third semiconductor and the first end of the first resistor to form a first wiring terminal, the first wiring terminal has the function of providing a positive terminal connection for the second DC power source; and

A third resistor has a first end and a second end, the second end of the third resistor is connected to the gate of the second semiconductor and the source of the third semiconductor, the first end of the third resistor is connected to the drain of the first semiconductor to form a second connection terminal, the second connection terminal has the function of providing a second end connection of the external load, and the first end of the load is connected to the positive terminal of the first DC power source.

As described in item 1 of the patent application scope, the circuit protection device, wherein the source of the first semiconductor, the source of the second semiconductor, the drain of the third semiconductor and the second end of the second resistor are connected together to form a third terminal or a ground terminal, and the third terminal has the function of providing a connection between the negative terminal of the external first DC power source and the negative terminal of the external second DC power source.

A circuit protection device as described in item 1 of the patent application, wherein the first semiconductor is an N-channel metal oxide semiconductor field effect transistor.

A circuit protection device as described in item 1 of the patent application, wherein the second semiconductor is an N-channel metal oxide semiconductor field effect transistor or an N-type transistor.

A circuit protection device as described in item 1 of the patent application, wherein the third semiconductor is a P-channel metal oxide semiconductor field effect transistor.

A first semiconductor having a collector, an emitter and a gate;

A second semiconductor having a drain, a source and a gate; the drain of the second semiconductor is connected to the gate of the first semiconductor, and the source of the second semiconductor is connected to the emitter of the first semiconductor;

A third semiconductor having a drain, a source and a gate. The source of the third semiconductor is connected to the gate of the second semiconductor. The drain of the third semiconductor is connected to the emitter of the first semiconductor and the source of the second semiconductor to form a third terminal. The third terminal has the function of connecting the negative terminal of the external first DC power source to the negative terminal of the second DC power source;

A second resistor having a first end and a second end, the second end of the second resistor being connected to the drain of the third semiconductor, the first end of the second resistor being connected to the gate of the third semiconductor and the first end of the first resistor to form a first wiring terminal, the first wiring terminal having the function of providing a positive terminal connection for the second DC power source; and

A third resistor has a first end and a second end, the second end of the third resistor is connected to the gate of the second semiconductor and the source of the third semiconductor, the first end of the third resistor is connected to the collector of the first semiconductor to form a second connection terminal, the second connection terminal has the function of providing a second end connection of the external load, and the first end of the load is connected to the positive terminal of the first DC power source.

As described in item 6 of the patent application scope, the emitter of the first semiconductor, the source of the second semiconductor, the drain of the third semiconductor and the second end of the second resistor are connected together to form a third terminal or a ground terminal, and the third terminal has the function of connecting the negative terminal of the external first DC power source with the negative terminal of the external second DC power source.

A circuit protection device as described in Item 6 of the patent application, wherein the first semiconductor is an insulated gate bipolar transistor.

A circuit protection device as described in Item 6 of the patent application, wherein the second semiconductor is an N-channel metal oxide semiconductor field effect transistor or an N-type transistor.

A circuit protection device as described in item 6 of the patent application, wherein the third semiconductor is a P-channel metal oxide semiconductor field effect transistor.