TW202309978A - Manufacturing method of semiconductor component - Google Patents

Abstract

The present disclosure provides a manufacturing method of semiconductor component including: providing a substrate including a first surface and a second surface opposite to each other; forming a paramagnetic coating on the first surface of the substrate; disposing the substrate on an electromagnet device, wherein the paramagnetic coating is between the substrate and the electromagnet device; applying a voltage to the electromagnet device to fix the substrate; disposing an adhesive on the second surface of the substrate; disposing a plurality of die on the adhesive; and stopping to apply the voltage to the electromagnet device to separate the substrate and the electromagnet device.

Description

Manufacturing method of semiconductor element

The present application relates to the technical field of semiconductor elements, in particular to a method for preparing a semiconductor element.

In the prior art, processed wafers can be separated from each other by a die saw process. Generally, the backside of the wafer is pasted with blue tape and placed on a carrier (eg, a metal frame). This process is also called wafer mount. Then, the wafer fixed by the adhesive tape will be placed on a wafer dicing machine, and undergo a dicing process to form a plurality of dies. Finally, the plurality of dies are separated from the tape for subsequent process.

Further, in order to prevent the wafer from shaking or rotating during the cutting process, the wafer is usually fixed by vacuum suction. However, the way of vacuum adsorption may have the problem of uneven adsorption force. Therefore, how to provide a more stable fixing method has become an urgent problem to be solved in this field.

The present application provides a method for preparing a semiconductor element to solve the problem in the prior art that the wafer cannot be stably fixed during wafer cutting, resulting in poor yield.

In order to solve the above-mentioned technical problems, the application is implemented as follows:

A method for preparing a semiconductor element is provided, comprising: providing a substrate having an opposite first surface and a second surface; forming a paramagnetic coating on the first surface of the substrate; disposing the substrate on an electromagnet device, Wherein the paramagnetic coating is located between the substrate and the electromagnet device; applying voltage to the electromagnet device to fix the substrate; disposing an adhesive on the second surface of the substrate; disposing a plurality of crystal grains on the adhesive; and stopping A voltage is applied to the electromagnet to separate the substrate from the electromagnet.

In this application, the paramagnetic coating coated on the substrate is adsorbed by an electromagnet device, so that the wafer can be effectively and stably fixed during the wafer dicing process. In addition, the substrate coated with the paramagnetic coating can be reused, which further reduces the cost. That is, the present application improves the manufacturing process of the prior art, so as to realize a method for manufacturing semiconductor elements with higher yield and lower cost.

In order to facilitate the understanding of the technical features, content and advantages of this application and the effects it can achieve, this application is hereby combined with the accompanying drawings and described in detail as follows in the form of embodiments, and the purposes of the drawings used therein are only For the purpose of illustrating and assisting the description, it may not be the true proportion and precise configuration of this application after implementation. Therefore, the proportion and configuration relationship of the attached drawings should not be interpreted or limited to the scope of rights of this application in actual implementation. Description.

Unless otherwise defined, all terms (including technical and scientific terms) used herein have the meaning as commonly understood by one of ordinary skill in the art to which this application belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted to have meanings consistent with their meanings in the context of the relevant art and this application, and will not be interpreted as idealized or excessive formal meaning, unless expressly so defined herein.

Please refer to FIG. 1 , which is a flowchart of a method for manufacturing an electronic component according to an embodiment of the present application. In this embodiment, the semiconductor device refers to a plurality of crystal grains formed through a wafer dicing process. Further, the method of manufacturing semiconductor elements refers to a part of the wafer dicing process. More specifically, it is a process of fixing a wafer and performing wafer dicing to obtain a plurality of dies. However, the present application is not limited thereto. In other embodiments, the semiconductor element may also be an element or component such as a transistor. That is, the technology provided in this application can be applied to various semiconductor devices that need to be fixed by means of vacuum suction.

It is worth mentioning that the order of the steps below is not fixed and indispensable, and some steps can be performed, omitted or added at the same time. This flow chart describes the steps of the application in a broad and simple manner. It is not intended to limit the sequence and number of steps of the manufacturing method of the present application. The method for preparing a semiconductor element includes:

Step S11: providing a substrate having opposite first and second surfaces. The base material is used to carry the adhesive and semiconductor elements (eg, wafer) disposed thereon.

In some embodiments, the substrate may include polyethylene terephthalate (polyethylene terephthalate, PET), biaxially oriented polypropylene film (Biaxially Oriented Polypropylene, BOPP), polyimide (Polyimide, PI), modified Modified-Polyimide (MPI), Liquid Crystal Polymer (LCP) or copper foil. However, the present application is not limited thereto. In other embodiments, materials known to those skilled in the art can be applied to the substrate in the present application.

In some embodiments, the thickness of the substrate is between 0.025mm and 20mm. For example, the thickness of the substrate can be 0.025mm, 0.05cm, 0.075mm, 0.1mm, 0.5mm, 1mm, 5mm, 10mm, 15mm, 20mm, or any range consisting of the above values. Preferably, the thickness of the substrate can be between 0.025mm and 1.5mm.

In some embodiments, the substrate may have a uniform thickness, but is not limited thereto. In other embodiments, the substrate may have a plurality of thicknesses, and each of the plurality of thicknesses may correspond to a specific portion of the semiconductor device. For example, the substrate may have a first thickness and a second thickness, wherein the first thickness is greater than the second thickness. In this case, the first thickness may correspond to a thinner portion of the semiconductor element, and the second thickness may correspond to a thicker portion of the semiconductor element, so that the semiconductor element can be placed horizontally on the substrate.

In some embodiments, the thickness of the substrate can be determined according to the requirement of heat conduction. For example, when the substrate is used in a process that requires temperature maintenance, the substrate can have a thicker thickness (eg, 20 mm in the above) to increase its heat capacity. In this way, the substrate can have a better temperature-maintaining effect. Conversely, when the substrate is used in a process that requires rapid temperature changes, the substrate can have a thinner thickness (eg, 0.025 mm above) to reduce its heat capacity. In this way, the substrate can have a better temperature changing effect.

In some embodiments, the substrate can be a circular substrate, an oval substrate, a square substrate, or a rectangular substrate. However, the present application is not limited thereto. In other embodiments, the base material may also be a special-shaped base material, so as to be applied to the preparation of semiconductor elements with specific shapes and sizes.

Step S12: forming a paramagnetic coating on the first surface of the substrate.

In some embodiments, the method of forming the paramagnetic coating includes vacuum sputtering or evaporation. However, the present application is not limited thereto, and the paramagnetic coating can be formed on the first surface of the substrate by any method known to those skilled in the art.

In some embodiments, the paramagnetic coating may comprise one or more of iron, cobalt, nickel, tungsten, magnesium, titanium, zinc. For example, the paramagnetic coating can be a pure metal coating or an alloy coating containing the above metals, and is formed on the first surface of the substrate by processes such as vacuum sputtering or vapor deposition.

In some embodiments, the thickness of the paramagnetic coating is between 5 nm and 200 nm. For example, the thickness of the paramagnetic coating can be 5nm, 20nm, 40nm, 60nm, 80nm, 100nm, 120nm, 140nm, 160nm, 180nm, 200nm, or any range consisting of the above values. Preferably, the thickness of the paramagnetic coating is between 20nm-150nm.

In some embodiments, the paramagnetic coating may have a uniform thickness, but is not limited thereto. In other embodiments, the position of the paramagnetic coating away from the edge of the substrate (eg, the geometric center of the paramagnetic coating) may have a greater thickness to increase the magnetic permeability at that position. Alternatively, the thickness of the paramagnetic coating can also decrease outwards in the form of concentric circles to form a micro-curved surface or a stepped structure.

Step S13: setting the substrate on the electromagnet device, wherein the paramagnetic coating is located between the substrate and the electromagnet device. In some embodiments, an electromagnet arrangement is used to receive an external voltage to generate a magnetic field. This magnetic field can attract the paramagnetic coating on the substrate, thereby further immobilizing the substrate.

Step S14: applying voltage to the electromagnet device to fix the substrate. In some embodiments, the voltage applied to the electromagnet arrangement is between 5V and 48V. For example, the applied voltage can be 5V, 10V, 15V, 20V, 25V, 30V, 35V, 40V, 45V, 48V, or any combination of the above values.

Step S15: disposing an adhesive on the second surface of the substrate. In some embodiments, the adhesive may be thermal release tape or UV release tape. Among them, the viscosity of pyrolytic adhesive will be lost due to temperature rise, and the viscosity of photolytic adhesive will be lost due to ultraviolet light irradiation.

Step S16: disposing a plurality of dies on the adhesive. In some embodiments, the step of disposing the plurality of dies on the adhesive may further include:

Sub-step S160: disposing the semiconductor structure on the adhesive. In some embodiments, the semiconductor structures may be wafers that have not been diced. Wafers that have not yet been diced can be held in place by an adhesive to prevent movement or shaking during the next sub-step.

Sub-step S161 : cutting the semiconductor structure to obtain a plurality of crystal grains. In some embodiments, the semiconductor structure can be diced by laser, ion beam, diamond grinding wheel, or any suitable method to form a plurality of crystal grains spaced apart from each other.

Step S17: stop applying voltage to the electromagnet device to separate the substrate from the electromagnet device. Furthermore, the substrate coated with the paramagnetic coating can be reused. For example, the substrate can be heated or irradiated with UV light to release the plurality of crystal grains on it from the adhesive, and repeat the above steps S13 to S17. In this way, the manufacturing process of the present application can reduce the production cost.

To sum up, the present application uses the electromagnet device to absorb the paramagnetic coating coated on the substrate, so that the wafer can be effectively and stably fixed during the wafer dicing process. In addition, the substrate coated with the paramagnetic coating can be reused, which further reduces the cost. That is, the present application improves the manufacturing process of the prior art, so as to realize a method for manufacturing semiconductor elements with higher yield and lower cost.

However, the above-mentioned ones are only the embodiments of this application, and are not used to limit the scope of implementation of this application. For example, all equivalent changes and modifications made in accordance with the shape, structure, characteristics and spirit described in the patent scope of this application, All should be included in the patent application scope of this application.

S11-S17: Steps S160, S161: sub-steps

FIG. 1 is a flowchart of a method for manufacturing a semiconductor device according to an embodiment of the present application.

S11-S17: Steps

S160, S161: sub-steps

Claims (8)

A method for preparing a semiconductor element, comprising: providing a base material, which has a first surface and a second surface opposite; forming a paramagnetic coating on the first surface of the substrate; disposing the substrate on an electromagnet assembly, wherein the paramagnetic coating is located between the substrate and the electromagnet assembly; applying a voltage to the electromagnet arrangement to fix the substrate; disposing an adhesive on the second surface of the substrate; disposing a plurality of dies on the adhesive; and Stopping the application of voltage to the electromagnet device to separate the substrate from the electromagnet device. The method for manufacturing a semiconductor element as claimed in claim 1, wherein the step of arranging the plurality of crystal grains on the adhesive further comprises: disposing a semiconductor structure on the adhesive; and The semiconductor structure is cut to obtain the plurality of crystal grains. The method of manufacturing a semiconductor element as claimed in claim 1, wherein the voltage applied to the electromagnet device is between 5V and 48V. The method for manufacturing a semiconductor device as claimed in claim 1, wherein the method of forming the paramagnetic coating includes vacuum sputtering or evaporation. The method for preparing a semiconductor element according to claim 1, wherein the paramagnetic coating contains one or more of iron, cobalt, nickel, tungsten, magnesium, titanium, and zinc. The method for manufacturing a semiconductor element according to claim 1, wherein the thickness of the paramagnetic coating is between 5nm and 200nm. The method for manufacturing a semiconductor device as claimed in claim 6, wherein the thickness of the paramagnetic coating is between 20nm and 150nm. The method for preparing a semiconductor element according to claim 1, wherein the substrate comprises PET, BOPP, PI, MPI, LCP or copper foil.

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