TW202022867A - Static random access memory, display driving circuit and display device for automatic reverse read/write especially having automatic functions of forward write-in and reverse reading and applied to the driving circuit in a display device - Google Patents

Abstract

A static random access memory for automatic reverse read/write includes a control unit and a memory unit. The control unit is coupled to the memory unit and is used to perform the following operations: performing a forward read operation and a forward write operation on the memory unit during a first frame period; performing the forward read operation and the forward write operation on the memory unit during a second frame period, to forward write a first image; entering a third frame period when receiving a vertical synchronization trigger signal to perform a reverse read operation on the memory unit so as to reversely read the first image, and performing a reverse write operation on the memory unit to reversely write a second image; performing the forward read operation on the memory unit during a fourth frame period, to forward read the second image, and performing the forward write operation on the memory unit to forward write a third image; and periodically repeating operations in the third frame period and the fourth frame period after the fourth frame period.

Description

Static random access memory with automatic reverse reading and writing, display drive circuit and display device

The present invention relates to a static random access memory, in particular to a static random access memory capable of automatic reverse reading and writing.

In existing user devices such as smart phones and tablet computers, many structural designs limit the position of the integrated circuit, and therefore need to be adjusted. However, the adjustment may cause the problem of screen flipping, as the gray strip 10 depicted in FIG. 1a flips from the bottom of the screen to the top of the screen in FIG. 1b.

Currently, manufacturers have applied Active-Matrix Organic Light-Emitting Diode (AMOLED) technology to display devices to reduce power consumption and cost. However, most of the AMOLED technology does not support the forward and reverse scanning functions of the Gate Driver on Array (GOA) circuit, so it is impossible to realize the screen flip, that is, the Mirror-Y technology. The read mode or write mode of the existing static random access memory (SRAM) must have a readability state or a write stability state, respectively. Therefore, as shown in Figure 2a and Figure 2b, the existing When SRAM is MY=0 (screen not flipped mode), during each frame period (F1-5), it can only support positive writing (as shown by the downward slope of the solid line) and forward reading (as shown by the downward slope of the dotted line). And when MY=1 (screen flip mode), it can only support reverse writing (as shown by the upward sloping solid line) and reverse reading (as shown by the upward sloping dotted line), that is to say, the existing SRAM cannot support forward writing or reverse reading or Write backwards and read.

In order to solve the above problems, a novel static random access memory is urgently needed in this field.

One purpose of the present invention is to disclose a static random access memory, which can achieve the function of forward writing and reverse reading, so as to realize the effect of the display screen flip.

To achieve the above objective, a static random access memory with automatic reverse reading and writing is proposed, which includes a control unit and a memory unit, the control unit is coupled to the memory unit and is used to perform the following operations: Perform a forward read operation and a forward write operation on the memory cell during a first frame; perform the forward read operation and the forward write operation on the memory cell during a second frame The write operation writes a first image in the forward direction; when a vertical synchronization trigger signal is received, a third frame period is entered to perform a reverse read operation on the memory cell to read the first image in reverse. An image, and perform a reverse write operation on the memory cell to write a second image in reverse; perform the forward read operation on the memory cell during a fourth frame to read forward Taking the second image, and performing the forward writing operation on the memory unit to write a third image in the forward direction; and periodically repeating in the third frame after the fourth frame period During and during the fourth frame.

In one embodiment, the memory unit includes a plurality of storage units to store binary information.

To achieve the above objective, the present invention further provides a display driving circuit, which has a memory module, a first-in first-out temporary storage unit and a source driving unit, the memory module includes a data buffer circuit and a static random Access memory, and the static random access memory includes a control unit and a memory unit, wherein the data buffer circuit is coupled to the first-in-first-out temporary storage unit to receive the first display data, and is used Provide second display data to the source driving unit to generate a pixel voltage according to the second display data, characterized in that the control unit is used to perform an automatic reverse reading and writing process on the first display data To generate the second display data, and the automatic reverse reading and writing procedure includes:

Performing a forward read operation and a forward write operation on the memory cell during a first frame;

Perform the forward read operation and the forward write operation on the memory cell during a second frame, so that the first buffer data generated by the first display data through a first buffer operation is positive Write a first image to;

When a vertical synchronization trigger signal is received, a third frame period is entered to perform a reverse reading operation on the memory unit to read the first image in reverse, and the first image is passing through the data One of the buffer circuits generates the second display data after a second buffer operation, and performs a reverse write operation on the memory cell according to the first buffer data to reverse write a second image;

Perform the forward read operation on the memory cell during a fourth frame to read the second image forward, and the second image is after the second buffer operation of the data buffer circuit Generating the second display data, and performing the forward write operation on the memory unit according to the first buffer data to write a third image in the forward direction; and

After the fourth frame period, the operations in the third frame period and the fourth frame period are periodically repeated.

In an embodiment, the first buffering operation includes an encoding operation.

In one embodiment, the second buffering operation includes a decoding operation.

To achieve the above objective, the present invention further provides a display device having a display and the aforementioned display driving circuit, wherein the display driving circuit drives the display according to the pixel voltage.

In a possible embodiment, the display may be a liquid crystal display or an organic light emitting diode display.

In order to enable your reviewer to further understand the structure, features and purpose of the present invention, drawings and detailed descriptions of preferred specific embodiments are attached as follows.

Please refer to FIG. 3, FIG. 4 and FIG. 5 together. FIG. 3 shows a block diagram of an embodiment of the display driving circuit of the present invention; FIG. 4 shows a static random access memory of the display driving circuit of FIG. 3 120 is a block diagram of an embodiment; and FIG. 5 is a schematic diagram showing an automatic reverse read and write operation of the static random access memory 120 of FIG. 4.

As shown in FIGS. 3 and 4, the display driving circuit has a memory module 100, a first-in-first-out temporary storage unit 200 and a source driving unit 300. The memory module 100 includes a data buffer circuit 110 and A static random access memory (SRAM) 120, and the static random access memory 120 includes a control unit 121 and a memory unit 122, wherein the data buffer circuit 110 is connected to the first-in first-out The temporary storage unit 200 is coupled to receive the first display data D ₁ , and is used to provide the second display data D ₂ to the source driving unit 300 to generate a pixel voltage according to the second display data D ₂ , and The memory unit 122 includes a plurality of storage units to store binary information.

The data buffer circuit 110 includes an encoder 111, a line buffer 112, an address counting unit 113, a display data acquisition unit 114, a decoder 115, and a line buffer 116. The encoder 111, the line buffer 112, and address counting unit 113 data lines D ₁ to provide a first operation on the first display buffer, the display information acquisition unit 114, decoder 115 and the output line buffer 116 based on the data for static random-access memory 120 D _2a provides a second buffering operation, and the decoder 115 corresponds to the encoder 111.

During operation, the control unit 121 is used to execute an automatic reverse reading and writing procedure on the first display data D ₁ to generate the second display data D ₂ , and the automatic reverse reading and writing procedure includes:

During a first frame (F1), perform a forward read operation (as shown by the downward sloping broken line) and a forward write operation (as shown by the downward sloping solid line) to the memory cell 122;

For the memory cell 122 during a second inquiry frame (F2) and the forward read operation said forward write operation, according to the first display data D ₁ through the first buffer operation The generated first buffer data D _{1a is} written into a first image in the forward direction;

When a vertical synchronization trigger signal VSYNC is received, a third frame (F3) is entered to perform a reverse reading operation on the memory unit 122 (as shown by the upward slanting dotted line) to reverse the output data D _2a Read the first image, and the first image will generate the second display data D ₂ after the second buffering operation of the data buffer circuit 110, and the control unit 121 will follow the first A buffer data D _1a performs a reverse write operation on the memory unit 122 (as shown by the upwardly inclined solid line) to write a second image in reverse;

During a fourth frame (F4), the memory unit 122 is read in the forward direction to read the second image forward through the output data _D2a , and the second image is buffered by the data. The second buffer operation of the circuit 110 will generate the second display data D ₂ , and the control unit 121 will perform the forward write operation on the memory unit 122 according to the first buffer data D _1a to Write a third image forward; and

After the fourth frame period, the operations in the third frame period and the fourth frame period are periodically repeated.

According to the above description, the present invention further provides a display device having a display and the aforementioned display driving circuit, wherein the display driving circuit drives the display according to the pixel voltage.

In addition, in possible embodiments, the display may be a liquid crystal display or an organic light emitting diode display.

With the design disclosed above, the present invention has the following advantages:

1. Make SRAM can automatically reverse read and write.

2. Avoid tearing effect.

3. It can support display panels without GOA forward and reverse scanning function.

4. Increase the application range of the driver IC.

The disclosure in this case is a preferred embodiment, and any partial changes or modifications that are derived from the technical ideas of the case and can be easily inferred by those familiar with the art will not deviate from the scope of the patent right of the case.

In summary, regardless of the purpose, means and effect of this case, it is shown that it is very different from the conventional technology, and its first invention is suitable for practicality, and it does meet the patent requirements of the invention. I sincerely ask the examiner to check it out and grant the patent as soon as possible. Society is for the best prayer.

10: Gray bar 100: Memory module 110: Data buffer circuit 111: Encoder 112: Line buffer 113: Address counting unit 114: Display data collection unit 115: Decoder 116: Line buffer 120: Static random Access memory 121: control unit 122: memory unit 200: first-in first-out temporary storage unit 300: source drive unit

Figures 1a-b illustrate the problem of picture flipping in the prior art display technology. 2a-b show schematic diagrams of a write-forward read operation and a write-reverse read operation of a static random access memory in the prior art. FIG. 3 shows a block diagram of an embodiment of the display driving circuit of the present invention. 4 is a block diagram of an embodiment of a static random access memory of the display driving circuit of FIG. 3. FIG. FIG. 5 is a schematic diagram showing an automatic reverse read and write operation of the static random access memory of FIG. 4. FIG.

120: Static random access memory

121: control unit

122: memory unit

Claims (7)

A static random access memory with automatic reverse reading and writing, including a control unit and a memory unit, the control unit is coupled to the memory unit and is used to perform the following operations: During a first frame The memory cell performs a forward read operation and a forward write operation; during a second frame, the memory cell performs the forward read operation and the forward write operation to write a forward The first image; enter a third frame period when a vertical synchronization trigger signal is received, to perform a reverse read operation on the memory unit to read the first image in reverse, and to read the memory unit Perform a reverse write operation to write a second image in reverse; perform the forward read operation on the memory cell during a fourth frame to read the second image in the forward direction, and The memory unit performs the forward writing operation to write a third image in the forward direction; and periodically repeats during the third frame period and the fourth frame period after the fourth frame period operating. The static random access memory with automatic reverse reading and writing as described in claim 1, wherein the memory unit includes a plurality of storage units to store binary information. A display drive circuit has a memory module, a first-in first-out temporary storage unit and a source drive unit. The memory module includes a data buffer circuit and a static random access memory, and the static random access memory The access memory includes a control unit and a memory unit, wherein the data buffer circuit is coupled to the first-in-first-out temporary storage unit to receive first display data, and is used to provide second display data to the source The driving unit generates a pixel voltage according to the second display data, and is characterized in that the control unit is used to perform an automatic reverse reading and writing process on the first display data to generate the second display data, And the automatic reverse reading and writing procedure includes: Performing a forward read operation and a forward write operation on the memory cell during a first frame; Performing the memory cell during a second frame The forward read operation and the forward write operation are used to write a first image in the forward direction according to the first buffer data generated by the first display data through a first buffer operation; after receiving a vertical A third frame period is entered when the synchronization trigger signal is used to perform a reverse read operation on the memory unit to read the first image in reverse, and the first image is passed through one of the data buffer circuits. After the second buffering operation, the second display data is generated, and a reverse writing operation is performed on the memory cell according to the first buffering data to reversely write a second image; during a fourth frame Perform the forward reading operation on the memory unit to read the second image forward, and the second image will generate the second display after the second buffer operation of the data buffer circuit Data, and perform the forward write operation on the memory unit according to the first buffer data to write a third image forward; and periodically repeat the third image after the fourth frame period. Operations during the frame period and the fourth frame period. The display driving circuit according to claim 3, wherein the first buffering operation includes an encoding operation. The display driving circuit according to claim 3, wherein the second buffering operation includes a decoding operation. A display device having a display and the display driving circuit according to any one of Claims 3-5, wherein the display driving circuit drives the display according to the pixel voltage. The display device according to claim 6, wherein the display is a liquid crystal display or an organic light emitting diode display.

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