TW201944083A - Measuring structure - Google Patents

Abstract

A measuring structure includes a main test system, a test module, a single analog signal providing device, a single to multiple analog signal outputting interface and a device under test. The single analog signal providing device provides an analog signal according to an instruction from the main test system; the single to multiple analog signal outputting interface receives the analog signal from the single analog signal providing device and provides a plurality of channels to synchronously output a plurality of analog signals; a plurality of products under test are disposed on the device under test for respectively receiving the analog signal via one of the plurality of channels.

Description

Measurement architecture

The present invention relates to a measurement architecture, and particularly relates to a measurement architecture suitable for measuring a plurality of objects to be measured.

The existing measurement architecture usually installs a single analog signal supply device in a separate case, and its operation timing is separated from the main measurement system, and each DUT is equipped with a single analog signal supply device. When testing multiple DUTs at the same time under this architecture, the timing of the DUT and the analog signal may not match (for example, a delay occurs when an analog signal device triggers the analog signal through the main measurement system). Time), which causes measurement errors. In addition, this architecture also needs to provide additional cases for multiple single analog signal supply devices, which will take up a lot of space. Although there is also a current structure in which a single analog signal supply device is set in the measurement main system to synchronize the timing of the DUT with the timing of the analog signal, when the number of DUTs is greater, the required slots are also occupied. There will be more, so measuring the main system will require a lot of system resources and space. In addition, in the current measurement architecture, when performing a synchronous test, each DUT will be equipped with a single analog signal supply device. Since a single analog signal supply device is more expensive, as long as the number of DUTs is large, the cost will also be Greatly improved. Furthermore, if the internal signals are to be consistent from the way of selecting hardware components, it will cause the manufacturing cost of the hardware system to be more expensive and longer to manufacture, which will not meet the requirements, and this method requires the corresponding software to be written. It's not easy.

In view of this, the present invention provides a new measurement architecture to solve the above problems.

An object of the present invention is to provide a measurement architecture including: a measurement main system, at least one single analog signal supply device, at least one single-to-many analog signal output interface, and a device under test. The measurement main system has a test module; a single analog signal supply device outputs an analog signal according to the instruction of the measurement main system; at least one single-to-many analog signal output interface receives an analog signal from a single analog signal supply device and provides The plurality of channels are used to output the analog signals synchronously; the device under test is used to place a plurality of objects to be tested, so that the objects to be tested each receive an analog signal passing through one of the channels. In this way, the present invention can solve the problem that the object under test is not synchronized with the analog signal, and provide effects such as reducing space required by the system or reducing production costs.

In one embodiment, the number of at least one single analog signal supply device is M, the number of at least one single-to-many analog signal output interface is M, and each single analog signal supply device is connected to one single-to-multi analog signal output. Interface, where M is a positive integer. In one embodiment, at least one single analog signal supply device and the at least one single-to-multiple analog signal output interface are disposed in the measurement main system. In one embodiment, at least one single analog signal supply device is disposed in the measurement main system, and the at least one single-to-multiple analog signal output interface is disposed outside the measurement main system. In one embodiment, at least one single analog signal supply device is disposed and the at least one single-to-multiple analog signal output interface is disposed outside the measurement main system.

In one embodiment, the number of at least one single analog signal supply device is M, the number of at least one single-to-multi-analog signal output interface is N, and a first part of at least one single-to-multi-analog signal output interface is each It is connected to a single analog signal supply device, and a second part of the at least one single-to-multi-analog signal output interface is connected to one of the channels provided by the first part of the at least one single-to-multi-analog signal output interface, where M is Positive integer, N is a positive integer greater than or equal to M. In one embodiment, the first part of the at least one single analog signal supply device and the at least one single-to-multiple analog signal output interface are disposed in the measurement main system. In an embodiment, the first part of the at least one single analog signal supply device and the at least one single-to-multi-analog signal output interface is disposed outside the measurement main system.

In one embodiment, at least one single-to-multi-analog signal output interface includes a first channel sub-interface, the first channel sub-interface includes i sub-channels in parallel, and each sub-channel of the first channel sub-interface is connected to a sub-channel. An output unit, a sub-output unit includes a buffer, an amplifier, or a gain shift adjustment circuit, where i is a positive integer greater than or equal to 1. In an embodiment, the first channel sub-interface is further connected to a signal input bus to receive a gain signal or a displacement signal from the outside.

Another object of the present invention is to provide a measurement architecture including: a measurement main system, at least one analog signal supply device, at least one first single-to-multi-analog signal output interface, and at least one second single-to-multi analog signal output. Interface and a device under test. The main measurement system has a test module; at least one analog signal supply device outputs a first analog signal and a second analog signal according to the instruction of the measurement main system; at least one first single-to-multi-analog signal output interface receives The first analog signal and a plurality of channels are provided for synchronous output of the first analog signal; at least one second single-to-multiple analog signal output interface receives the second analog signal and provides a plurality of channels for synchronous output of the second analog signal; The device under test is placed with a plurality of objects to be tested, so that the first part of the object to be tested each receives at least one first analog signal output from one of the channels of the single-to-multiple analog signal output interface, and the wait for measurement Each second part of the object receives at least one second analog signal output from one channel of a second single-to-many analog signal output interface. In this way, the present invention can solve the problem that the timing and analog signals of the objects to be tested are not synchronized, and provide effects such as reducing space required by the system or reducing production costs.

In one embodiment, the first analog signal and the second analog signal are differential signals, and the differential signal is defined as the first analog signal and the second analog signal having the same vibration and different polarities, and the first analog signal The signal is input to the first single-to-multi-analog signal output interface, and the second analog signal is input to the second single-to-multi analog signal output interface in synchronization with the first analog signal.

In an embodiment, each at least one analog signal supply device includes a first single analog signal supply device and a second single analog signal supply device. The first single analog signal supply device outputs the first analog signal, and the second The single analog signal supply device outputs the second analog signal.

In the following, implementation examples and operation principles of the measurement device of the present invention will be described through multiple embodiments. Those with ordinary knowledge in the technical field to which the present invention pertains can understand the features and effects of the present invention through the above-mentioned embodiments, and can combine, modify, replace or divert based on the spirit of the present invention.

The term "connected" as used herein includes aspects such as direct connection or indirect connection, and is not limited. The word "When ...", "... 时" in this article means "present, before or after" and is not limited. In addition, when multiple effects (or elements) are described in the present invention, if the word "or" is used between multiple effects (or elements), it means that the effects (or elements) can exist independently, but it does not exclude multiple effects. (Or elements) can exist simultaneously. In addition, the term "connected" in the present invention means a form including direct connection and wireless connection. Furthermore, the ordinal numbers used in the description, such as "first embodiment", "second embodiment", etc., to modify the embodiments of the present invention, do not themselves imply and represent that the embodiments have any previous ordinal numbers Nor does it represent the order of an embodiment and another embodiment. The use of these ordinal numbers is only used to modify different embodiments, and the invention is not limited to those embodiments.

FIG. 1 is a schematic diagram of a basic architecture of a measurement architecture 1 according to a first aspect or a second aspect of the present invention. As shown in FIG. 1, the measurement architecture 1 includes a measurement main system 10, at least one single analog signal supply device 20, at least one single-to-many analog signal output interface 30, and a device under test 40. The measurement main system 10 may have a test module 12, and the test module 12 may include components required for measurement such as a power supply module (DPS) and / or a pin electronic module (PE), and is not limited thereto. The single analog signal supply device 20 can provide an analog signal (S2) according to the instruction (S1) of the measurement main system 10. The single-to-many analog signal output interface 30 can receive an analog signal (S2) from a single analog signal supply device 20, and provides a plurality of channels (ch) to output the analog signal (S2) synchronously. In addition, this is not a limitation. In a preferred embodiment, the single analog signal supply device 20 includes a memory for storing waveforms, which can adjust the frequency clock period and different gain values to generate voltages in different ranges, such as ± 1V / ± 2V / ± 4V / ± 8V, etc., and can produce outputs with different offset levels, such as + 10V to -10V. Furthermore, the single analog signal supply device 20 includes a digital analog converter (DAC) and a filter, and a processor generates an arbitrary waveform as an output. The above memory and digital analog converter (DAC) and filter (Filter), etc., to adjust the control parameters (such as voltage range, offset value, etc.) of the control, can be connected to the measurement main system 10 to set the control parameters The command (S1) of the synchronization signal is controlled by the measurement main system 10. The device under test 40 may be a carrier on which a plurality of objects to be tested can be placed, and each of the objects to be tested corresponds to one of the channels (ch), so that the objects to be tested respectively receive through the channels (ch ) Analog signal (S2) of one of the channels. In addition, the first aspect refers to the case where the single analog signal supply device 20 and the single-to-multi-analog signal output interface 30 have the same number; the second aspect refers to the single analog signal supply device 20 and the single-to-multi analog signal output interface 30. There are different numbers of cases.

The test module 12, for example, a power supply module (DPS) and / or a pin electronic module (PE), can perform various measurement controls. Since the existing technology has been widely used, it will not be described in detail here. The measurement main system 10 may transmit the information required for measuring the object to be measured, such as timing and signal size, to the single analog signal supply device 20 in a command (S1) manner, so that the single analog signal supply device 20 generates a corresponding signal. Analog signal (S2), but the present invention is not limited to this. In one embodiment, the measurement main system 10 may send a signal (such as a command (S1)) to notify the single analog signal supply device 20 to start generating an analog signal (S2).

A single analog signal supply device 20 may be provided in the main measurement system 10, for example, it may be connected to the main measurement system 10 or integrated in the main measurement system 10, but the measurement module 12 may also be an independent module. It is installed outside the measurement main system 10. The single-to-many analog signal output interface 30 is connected to the output end of the single analog signal supply device 20 to receive the analog signal generated by the single analog signal supply device 20 (S2). The single-to-many analog signal output interface 30 may be disposed in the measurement main system 10, but may also be disposed outside the measurement main system 10.

In one embodiment, the single analog signal supply device 20 and the single-to-multi-analog signal output interface 30 can be implemented to be designed on the same printed circuit board (PCB) to directly provide multi-channel output. In one embodiment, the single analog signal supply device 20 and the single-to-multiple analog signal output interface 30 can also be implemented as a sub-circuit board designed in the measurement main system 10. In one embodiment, the single-to-multi-analog signal output interface 30 can also be implemented as a sub-circuit board external to the measurement main system 10, and the analog signal is introduced by a signal line. It should be noted that the implementation of the present invention is not limited to the above design.

The device under test 40 may have multiple signal input terminals (not shown), and each signal input terminal may be connected to one of the channels (ch) of the single-to-multiple analog signal output interface 30 to receive an analog signal (S2 ). In addition, each signal input end may correspond to a DUT, so that the DUT receives an analog signal (S2) for measurement. Wherein, when each signal input terminal receives the analog signal (S2) synchronously, each DUT can be measured simultaneously, and the present invention is not limited to this.

With the setting of a single-to-multiple analog signal output interface 30, the present invention only needs a single analog signal supply device 20 to simultaneously transmit the analog signal (S2) to a plurality of DUTs, thus saving many costs, and because The source of the analog signal (S2) is the same single analog signal supply device 20, and no timing inconsistency will occur. Next, the detailed structure of the single-to-multi-analog signal output interface 30 will be described in detail.

FIG. 2 is a detailed structure diagram of the single-to-many analog signal output interface 30 of the first aspect or the second aspect of the present invention. As shown in FIG. 2, the single-to-multiple analog signal output interface 30 may include an initial channel sub-interface 30 (a), and the initial channel sub-interface 30 (a) includes i sub-channels 31 connected in parallel, and each sub-channel 31 is connected separately. A sub-output unit 32, where i is a positive integer greater than or equal to 1. In one embodiment, each of the sub-output units 32 may be a buffer, an amplifier, a gain-shift adjustment circuit, or a similar element having a function of outputting a signal. In another embodiment, each of the sub-output units 32 may also be buffered by multiple buffers. And is not limited to this. In one embodiment, the sub-output units 32 in each channel sub-interface (for example, the first-order first-channel sub-interface 30 (a)) are the same components, but they are not limited.

Please refer to FIG. 2 again, the single-to-many analog signal output interface 30 of the present invention may have a multi-level channel sub-interface. In one embodiment, in addition to the primary channel sub-interface 30 (a), the single-to-many analog signal output interface (30) has i secondary channel sub-interfaces 30 (b), each secondary channel sub-interface 30 (b) Each is connected to a sub-output unit 32 of the primary channel sub-interface 30 (a) to receive analog signals from the sub-output unit 32 of the primary channel sub-interface 30 (a), respectively (S2). Each sub-channel sub-interface 30 (b) has j parallel sub-channels 31, where j is a positive integer greater than or equal to 1, and each sub-channel 31 is connected to a sub-output unit 32, respectively.

Further, the single-to-multiple analog signal output interface 30 may further have j third-order channel sub-interfaces 30 (c), each of the third-order channel sub-interfaces 30 (c) and one of the sub-order channel sub-interfaces 30 (b), respectively. The sub-output units 32 are connected to receive analog signals from the sub-output units 32 of the secondary channel sub-interface 30 (b), respectively (S2). Each third-order channel sub-interface 30 (c) has k parallel sub-channels 31, where k is a positive integer greater than or equal to 1, and each sub-channel 31 is connected to a sub-output unit 32, respectively.

Therefore, if the single-to-multi-analog signal output interface 30 has only one primary channel sub-interface 30 (a), when an analog signal (S2) is input to the single-to-multi analog signal output interface 30, the single-to-multi analog signal output is output. The interface 30 can simultaneously output i analog signals (S2). In addition, if the single-to-many analog signal output interface 30 has an initial channel sub-interface 30 (a) (with i sub-channels 31), i secondary-order channel sub-interfaces 30 (b) (each has j sub-channels 31), and j Three third-order channel sub-interfaces 30 (c) (each having k sub-channels 31), then when an analog signal (S2) is input to the single-to-multi-analog signal output interface 30, the single-to-multi-analog signal output interface 30 can be output simultaneously i╳j╳k analog signals (S2). It should be noted that the above-mentioned number of internal components of the single-to-many analog signal output interface 30 is merely an example. In fact, there may be more or less component numbers, and each stage of the sub-channel interface has detailed components. The quantity can also be different and can be arbitrarily matched.

In addition, in an embodiment, the first-order first-channel sub-interface 30 (a), the second-order first-channel sub-interface 30 (b), and the third-order first-channel sub-interface 30 (c) can be connected to an external signal input. The terminal 60, such as a gain signal bus (Gain Bus), a displacement signal bus (Offset Bus), etc., receives a gain signal or a displacement signal from the outside. Therefore, when there is a need to adjust the analog signal (S2) passing through the first-order first-channel sub-interface 30 (a), second-order first-channel sub-interface 30 (b), or third-order channel sub-interface 30 (c), that is, It can be adjusted by external input signal.

Next, various implementation aspects of the measurement architecture 1 of the present invention will be described. For the convenience of explanation, the single-to-many analog signal output interface 30 outputs N analog signals (that is, has N output channels, where N is greater than 1). Positive integer). In addition, if the following embodiment is a case with multiple single-to-many analog signal output interfaces 30, the following embodiment is also based on the example that each single-to-many analog signal output interface 30 outputs N analog signals, but the actual The internal structure of each single-to-multi-analog signal output interface 30 can also be different, which means that each single-to-multi-analog signal output interface 30 can output a different number of analog signals.

FIG. 3 is a detailed architecture diagram of the measurement architecture 1 of the first embodiment (first aspect) of the present invention. As shown in FIG. 3, the measurement architecture 1 of this embodiment has a measurement main system 10, a test module 12, a single analog signal supply device 20, a single-to-multi-analog signal output interface 30, and a device under test. 40. In this embodiment, the test module 12, a single analog signal supply device 20, and a single-to-multi-analog signal output interface 30 are provided in the measurement main system 10. The single analog signal-supply device 20 is connected to the single-to-multi analog signal output. The interface 30 includes a single-to-multi-analog signal output interface 30 having N channels. In addition, N DUTs can be placed on the DUT 40, and each DUT is connected to a channel to receive the analog signal transmitted by the channel (S2). In operation, the measurement main system 10 sends a command (S1) to a single analog signal supply device 20, so that the single analog signal supply device 20 generates an analog signal (S2) and inputs it to the single-to-multiple analog signal output interface 30. The test module 12 of the test main system 10 supplies the digital signals of the power supply module (DPS) and / or the foot electronic module (PE) required for the measurement of N objects to be measured; when the analog signal (S2) passes the single After multi-analog signal output interface 30, it can simultaneously output from N channels to N test objects on the device under test 40. Thus, this embodiment can measure N objects to be measured simultaneously, and since the source of the analog signal (S2) is the same single analog signal supply device 20, the problem of timing inconsistency will not arise; The setting of the analog signal output interface 30 can reduce the number of the single analog signal supply device 20 and greatly reduce the cost.

FIG. 4 is a detailed architecture diagram of a measurement architecture 1 according to a second embodiment (first aspect) of the present invention. As shown in FIG. 4, the measurement architecture 1 of this embodiment has a measurement main system 10, a test module 12, M single analog signal supply devices 20, M single-to-multi analog signal output interfaces 30, and a standby device. Testing device 40, where M may be a positive integer. In this embodiment, M is a positive integer greater than or equal to 1, but the present invention is not limited thereto. In this embodiment, the test module 12, M single analog signal supply devices 20, and M single-to-multi analog signal output interfaces 30 are all set in the measurement main system 10, and each single analog signal supply device 20 has its own A single-to-multi-analog signal output interface 30 is connected. Each single-to-multi-analog signal output interface 30 has N channels. In addition, M╳N test objects can be placed on the device under test 40, and each test object is connected to one of all channels (M╳N channels in total). In operation, the measurement main system 10 sends a command (S1) to each single analog signal supply device 20, so that each single analog signal supply device 20 generates an analog signal (S2) and inputs it to the connected single-to-multiple analog. Signal output interface 30, while the test module 12 of the measurement main system 10 also supplies digital signals of the power supply module (DPS) and pin electronic module (PE) required for the measurement of M╳N objects to be measured; After the analog signal (S2) passes through the single-to-many analog signal output interface 30, N analog signals (S2) can be output from N channels simultaneously, so a total of M╳N analog signals (S2) can be output simultaneously. Since each single analog signal supply device 20 is set in the measurement main system 10, the timings of the generated analog signals (S2) can be consistent, and the measurement timings of M╳N test objects can be consistent. Therefore, in this embodiment, M╳N DUTs can be measured simultaneously, and since M single analog signal supply devices 20 are all set in the same measurement main system 10, no timing will be caused due to external trigger delay. The problem of inconsistency; and by setting the single-to-multiple analog signal output interface 30, the number of single analog signal supply devices 20 can be reduced, and the cost can be greatly reduced.

FIG. 5 is a detailed architecture diagram of a measurement architecture 1 according to a third embodiment (first aspect) of the present invention. As shown in FIG. 5, the measurement architecture 1 of this embodiment has a measurement main system 10, a test module 12, a single analog signal supply device 20, a single-to-multi-analog signal output interface 30, and a device under test. 40. The structure of this embodiment is similar to that of the first embodiment in FIG. 3, so only the differences will be described in detail below. The single analog signal supply device 20 of this embodiment is disposed in the measurement main system 10, and the single-to-multiple analog signal output interface 30 is disposed outside the measurement main system 10. Similar to the operation of the embodiment in FIG. 3, this embodiment can measure N objects to be measured (object 1 to object N) simultaneously, and because the source of the analog signal (S2) is the same single analog signal supply device 20, the problem of timing inconsistency will not occur; and by setting the single-to-multiple analog signal output interface 30, the number of single analog signal supply devices 20 can be reduced, and the cost can be greatly reduced.

FIG. 6 is a detailed architecture diagram of a measurement architecture 1 according to a fourth embodiment (first aspect) of the present invention. As shown in FIG. 6, the measurement architecture 1 of this embodiment has a measurement main system 10, a test module 12, M single analog signal supply devices 20, M single-to-multi analog signal output interfaces 30, and a standby Testing device 40, where M may be a positive integer. In this embodiment, M is a positive integer greater than or equal to 1, but the present invention is not limited thereto. The architecture of this embodiment is similar to that of the second embodiment in FIG. 4, so only the differences will be described in detail below. The test module 12 of this embodiment and M single analog signal supply devices 20 are disposed in the measurement main system 10, and M single-to-multiple analog signal output interfaces 30 are disposed outside the measurement main system 10. Similar to the operation of the embodiment of FIG. 4, this embodiment can measure M╳N objects to be measured (object 1 to object MN), and since M single analog signal supply devices 20 are all set on the same The measurement of the main system 10 does not cause timing inconsistencies due to external trigger delays between each other; and by setting a single-to-multiple analog signal output interface 30, the number of single analog signal supply devices 20 can be reduced, greatly Reduce costs.

FIG. 7 is a detailed architecture diagram of a measurement architecture 1 according to a fifth embodiment (first aspect) of the present invention. As shown in FIG. 7, the measurement architecture 1 of this embodiment has a measurement main system 10, a test module 12, a single analog signal supply device 20, a single-to-multi-analog signal output interface 30, and a device under test. 40. The structure of this embodiment is similar to that of the first embodiment in FIG. 3, so only the differences will be described in detail below. The single analog signal supply device 20 and the single-to-multiple analog signal output interface 30 in this embodiment are disposed outside the measurement main system 10. Similar to the operation of the first embodiment in FIG. 3, this embodiment can simultaneously measure N objects to be measured (object 1 to object N), and since the source of each analog signal (S2) is the same A single analog signal supply device 20 does not cause the measurement timing of the DUT (DUT 1 to D N) to be inconsistent with each other; and by setting the single-to-multiple analog signal output interface 30, the problem can be reduced. The number of single analog signal supply devices 20 significantly reduces costs.

FIG. 8 is a detailed architecture diagram of a measurement architecture 1 according to a sixth embodiment (first aspect) of the present invention. As shown in FIG. 8, the measurement architecture 1 of this embodiment has a measurement main system 10, a test module 12, M single analog signal supply devices 20, M single-to-multi analog signal output interfaces 30, and a standby device. Testing device 40, where M may be a positive integer. In this embodiment, M is a positive integer greater than 1 or equal, but the present invention is not limited thereto. The architecture of this embodiment is similar to that of the second embodiment in FIG. 4, so only the differences will be described in detail below. The M single analog signal supply devices 20 and the M single-to-multi analog signal output interfaces 30 in this embodiment are disposed outside the measurement main system 10. Similar to the operation of the second embodiment in FIG. 4, this embodiment can measure M╳N DUTs (DUT 1 to DUT N) simultaneously, and through a single-to-many analog signal output interface 30 The arrangement can reduce the number of single analog signal supply devices 20 and greatly reduce the cost.

It should be noted that the embodiments shown in FIG. 3 to FIG. 8 are simplified structures of the measurement architecture 1 (first aspect), and the number of components is only an example, which is not a limitation of the present invention.

Although in the embodiment of the first aspect of the measurement architecture 1 described above, the number of the single analog signal supply device 20 and the single-to-multi analog signal output interface 30 are equal, the present invention is not limited thereto. FIG. 9 to FIG. 12 are detailed architecture diagrams of various embodiments of the second aspect of the measurement architecture 1 of the present invention. The embodiment of the second aspect is characterized in that the number of single-to-multi-analog signal output interfaces 30 is greater than the number of single-analog signal supply devices 20, for example, if there are K single-analog signal supply devices 20, single-to-multi-analog signal output The number of the interfaces 30 is greater than K, where K is a positive integer. In addition, the single analog signal supply device 20 is connected to the first part (for example, K) of the single-to-multi analog signal output interfaces 30, and the channels of the single-to-multi analog signal output interface 30 of the first part are each connected to the single-to-multi analog signal. One of the second part of the output interface 30 (the remaining single-to-multi-analog signal output interface 30) is connected.

FIG. 9 is a detailed architecture diagram of a measurement architecture 1 (second aspect) according to a seventh embodiment of the present invention. As shown in FIG. 9, the measurement architecture 1 of this embodiment has a measurement main system 10, a test module 12, a single analog signal supply device 20, and (N + 1) single-to-multi analog signal output interfaces 30. And a device under test 40, in which each single-to-many analog signal output interface 30 can provide N channels (but the present invention is not limited thereto). The test module 12, a single analog signal supply device 20, and (N + 1) single-to-multi analog signal output interfaces 30 are all set in the measurement main system 10, and the single analog signal supply device 20 and one of the single-to-multi analogs The signal output interface 30 is connected, and the N channels of the single-to-multi-analog signal output interface 30 are each connected to one of the remaining N single-to-multi analog signal output interfaces 30. When the measurement main system 10 sends a command to a single analog signal supply device 20, the single analog signal supply device 20 generates an analog signal (S2) to one of the single-to-multiple analog signal output interfaces 30, and then the analog signal (S2) is synchronized The N channels of one single-to-multi-analog signal output interface 30 are output to the remaining N single-to-multi analog signal output interfaces 30, and the synchronous output is again performed through the remaining N single-to-multi analog signal output interfaces 30. Multiple (for example, N╳N) analog signals (S2) to the device under test 40. Accordingly, in this embodiment, N╳N objects to be measured (object 1 to object (N 测 N)) can be measured simultaneously. Since the analog signal (S2) received by each DUT is from the same single analog signal supply device 20, the problem of inconsistent measurement timing between the DUTs does not occur. In addition, in this embodiment, only a single analog signal supply device 20 is required to measure multiple objects to be measured, which can save a lot of costs.

FIG. 10 is a detailed architecture diagram of a measurement architecture 1 (second aspect) of an eighth embodiment of the present invention. As shown in FIG. 10, the measurement architecture 1 of this embodiment includes a measurement main system 10, a test module 12, a single analog signal supply device 20, and (N + 1) single-to-multi analog signal output interfaces 30. And a device under test 40, in which each single-to-many analog signal output interface 30 can provide N channels (but the present invention is not limited thereto). In addition, the single analog signal supply device 20 is connected to one of the single-to-multi-analog signal output interfaces 30. The N channels of the single-to-multi-analog signal output interface 30 are each connected to the remaining N single-to-multi-analog signal output interfaces 30. One connected. The architecture of this embodiment is similar to that of the seventh embodiment in FIG. 9, so only the differences will be described in detail below. The single analog signal supply device 20 of this embodiment is disposed in the measurement main system 10, and the (N + 1) single-to-multiple analog signal output interfaces 30 are disposed outside the measurement main system 10. Similar to the operation of the seventh embodiment in FIG. 9, this embodiment can simultaneously measure N╳N objects to be measured (object 1 to object (N╳N)). Therefore, the analog signal (S2) received by each DUT in this embodiment comes from the same single analog signal supply device 20, and the problem that the timings of the DUTs are not consistent with each other is not generated. In addition, in this embodiment, only a single analog signal supply device 20 is required to measure multiple objects to be measured, which can save a lot of costs.

FIG. 11 is a detailed architecture diagram of a measurement architecture 1 (second aspect) of the ninth embodiment of the present invention. As shown in FIG. 11, the measurement architecture 1 of this embodiment has a measurement main system 10, a test module 12, a single analog signal supply device 20, and (N + 1) single-to-multi analog signal output interfaces 30. And a device under test 40, in which each single-to-many analog signal output interface 30 can provide N channels (but the present invention is not limited thereto). In addition, the single analog signal supply device 20 is connected to one of the single-to-multi-analog signal output interfaces 30. The N channels of the single-to-multi-analog signal output interface 30 are each connected to the remaining N single-to-multi-analog signal output interfaces 30 One connected. The architecture of this embodiment is similar to that of the seventh embodiment in FIG. 9, so only the differences will be described in detail below. The single analog signal supply device 20 of this embodiment and one of the single-to-multi-analog signal output interfaces 30 are provided in the measurement main system 10, and the remaining N single-to-multi-analog signal output interfaces 30 are provided in the measurement main. System 10 is external. Similar to the operation of the seventh embodiment in FIG. 9, this embodiment can simultaneously measure N╳N objects to be measured (object 1 to object (N╳N)). Therefore, the analog signal (S2) received by each DUT in this embodiment comes from the same single analog signal supply device 20, and the problem that the timings of the DUTs are not consistent with each other is not generated. In addition, in this embodiment, only a single analog signal supply device 20 is required to measure multiple objects to be measured, which can save a lot of costs.

FIG. 12 is a detailed architecture diagram of the measurement architecture 1 (second aspect) of the tenth embodiment of the present invention. As shown in FIG. 12, the measurement architecture 1 of this embodiment includes a measurement main system 10, a test module 12, a single analog signal supply device 20, and (N + 1) single-to-multi analog signal output interfaces 30. And a device under test 40, wherein each single-to-multi-analog signal output interface 30 can provide N channels. In addition, the single analog signal supply device 20 is connected to one of the single-to-multi-analog signal output interfaces 30. The N channels of the single-to-multi-analog signal output interface 30 are each connected to the remaining N single-to-multi-analog signal output interfaces 30. One connected. The architecture of this embodiment is similar to that of the seventh embodiment in FIG. 9, so only the differences will be described in detail below. The single analog signal supply device 20 of this embodiment, one of the single-to-multi-analog signal output interfaces 30 and the remaining N single-to-multi-analog signal output interfaces 30 are all disposed outside the measurement main system 10. Similar to the operation of the seventh embodiment in FIG. 9, this embodiment can simultaneously measure N╳N objects to be measured (object 1 to object (N╳N)). Therefore, the analog signal (S2) received by each DUT in this embodiment comes from the same single analog signal supply device 20, and the problem that the timings of the DUTs are not consistent with each other is not generated. In addition, in this embodiment, only a single analog signal supply device 20 is required to measure multiple objects to be measured, which can save a lot of costs.

It should be noted that the embodiments of FIGS. 9 to 12 are simplified structures of the measurement architecture 1 (second aspect), and the number of components is only an example, and is not a limitation of the present invention.

In addition to the first aspect and the second aspect described above, the present invention may have other variations. FIG. 13 is a detailed architecture diagram of the measurement architecture 1 of the eleventh embodiment (third aspect) of the present invention.

As shown in FIG. 13, the measurement architecture 1 of this embodiment includes a test module 12, a first analog signal supply device 20-1, a second analog signal supply device 20-2, and a many-to-many analog signal output. The interface 70 and a device under test 40. The test module 12 and the device under test 40 are similar to the previous embodiment, so they will not be described in detail. The first analog signal supply device 20-1 and the second analog signal supply device 20-2 may be the same device, each receiving a command from the measurement main system 10 to generate a first analog signal (S2-1) and a first analog signal, respectively. Second analog signal (S2-2). In an embodiment, the first analog signal (S2-1) and the second analog signal (S2-2) may be the same analog signal, and respectively input different channels of the multi-to-multi analog signal output interface 70 (in this case) (It can also be implemented by a single analog signal supply device 20). In another embodiment, the first analog signal (S2-1) and the second analog signal (S2-2) can be different analog signals, for example, they can form differential signals with each other, and input many-to-many analog signals respectively. The different channels of the output interface 70 are not limited. In one embodiment, the first analog signal supply device 20-1 and the second analog signal supply device 20-2 may be integrated together, but are not limited.

The many-to-many analog signal output interface 70 may have a first single-to-multi-analog signal output interface 30-1 and a second single-to-multi-analog signal output interface 30-2. The first single-to-multi-analog signal output interface 30-1 is connected to the first analog-to-analog signal supply device 20-1 to receive the first analog signal (S2-1); the second single-to-multi-analog signal output interface 30-2 and the first The second analog signal supply device 20-2 is connected to receive the second analog signal (S2-2). The first single-to-many analog signal output interface 30-1 can provide (N1) channels to synchronously output the first analog signal (S2-1) to (N1) objects under test on the device under test 40 so that (N1) simultaneous measurement of DUTs, where N1 is a positive integer greater than or equal to 1; the second single-to-many analog signal output interface 30-2 can provide (N2) channels to convert the second analog signal (S2- 2) Synchronously output (N2) objects to be tested on the device under test 40 to make the (N2) objects to be measured synchronously, where N2 is a positive integer greater than or equal to 1. In one embodiment, N1 and N2 may be the same or different, but the present invention is not limited. Since the present embodiment can support multiple signal inputs, the many-to-many analog signal output interface 70 can be applied to the case of a single analog signal or a differential signal, making measurement more flexible. For example, in one embodiment, the first analog signal (S2-1) and the second analog signal (S2-2) may be signals with the same vibration and different polarities, and are respectively input to the first single-to-multi-analog signal. Signal output interface 30-1 and second single-to-many analog signal output interface 30-2; and when the first analog signal (S2-1) and the second analog signal (S2-2) are simultaneously input to the many-to-many analog signal output interface At 70 o'clock, it can be like entering a differential signal, but it is not limited to this. In another embodiment, the first analog signal (S2-1) and the second analog signal (S2-2) may be the same signal and input to the first single-to-multi-analog signal output interface 30-1 and the second single The multi-analog signal output interface 30-2 outputs more signals through the first single-to-multi analog signal output interface 30-1 and the second single-to-multi analog signal output interface 30-2. In another embodiment, the signal may be input only to one of the first single-to-multi-analog signal output interface 30-1 and the second single-to-multi-analog signal output interface 30-2, but it is not limited. In another embodiment, the first analog signal (S2-1) and the second analog signal (S2-2) may be signals with the same polarity but different vibrancy, or they may be input to the first unit without synchronization. The multi-analog signal output interface 30-1 and the second single-to-multi analog signal output interface 30-2.

It should be noted that the embodiment of FIG. 13 is a simplified architecture of the measurement architecture 1 (third aspect), and the number of components is only an example, which is not a limitation of the present invention.

FIG. 14 is a detailed structural diagram of a many-to-many analog signal output interface 70 according to a third aspect of the present invention, and reference may be made to FIG. 2. As shown in FIG. 14, the many-to-many analog signal output interface 70 may include a first single-to-many analog signal output interface 30-1 and a second single-to-many analog signal output interface 30-2. The structure of the first single-to-many analog signal output interface 30-1 may be similar to the structure of the first single-to-many analog signal output interface 30 in FIG. 2, for example, it may include one of i sub-channels 31 and i sub-output units in parallel. First-order first channel sub-interface 30 (a), i sub-order channel sub-interfaces 30 (b) with j sub-channels 31 and j sub-output units in parallel, and j sub-channels with k sub-channels 31 and k sub-output units Third-order channel sub-interface 30 (c) to output i╳j╳k first analog signals (S2). Similarly, the second single-to-multi-analog signal output interface 30-2 may also include a primary channel sub-interface 30 (a) with i sub-channels 31 and i sub-output units in parallel, j sub-channels 31 in parallel, and i sub-order first channel sub-interfaces 30 (b) of j sub-output units and j third-order channel sub-interfaces 30 (c) having k sub-channels 31 and k sub-output units connected in parallel to output i╳j╳ k second analog signals (S2 '). It should be noted that the number of internal components of the first single-to-multi-analog signal output interface 30-1 and the second single-to-multi-analog signal output interface 30-2 described above are only examples, and there may actually be more or less The number of components, and the number of detailed components in each stage of the sub-channel interface can also be different, and can be arbitrarily matched.

Although the first single-to-multi-analog signal output interface 30-1 and the second single-to-multi-analog signal output interface 30-2 in this embodiment have the same internal structure, in other embodiments, the first single-to-multi-analog signal output interface 30-2 has the same internal structure. The signal output interface 30-1 and the second single-to-many analog signal output interface 30-2 may also have different structures. For example, the number of sub-channel interfaces may be different, but not limited.

In addition, the first single-to-multi-analog signal output interface 30-1 and / or the second single-to-multi-analog signal output interface 30-2 has a first-order first-channel sub-interface 30 (a) and a second-order first-channel sub-interface 30 (b) The third-order first-channel sub-interface 30 (c) can be further connected to an external signal input terminal 60, such as a gain signal bus (Gain Bus), a displacement signal bus (Offset Bus), etc. Gain signal or a displacement signal. Therefore, when there is a need to adjust the primary channel sub-interface 30 (a) and the secondary channel sub-channel through the first single-to-multi-analog signal output interface 30-1 and / or the second single-to-multi-analog signal output interface 30-2. The analog signal (S2) of the interface 30 (b) or the third-order channel sub-interface 30 (c) can be achieved by externally inputting a signal.

In this way, the present invention can solve the problem that the timing and analog signals of the objects to be tested are not synchronized, and provide a reduction in the number of expensive single analog signal providing devices, so as to reduce the space required for measuring the main system or reduce production costs. . In addition, the present invention can also easily adjust the structure of the analog signal output interface according to the measurement needs, and then adjust the content of the output analog signal. Furthermore, the analog signal output interface of the present invention can also respond to the input of multiple signal sources, and can output more diverse signals to the test object.

The above embodiments are merely examples for the convenience of description. The scope of the claimed rights of the present invention should be based on the scope of the patent application, rather than being limited to the above embodiments.

1‧‧‧ measurement architecture

32‧‧‧Sub output unit

10‧‧‧ main measurement system

60‧‧‧External signal input

20‧‧‧Single analog signal supply device

20-1‧‧‧The first analog signal supply device

30‧‧‧Single-to-many analog signal output interface

20-2‧‧‧Second Analog Signal Supply Device

40‧‧‧device under test

S2-1‧‧‧The first analog signal

12‧‧‧test module

S2-2‧‧‧ Second Analog Signal

S1‧‧‧Command

70‧‧‧Many-to-many analog signal output interface

S2‧‧‧ analog signal

30-1‧‧‧The first single-to-many analog signal output interface

ch‧‧‧channel

30-2‧‧‧Second single-to-many analog signal output interface

30 (a) ‧‧‧Elementary Channel Sub-Interface

30 (b) ‧‧‧th-order channel sub-interface

30 (c) ‧‧‧third-order channel sub-interface

31‧‧‧Sub-channel

FIG. 1 is a schematic diagram of a basic structure of a measurement architecture of a first aspect or a second aspect of the present invention; FIG. 2 is a detailed structural schematic diagram of a single-to-many analog signal output interface of the first aspect or the second aspect of the present invention; FIG. 3 is a detailed architecture diagram of a measurement architecture of a first embodiment (first aspect) of the present invention; FIG. 4 is a detailed architecture diagram of a measurement architecture of a second embodiment (first aspect) of the present invention; Detailed architecture diagram of the measurement architecture of the third embodiment (first aspect) of the invention; FIG. 6 is a detailed architecture diagram of the measurement architecture of the fourth embodiment (first aspect) of the invention; FIG. 7 is a fifth embodiment of the invention Example (first aspect) detailed architecture diagram of the measurement architecture; Figure 8 is a detailed architecture schematic diagram of the sixth embodiment (first aspect) of the measurement architecture of the present invention; Figure 9 is a measurement embodiment of the seventh embodiment of the present invention Detailed schematic diagram of the architecture (second aspect); FIG. 10 is a detailed structural diagram of the measurement architecture (second aspect) of the eighth embodiment of the present invention; FIG. 11 is a measurement architecture of the ninth embodiment of the present invention ( (Second aspect) a detailed architecture diagram; FIG. 12 is a tenth embodiment of the present invention FIG. 13 is a detailed structural schematic diagram of a measurement architecture of an eleventh embodiment (third aspect) of the present invention; FIG. 14 is a detailed architectural schematic diagram of a third aspect of the present invention; Detailed structure diagram of many-to-many analog signal output interface.

Claims (13)

A measurement architecture includes: a measurement main system with a test module; at least a single analog signal supply device to output an analog signal according to a command of the measurement main system; at least a single-to-multi-analog signal output interface Receiving the analog signal from the single analog signal supply device, and providing a plurality of channels to output the analog signal synchronously; and a device under test for placing a plurality of objects to be tested, so that the waiting objects receive and pass each The analog signal of one of the channels of the at least one single-to-multiple analog signal output interface. The measurement architecture according to item 1 of the scope of the patent application, wherein the number of the at least one single analog signal supply device is M, the number of the at least one single-to-many analog signal output interface is M, and each single analog The signal supply device is connected to a single-to-many analog signal output interface, where M is a positive integer. The measurement architecture according to item 2 of the scope of patent application, wherein the at least one single analog signal supply device and the at least one single-to-many analog signal output interface are disposed in the measurement main system. According to the measurement architecture described in item 2 of the patent application scope, wherein the at least one single analog signal supply device is provided in the measurement main system, and the at least one single-to-multi-analog signal output interface is provided in the measurement main. Outside the system. According to the measurement architecture described in item 2 of the patent application scope, wherein the at least one single analog signal supply device is provided and the at least one single-to-many analog signal output interface is provided outside the measurement main system. The measurement framework according to item 1 of the scope of patent application, wherein the number of the at least one single-to-many analog signal output interface is greater than the number of the at least one single-to-analog signal supply device, and the at least one single-to-many analog signal output A first part of the interface is each connected to a single analog signal supply device, and a second part of the at least one single-to-multi-analog signal output interface is each connected to the first part of the at least one single-to-multi analog signal output interface. One of the plurality of channels provided is connected. The measurement architecture according to item 6 of the scope of the patent application, wherein the at least one single analog signal supply device and the first part of the at least one single-to-multiple analog signal output interface are disposed in the measurement main system. The measurement architecture according to item 6 of the scope of patent application, wherein the at least one single analog signal supply device and the first part of the at least one single-to-multiple analog signal output interface are disposed outside the measurement main system. According to the measurement structure described in the first item of the patent application scope, at least one single-to-multi-analog signal output interface includes a first channel sub-interface, the first channel sub-interface includes i sub-channels connected in parallel, and the first Each sub-channel of the channel sub-interface is connected to a sub-output unit, which includes a buffer, an amplifier, or a gain shift adjustment circuit, where i is a positive integer greater than or equal to 1. The measurement architecture according to item 9 of the patent application scope, wherein the first channel sub-interface is further connected to an external signal input terminal (bus) to receive a gain signal or a displacement signal from the outside. A measurement architecture includes: a measurement main system having a test module; at least one analog signal supply device to output a first analog signal and a second analog signal according to a command of the measurement main system; at least one A first single-to-many analog signal output interface, receiving the first analog signal from the at least one analog signal supply device, and providing a plurality of channels to synchronously output the first analog signal; at least one second single-to-multi analog signal An output interface for receiving the second analog signal from the at least one analog signal supply device, and providing a plurality of channels to output the second analog signal synchronously; and a device under test for placing a plurality of objects under test for the device The first part of the waiting object receives the first analog signal output from one of the channels of the at least one first one-to-many analog signal output interface, and the second part of the waiting object each Receiving the output from one of the channels of the at least one second single-to-many analog signal output interface The second analog signal. The measurement structure according to item 11 of the scope of patent application, wherein the first analog signal and the second analog signal are differential signals, and the differential signal is defined as that the first analog signal and the second analog signal have the same Zhenfu has different polarities, and the first analog signal is input to the first single-to-multi analog signal output interface, and the second analog signal is synchronized to the first analog signal and input to the second single-to-multi analog signal output interface. . The measurement architecture according to item 11 of the scope of patent application, wherein each of the at least one analog signal supply device includes a first single analog signal supply device and a second single analog signal supply device, the first single analog signal supply The supply device outputs the first analog signal, and the second single analog signal supply device outputs the second analog signal.