TW201903964A - Pre-spacer self-aligned slit formation - Google Patents

Abstract

Methods of forming self-aligned cuts and structures formed with self-aligned cuts are disclosed. A dielectric layer is formed on a metal hardmask layer, and a mandrel is formed on the dielectric layer. A cut is formed that extends through the dielectric layer to the metal hardmask layer. A section of a metal layer is formed on an area of the metal hardmask layer exposed by the cut in the dielectric layer. After the metal layer is formed, a spacer is formed on a vertical sidewall of the mandrel.

Description

   Pre-spacer self-aligned cut formation   

The present invention relates to integrated circuit and semiconductor device fabrication, and more specifically, to a method of forming a self-aligned cut and a structure formed with a self-aligned cut.

The back-end-of-line (BEOL) interconnect structure can be used to connect the device structures produced by the substrate during the front-end-of-line (FEOL) process to each other and to the external environment of the wafer . The self-aligned patterning process used to form the BEOL interconnect structure is about mandrels that establish feature pitch as sacrificial features. The sidewall spacer has a smaller thickness than that allowed by the current grounding rules for optical lithography, and is formed adjacent to the vertical sidewall of the mandrel. After the mandrel is selectively removed, the sidewall spacer is used as an etching mask for etching the underlying hard mask, for example, through a directional reactive ion etch (RIE) procedure. Unmasked features in the pattern are transferred from the hard mask to the dielectric layer to define trenches formed by wires with BEOL interconnects.

Cutting masks and etching can be used to make cuts in the mandrel to cut through the mandrels and define gaps that are subsequently used to form adjacent wires that are spaced from their tips with tip-to-tip spacing. The pattern reflecting the notch mandrels can be transferred to the hard mask, and then transferred from the hard mask to the patterned dielectric layer. Non-mandrel cuts can also be formed in the hard mask itself, and are filled with dielectric material when forming the sidewall spacers. These non-mandrel cuts are also transferred to the hard mask, and then transferred from the hard mask to the patterned dielectric layer. The mandrel and non-mandrel cuts are filled with a dielectric material of a patterned dielectric layer to fill the gaps and provide electricity between the tips of the wires facing each other across the gaps isolation.

There is a need for improved methods of forming self-aligned cuts and structures with self-aligned cuts.

In a specific embodiment of the invention, a method includes: forming a dielectric layer on a metal hard mask layer, forming a mandrel on the dielectric layer, and forming a metal hard mask extending through the dielectric layer The incision of the cover. A section of the metal layer is formed on the area of the metal hard mask layer exposed by the cut in the dielectric layer. After forming the metal layer, spacers are formed on the vertical side walls of the mandrel.

In a specific embodiment of the invention, a structure includes a metallization level having a trench and an electric wire located in the trench. The electric wire includes a planar side wall and a tab protruding outward from the side wall.

10,14‧‧‧Dielectric layer

11‧‧‧Dielectric hard mask

12‧‧‧hard mask layer

13,15‧‧‧Top surface

16,18,20‧‧‧mandrel

17‧‧‧Vertical side wall

22‧‧‧Mandrel cutting mask

24,26‧‧‧Spindle incision

28‧‧‧Non-mandrel cutting mask

30,32‧‧‧non-mandrel notch

34,36,38,40 ‧‧‧

42‧‧‧Mask layer

44‧‧‧Side wall spacer

45‧‧‧End

46‧‧‧Groove

51,53,55,57,59,61,63 ‧‧‧ end

52,54,56,58,60,62 ‧‧‧ wire

64‧‧‧Wire or tab

65,67‧‧‧side wall

66‧‧‧tab

70‧‧‧Narrow section

72‧‧‧wide section

t‧‧‧thickness

W1, W2‧‧‧Width

The drawings are incorporated in and constitute a part of this specification, depicting various specific embodiments of the present invention, together with the above general description of the present invention, and the following detailed description of specific embodiments provided for the purpose of explanation Specific embodiments of the invention.

Figure 1 is a top view of a structure at the initial manufacturing stage of a processing method according to a specific embodiment of the present invention.

FIG. 1A is a cross-sectional view of the structure of FIG. 1 taken generally along the line 1A-1A shown in FIG. 1.

FIGS. 2 to 8 and FIGS. 2A to 8A are a plan view and a cross-sectional view of the structure at the subsequent manufacturing stage of the processing method following FIGS. 1 and 1A, respectively.

FIG. 9 is a plan view of a structure at the manufacturing stage following FIG. 1 of the processing method according to a specific embodiment of the present invention.

FIG. 9A is a cross-sectional view of the structure of FIG. 9 taken generally along line 9A-9A shown in FIG. 9.

FIGS. 10 to 14 and FIGS. 10A to 14A are respective plan views and cross-sectional views of the structure at the subsequent manufacturing stage of the processing method following FIGS. 9 and 9A.

Please refer to FIG. 1 and FIG. 1A, and according to a specific embodiment of the present invention, the dielectric layer 10 is processed according to a processing method to form a metallized interconnect structure. The dielectric layer 10 may be composed of an electrically insulating dielectric material, such as hydrogen-rich silicon oxycarbide (SiCOH) generated from an octamethylcyclotetrasiloxane (OMCTS) precursor, or another type of low-k dielectric Electrical materials. The dielectric layer 10 may be located on a substrate, which includes a device structure made by front-end (FEOL) processing to form an integrated circuit. The dielectric hard mask 11 is located on the top surface of the dielectric layer 10. The dielectric hard mask 11 may be composed of a dielectric material such as silicon dioxide (SiO ₂ ) deposited by chemical vapor deposition (CVD).

The hard mask layer 12 is located on the top surface of the dielectric hard mask 11. The hard mask layer 12 may be composed of a metal such as titanium nitride (TiN) deposited by physical vapor deposition (PVD). The hard mask layer 12 can be removed from the dielectric hard mask 11 in a manner that is selective to the material of the dielectric hard mask 11. A dielectric layer 14 is formed on the hard mask layer 12. The dielectric layer 14 may be composed of a dielectric material deposited by CVD such as silicon nitride (si ₃ N ₄ ). The dielectric layer 14 can be removed from the hard mask layer 12 in a manner that is selective to the material of the hard mask layer 12. The term "selectivity" refers to a material removal procedure (eg, etching) as used herein, which means that the material removal rate (ie, etching rate) of the target material is higher than the material removal rate of at least another material undergoing the material removal procedure Divide rate (ie etch rate).

Mandrels 16, 18, 20 are formed on the top end surface 15 of the dielectric layer 14. The mandrels 16, 18, 20 can be formed in parallel by depositing a blanket layer of material on the entire top surface 15 of the dielectric layer 14, and patterning the blanket layer by photolithography and etching using a photolithography stack. For example, a sidewall image transfer (SIT) procedure or a self-aligned double patterning (SADP) procedure can be used to pattern the mandrels 16, 18, 20. The mandrels 16, 18, 20 may be composed of silicon such as amorphous silicon deposited by CVD at a low temperature. The mandrels 16, 18, 20 have vertical side walls 17 that protrude perpendicularly with respect to the top surface 15 of the dielectric layer 14.

Please refer to FIG. 2 and FIG. 2A, where the similar reference symbol refers to the similar features in FIG. 1 and FIG. 1A, and in the subsequent manufacturing stage, a mandrel cut is formed on the top surface 15 of the dielectric layer 14 Mask 22 and pattern the mandrel cut mask. The mandrel cutting mask 22 may include an organic planarization layer (OPL) material coated on the top surface 15 of the dielectric layer 14 by spin coating. The mandrel cutting mask 22 may be patterned using photolithography to define an opening at a desired location of the narrow mandrel cut 24 that penetrates the mandrel 20 and the larger mandrel cut 26 that penetrates the mandrel 18. The shape of the mandrel cutout 26 can be optimized using optical proximity correction (OPC) as a lithography enhancement technique when forming the mandrel cut mask 22.

The mandrel cutouts 24, 26 are formed in the mandrels 18, 20 using procedures such as reactive ion etching (RIE) to remove the material of the mandrels 18, 20 from areas that are not masked by the mandrel cutting mask 22. The etching process can also remove the dielectric material of the dielectric layer 14 with the openings above the area in the mandrel cutting mask 22 and terminate on the material of the hard mask layer 12. The mandrel cuts 24, 26 remove the respective sections of the mandrels 18, 20 and the exposed area of the hard mask layer 12 above the opening in the mandrel cutting mask 22 used to form the mandrel cuts 24, 26. The mandrel cut 24 is then used to make a narrow tip-to-tip cut in the subsequently formed wire, and the mandrel cut 26 is used to make a larger area cut feature. The width of the mandrel cutout 26 may be less than or equal to the sum of the width of the mandrel 18 and twice the width of the subsequently formed spacer.

Please refer to Figure 3 and Figure 3A, where the similar reference symbol refers to the similar features in Figure 2 and Figure 2A, and in the subsequent manufacturing stage, the mandrel cutting mask 22 is removed by a cleaning process, And a non-mandrel cutting mask 28 is formed on the top end surface 15 of the dielectric layer 14. The non-mandrel cutting mask 28 may include an organic planarization layer (OPL) material coated on the top surface 15 of the dielectric layer 14 by spin coating. The non-mandrel cutting mask 28 can be patterned using photolithography to narrow the non-mandrel cutout 30 between the mandrel 16 and the mandrel 18 in the dielectric layer 14 and between the mandrel in the dielectric layer 14 The intended location of the wider non-mandrel cut 32 between 18 and mandrel 20 defines the opening. The non-mandrel cuts 30, 32 can be formed in the dielectric layer 14 using an etching process such as reactive ion etching (RIE) to remove the material of the dielectric layer 14 from areas not masked by the non-mandrel cutting mask 28 . The non-mandrel cuts 30, 32 remove various sections of the dielectric layer 14. The non-mandrel notch 30 is used later to make a notch with a narrow tip-to-tip spacing between the electric wires formed to be connected to the notched mandrel 20, and the mandrel notch 26 is used to apply a larger Large incision. Passing through the non-mandrel cuts 30, 32 exposes the area of the hard mask layer 12.

Please refer to FIG. 4 and FIG. 4A, where similar reference symbol refers to similar features in FIG. 3 and FIG. 3A, and in the subsequent manufacturing stage, the non-mandrel cutting mask 28 is removed by a cleaning process. Sections 34, 36, 38, 40 of the mask layer 42 are formed on the respective areas on the top surface 13 of the hard mask layer 12, which are formed into mandrel cuts 24, 26 and non-mandrel cuts At 30 and 32, it is revealed by removing the dielectric layer 14. The sections 34, 36 of the mask layer 42 are formed on the respective areas of the hard mask layer 12 exposed by the mandrel cuts 24, 26, while the hard exposed by the non-mandrel cuts 30, 32 Sections 38 and 40 of the mask layer 42 are formed on the respective regions of the mask layer 12. The mask layer 42 is formed first, and then the mandrels 16 and 18 are pulled.

The sections 34, 36, 38, 40 of the mask layer 42 have outer perimeters that match the boundaries at the inner edges of the mandrel cuts 24, 26 and the non-mandrel cuts 30, 32. The patterned dielectric layer 14 forms a template for the sections 34, 36, 38, 40 forming the mask layer 42. In a specific embodiment, the mask layer 42 may have a thickness smaller or equal to the thickness t of the dielectric layer 14.

The section 34 of the mask layer 42 has a width W1 greater than the width W2 of the mandrel 18. Similarly, the section 36 of the mask layer 42 has a width W1 greater than the width W2 of the mandrel 20. These width differences then manifest themselves when the hard mask layer 12 is patterned by etching, and then when the dielectric layer 10 is subsequently etched using the patterned hard mask layer 12.

The mask layer 42 can be selectively deposited so that its material builds up and forms on the surface of the hard mask layer 12 to produce sections 34, 36, 38, 40, but it cannot be placed on non-manufacturers such as the mandrel 16 and dielectric layer 14 Aggregation and formation on the top surface of metal objects. By treating the surface area exposed by patterning the upper dielectric layer 14 by the hard mask layer 12, selective deposition can be promoted. The mask layer 42 may be composed of a metal deposited by low temperature CVD or by atomic layer deposition (ALD). In a specific embodiment, the mask layer 42 may be composed of ruthenium (Ru) formed by CVD or ALD using volatile metal precursors of ruthenium. In a specific embodiment, the mask layer 42 may be composed of cobalt (Co) formed by CVD or ALD using a volatile metal precursor of cobalt. In a specific embodiment, the mask layer 42 may be composed of copper (Cu) formed by electroless plating.

Please refer to FIG. 5 and FIG. 5A, where similar reference element symbols refer to similar features in FIG. 4 and FIG. 4A, and in the subsequent manufacturing stage, the top surface 15 of the dielectric layer 14 and the mandrel 16, The side wall spacers 44 are formed at positions adjacent to the vertical side walls of 18 and 20 and at the end 45 of the mandrel 18 where the mandrel cutout 24 is located. The spacer 44 is formed after the mandrel cuts 24, 26 and the non-mandrel cuts 30, 32 are performed. The sidewall spacer 44 may be formed by depositing a conformal layer composed of a dielectric material such as silicon dioxide (SiO ₂ ), and shaping the conformal layer by an anisotropic etching process such as reactive ion etching (RIE) form. In view of the dielectric material left as the sidewall spacer 44, the anisotropic etching process preferentially removes the dielectric material from the horizontal surface, such as the dielectric layer 14, the mandrel 16, 18, 20, and the mask layer 42 Top surface of sections 34, 36, 38, 40. The materials constituting the sidewall spacers 44 can be selected to be selective for the materials of the dielectric layers 14, mandrels 16, 18, 20, and the sections 34, 36, 38, 40 of the mask layer 42 Removed by the given etching chemistry. The sidewall spacer 44 may be composed of a dielectric material such as silicon dioxide (SiO ₂ ) deposited by atomic layer deposition (ALD).

The sidewall spacer 44 has a width W3 that is nominally equal to the thickness of the etched conformal layer. The sidewall spacer 44 completely or completely covers the section 34 of the mask layer 42 so that the section 34 is buried under the spacer 44 and vertically interposed between the spacer 44 and the hard mask layer 12. The upper sidewall spacer 44 of the cut end of the mandrel 18 only partially covers the section 36 of the mask layer 42. The length of the section 36 of the mask layer 42 is obtained by subtracting the width of the spacer 44 on the end 45 of the mandrel 18 from the corresponding size of the mandrel cutout 26 in the dielectric layer 14 and a mandrel (not shown) The width of the space at the end of the shown) is set, if any, the mandrel has an end from the end 45 across the mandrel cut 26. Similarly, the sidewall spacer 44 partially covers the sections 38, 40 of the mask layer 42 above the respective side edges of the non-mandrel cuts 30, 32.

Please refer to Figure 6 and Figure 6A, where the similar reference symbol refers to the similar features in Figure 5 and Figure 5A, and in the subsequent manufacturing stage, using an etching process with appropriate etching chemistry, using The materials of the electrical layer 14, the sections 34, 36, 38, 40 of the mask layer 42, and the sidewall spacers 44 have selective ways to remove the mandrels 16, 18, 20. The top surface 15 exposes the top surface 15 of the dielectric layer 14 above the area exposed when the mandrels 16, 18, 20 are pulled up.

The sections 34, 36, 38, 40 of the mask layer 42 and the sidewall spacers 44 cover the area of the top surface 15 of the dielectric layer. The section 34 of the mask layer 42 is buried under the material of the side wall spacer 44 which completely or completely fills the incision between the respective ends or tips of the two mandrel segments due to the incision mandrel 18 twenty four. The spacer 44 partially but not completely covers the other sections 36, 38, 40 of the mask layer 42.

Please refer to Figure 7 and Figure 7A, where the similar reference symbol refers to the similar features in Figure 6 and Figure 6A, and in the subsequent manufacturing stage, the mandrel 16, 18, 20 is removed after the etching process The dielectric layer 14 is patterned. The etching process operates the sidewall spacers 44 and the sections 34, 36, 38, and 40 of the mask layer 42 as an etching mask. The etching process for opening the dielectric layer 14 may use an etching Chemically, it removes the material of the dielectric layer 14 that is not covered by the sidewall spacers 44 and the sections 34, 36, 38, 40 of the mask layer 42. After the etching process is completed, the section of the dielectric layer 14 is located vertically between the sidewall spacer 44 and the hard mask layer 12. The sections 34, 36, 38, 40 of the mask layer 42 are in direct contact with the hard mask layer 12 because the dielectric layer 14 is patterned when the mask layer 42 is formed in the earlier manufacturing stage of the processing method.

Next, the sidewall spacer 44 and the sections 34, 36, 38, and 40 of the mask layer 42 are operated as an etch mask by an etching process to pattern the hard mask layer 12. The etching process may use etching chemistry, a method that is selective to the sidewall spacers 44 and the mask layer 42, and a dielectric hard mask 11 that operates as an etching stop when patterning the hard mask layer 12 The material of the hard mask layer 12 is removed in a selective manner. The sections of the hard mask layer 12 are retained and retained during their etching into elongated strips over the area covered by the sidewall spacer 44. The sections of the hard mask layer 12 are also retained and retained during their etching over the area covered by the sections 34, 36, 38, 40 of the mask layer 42.

Subsequently, the dielectric hard mask 11 and the dielectric layer 10 are etched to form trenches 46 in the dielectric layer 10, but those areas where the dielectric layer 10 is masked by the hard mask layer 12 and protected from etching removal except. The masked areas on the dielectric layer 10 are based on the complementary areas covered by the sections 34, 36, 38, 40 of the mask layer 42 and the sidewall spacers 44 by the patterning of the hard mask layer 12 determination. The groove 46 is located in an unmasked area.

Please refer to FIG. 8 and FIG. 8A, where the similar reference symbol refers to the similar features in FIG. 7 and FIG. 7A, and in the subsequent manufacturing stage, after etching the dielectric layer 10, the section of the mask layer 42 34, 36, 38, 40, sidewall spacers 44, and hard mask layer 12 can be removed by one or more etching or cleaning procedures. The trench 46 (FIG. 7, FIG. 7A) in the dielectric layer 10 is filled with a conductor to form wires 52, 54, 56, 58, 60, 62. A liner composed of titanium (Ti), titanium nitride (TiN), tantalum (Ta), tantalum nitride (TaN), or a layered combination of these materials (such as double-layer Ti / TiN) (not shown) ) Applied to the trenches, and then filled with metal. The wires 52, 54, 56, 58, 60, 62 may be composed of low-resistivity conductors formed using a deposition process, such as metals formed by electroplating or electroless deposition, such as copper (Cu).

The shapes and geometric shapes of the wires 52, 54, 56, 58, 60, 62 reproduce the shapes and geometric shapes of the patterned features in the hard mask layer 12 through the segments 34, 36, 38 of the mask layer 42, The shape and geometry of 40 and the shape and geometry of sidewall spacer 44 are determined. The adjacent pairs of wires 52, 54, 56, 58, 60, 62 are separated from each other by sections of the electrical insulator of the dielectric layer 10. When the dielectric layer 10 is etched, these sections of the dielectric layer 10 are masked by the strips of the hard mask layer 12 where they pass the sections 34, 36, 38, 40 of the mask layer 42 and the sidewall spacers 44 During patterning, the strips remain above the masked area of the hard mask layer 12.

The dielectric material of the dielectric layer 10 in the non-mandrel cut 30 separates the end 51 of the wire 52 from the end 53 of the wire 54. Similarly, the dielectric material of the dielectric layer 10 located in the mandrel cutout 24 separates the end 59 of the wire 60 from the end 61 of the wire 62. In a representative embodiment, the spacers 44 formed on the ends 59, 61 fill the tip-to-tip gap between the ends 59, 61. In a representative embodiment, the tip-to-tip distance between the end 59 of the electric wire 58 and the end 61 of the electric wire 60 is plotted to be less than or equal to twice the width of the side wall spacer 44 so that the cutout 24 The spacer material is completely filled, and the section 34 of the mask layer 42 is covered. However, the tip-to-tip distance between the end 59 and the end 61 may be greater than twice the width of the sidewall spacer 44 because the section 34 of the mask layer 42 will span the sidewall on the end 59 Any open gap between the spacer 44 and the spacer 44 on the end 61 masks the dielectric layer 10.

The dielectric material of the dielectric layer 10 adjacent to the end 57 of the wire 58 fills the non-mandrel cut 32, which has a larger area than the mandrel cut 30. The dielectric material of the dielectric layer 10 also fills the mandrel cut 26, which has a larger area than the mandrel cut 24, adjacent to the end 55 of the wire 56. The mandrel notch 26 may be larger than the conventional mandrel notch because the length of the section 36 of the mask layer 42 is defined to be tip-to-tip between the end 55 of the wire 56 and the end 55 having the end and the wire 56 The tip-to-tip distance between any adjacent wires (not shown) configured. The size of the mandrel cutout 26 is not limited by the width of the spacer 44.

In a representative embodiment, the width of the mandrel cutout 26 may be less than the sum of the width of the mandrel 18 and twice the width of the spacer 44 that is subsequently formed. Therefore, the wires 54 and 58 and the etched grooves forming these wires 54 and 58 will have respective appendages or tabs 64, 66 that protrude inward from each other. The electric wire 54 may have a vertical side wall 65 having a planar shape, and the tab 64 protrudes outward from the side wall 65 of the electric wire 54 to interrupt its planarity. The electric wire 58 may have a vertical side wall 67 having a planar shape, and the tab 66 protrudes outward from the side wall 67 of the electric wire 58 to interrupt its planarity. The tabs 64, 66 are located laterally between the side wall 65 and the side wall 67. The placement of the tabs 64, 66 narrows the mandrel cut 26 filled with dielectric. The size of the tabs 64, 66 may vary with the size and position of the mandrel cutout 26. In the latter aspect, for example, if the position of the mandrel cutout 26 is sufficiently centrifuged with respect to the centerline of the mandrel 18, one of the tabs 64, 66 may not be present.

The mandrel cut-outs 24, 26 may be self-aligned, and their formation may be only about two masks, without the need for additional dummy removal. In the latter aspect, the mandrel cutout 26 can be used for dummy removal and relies on the same mask used to provide the mandrel cutout 24. If one or both of the tabs 64 and 66 are present, the resistance benefit and the capacitance benefit can be provided to the complete interconnect structure.

Please refer to FIG. 9 and FIG. 9A, where similar reference element symbols refer to similar features in FIG. 1 and FIG. 1A, and according to an alternative specific embodiment of the present invention, the mandrel cutting mask 22 may be modified so that The opening for forming the mandrel cutouts 24, 26 in the mandrel cutting mask 22 has a double-width shape. Specifically, each opening in the mandrel cutting mask 22 has a narrow section 70 having the same width as the width of the mandrel 20 and a wide section 72 having a width greater than the width of the narrow section 70. The narrow section 70 of the mandrel cutting mask 22 is vertically arranged between the hard mask layer 12 and the wide section 72 of the mandrel cutting mask 22. The wide section 72 may be formed by a partial lithography process, which separates the wide section 72 and the narrow section 70.

The mandrel cutouts 24, 26 are formed in the mandrels 18, 20 using an etching procedure such as reactive ion etching (RIE), which cuts the materials of the mandrels 18, 20 and the dielectric layer 14 from the mandrel cutting mask 22 The area inside the narrow section 70 of the opening that is not masked by the mandrel cutting mask 22 is selectively removed. In this particular embodiment, the mandrel cut 26 is shortened to illustrate the masking with a tip-to-tip cut that is wider than the tip-to-tip provided by the mandrel cut 24. In an alternative embodiment, another mandrel cutout (not shown) that is exactly the same as the mandrel cutout 24 may be formed in the mandrel 18 and may be horizontally aligned with the mandrel cutout 24 to provide a long cutout.

Please refer to FIG. 10 and FIG. 10A, where the similar reference symbol refers to the similar features in FIG. 9 and FIG. 9A, and in the subsequent manufacturing stage, the top surface 13 of the hard mask layer 12 passes through the mandrel The areas 34 and 36 of the mask layer 42 are formed on the areas exposed by the cuts 24 and 26 (FIGS. 9 and 9A). The sections 34, 36 of the mask layer 42 have a height greater than or equal to the thickness of the dielectric layer 14, so that the sections 34, 36 protrude above the top surface 15 of the dielectric layer 14. Since the double-width opening is implemented in the mandrel-cut mask 22, the section 34 of the mask layer 42 has a width equal to that of the mandrel 18. More specifically, the width of the section 34 of the mask layer 42 is limited by the width of the lower section 70 of the mandrel cutout 24 (Figure 9), and the width of the section 36 of the mask layer 42 is limited by the heart The width of the lower section 70 of the shaft cut 26 (Figure 9).

Please refer to Figure 11 and Figure 11A, where the similar reference symbol refers to the similar features in Figure 10 and Figure 10A, and in the subsequent manufacturing stage, the mandrel cutting mask 22 is removed by a cleaning process, And a non-mandrel cutting mask 28 is formed on the top end surface 15 of the dielectric layer 14. Using a non-mandrel cutting mask 28 as an etch mask, the non-mandrel cuts 30, 32 can be used in the dielectric layer 14 such as reactive ion etching (RIE) to expose the material of the dielectric layer 14 to the non-mandrel An etching process to remove the area masked by the cutting mask 28 is formed. In an alternative embodiment, another non-mandrel incision (not shown) that is exactly the same as the non-mandrel incision 30 may be formed between the mandrel 16 and the mandrel 18 and may be horizontally aligned with the non-mandrel incision 28 Provide a long cut.

Please refer to FIG. 12 and FIG. 12A, where the similar reference symbol refers to the similar features in FIG. 11 and FIG. 11A, and in the subsequent manufacturing stage, the top surface 13 of the hard mask layer 12 passes through the non-central Sections 38 and 40 of the mask layer 42 are formed on the openings in the shaft-cut mask 28 and the areas exposed by the mandrel cuts 30 and 32. The sections 38, 40 of the mask layer 42 have a thickness equal to the thickness of the dielectric layer 14.

Please refer to Figure 13 and Figure 13A, where the similar reference symbol refers to the similar features in Figure 12 and Figure 12A, and in the subsequent manufacturing stage, the non-mandrel cutting mask 28 is removed by a cleaning process. And a side wall spacer 44 is formed on the top surface 15 of the dielectric layer 14 adjacent to the vertical side wall 17 of the mandrel 16, 18, 20. The sections 34, 36, 38, 40 of the mask layer 42 are only partially covered by the sidewall spacers 44 at their edges.

Please refer to Figure 14 and Figure 14A, where the similar reference symbol refers to the similar features in Figure 13 and Figure 13A, and in the subsequent production stage, the procedure is as shown in Figure 6, Figure 6A to Figure 8 As described in the content of FIG. 8A, the electric wires 52, 54, 56, 58, 60, 62 are continuously formed. As the mandrel cutout 26 is shortened, the electric wire 64 is additionally formed. The dielectric material of the dielectric layer 10 fills the mandrel cutout 26 between the end 63 of the wire 64 and the end 55 of the wire 56. The tip-to-tip distance between the end 55 and the end 63 is greater than the tip-to-tip distance between the end 59 of the electric wire 60 and the end 61 of the electric wire 62 formed using the mandrel cutout 24, and is also The double width of the side wall spacer 44 is longer.

As described above, this method is used to fabricate integrated circuit wafers. The resulting integrated circuit chip can be distributed by the manufacturer as a blank wafer (for example, as a single wafer with multiple unpackaged chips), as a bare die, or in a packaged form. The wafer can be integrated with other wafers, discrete circuit elements, and / or other signal processing devices as part of an intermediate product or final product. The final product may be any product including integrated circuit chips, such as a computer product or smart phone with a central processing unit.

References to the terms "vertical", "horizontal", and "lateral" in this article are examples, not limitations, but used to establish a reference structure. Terms such as "horizontal" and "lateral" refer to directions in a plane parallel to the top surface of the semiconductor substrate, regardless of their actual three-dimensional spatial orientation. Terms such as "vertical" and "orthogonal" refer to directions perpendicular to the "horizontal" and "lateral" directions. Terms such as "above" and "below" indicate the relative positions of the elements or structures relative to each other, and / or the positions opposed to the top surface of the semiconductor substrate, which are very different from the relative heights.

Features that are "connected" or "coupled" to another element, or "connected" or "coupled" to another element, may be directly connected or coupled to other elements, or, in turn, one or more intermediaries may appear element. If there is no intervening component, a feature can be "directly connected" or "directly coupled" to another component. If there is at least one intermediary element, a feature can be "indirectly connected" or "indirectly coupled" to another element.

The description of the specific embodiments of the present invention has been introduced for illustrative purposes, but the intention is not to be exhaustive or limited to the disclosed specific embodiments. Many modifications and variations will be apparent to those of ordinary skill in the art, but will not depart from the scope and spirit of the specific embodiments. The terminology used in this article is to best explain the principles of specific embodiments, practical applications or technological improvements made to technologies appearing in the market, or to enable those with ordinary knowledge in the technical field to understand the specific embodiments disclosed herein. select.

Claims (20)

    A method includes: forming a first dielectric layer on a metal hard mask layer; forming a mandrel on the first dielectric layer; forming a first extending through the first dielectric layer to the metal hard mask layer A cut; forming a first section of a metal layer on the first region of the metal hard mask layer exposed by the first cut in the first dielectric layer; and after forming the metal layer, in A spacer is formed on the vertical side wall of the mandrel.         The method as described in item 1 of the patent application scope further includes: patterning the metal hard mask layer with the first section of the metal layer and the spacer masking the metal hard mask layer.         The method as described in item 1 of the patent application scope, wherein the mandrel is exposed through the first slit, and the method further includes: when the first slit is formed in the first dielectric layer, Remove the section of the mandrel.         The method of claim 3, wherein after removing the section of the mandrel, the first region of the metal hard mask layer is formed on the first region of the metal hard mask layer segment.         The method according to item 1 of the patent application scope, wherein the first section of the metal layer has a length and a first width transverse to the length, and the mandrel has the first region than the metal layer The second width of the first width of the segment is smaller.         The method according to item 1 of the patent application scope, wherein the first section of the metal layer has a length and a first width transverse to the length, and the mandrel has the first region with the metal layer The second width of the segment is equal to the first width.         The method according to item 1 of the patent application scope, wherein the first section of the metal layer is partially covered by the spacer.         The method of claim 1 of claim 1, wherein the first section of the metal layer is completely covered by the spacer.         The method according to item 1 of the patent application scope, wherein forming the first cutout extending through the first dielectric layer to the metal hard mask layer includes: when forming the first cutout, selective Remove the section of the mandrel.         The method as described in item 9 of the patent application scope further includes: forming a second cutout extending through the first dielectric layer to the metal hard mask layer; and in the first dielectric layer, the first A second section of the metal layer is formed on the second region of the metal hard mask layer exposed by the two cuts.         The method of claim 10, wherein after forming the first cut and the second cut, the first section of the metal layer and the second section of the metal layer are formed in parallel.         The method of claim 10, wherein the first section of the metal layer is formed before the second cut.         The method according to item 12 of the patent application range, wherein the first dielectric layer has a thickness and a top surface, and the first section of the metal layer protrudes above the top surface of the first dielectric layer.         The method of claim 10, wherein forming the first cut extending through the first dielectric layer to the metal hard mask layer includes: forming a desired position of the first cut The first sacrificial cutting mask is patterned by the first opening; and after the first cut is formed, the first sacrificial cutting mask is removed.         The method of claim 14 of the patent application scope, wherein forming the second cutout extending through the first dielectric layer to the metal hard mask layer includes: after removing the first sacrificial cutting mask, in Forming a second sacrificial cutting mask patterned with a second opening at the intended position of the second cut; and removing the second sacrificial cutting mask, wherein after removing the second sacrificial cutting mask, they are formed in parallel The first section of the metal layer and the second section of the metal layer.         The method of claim 14 of the patent application scope, wherein the first section of the metal layer is formed before the first sacrificial cutting mask is removed, and formed to extend through the first dielectric layer to the metal The second incision of the hard mask layer includes: after removing the first sacrificial cutting mask, forming a second sacrificial cutting mask patterned with a second opening at a desired position of the second incision; and forming the first After the two cuts, the second sacrificial cutting mask is removed, wherein the second section of the metal layer is formed first, and then the second sacrificial cutting mask is removed.         The method as described in item 1 of the patent application scope, wherein the metal layer is formed on the first region of the metal hard mask layer exposed by the first slit in the first dielectric layer The first section includes: selectively depositing the first section of the metal layer on the first region of the metal hard mask layer.         The method according to item 1 of the patent application scope, wherein the first dielectric layer and the metal hard mask layer are formed on the second dielectric layer as a layer stack, and the method further includes: The first section serves as an etch mask to pattern the metal hard mask layer; to mask the patterned metal hard mask layer of the second dielectric layer above the first region on the second dielectric layer Middle-etching trench; and filling the trench with a conductor to form a wire, wherein the wire has an end that terminates at a section of the second dielectric layer that is masked above the first region.         A structure includes: a metallization stage, including a first groove and a first wire positioned in the first groove, the first wire includes a planar side wall and a tab protruding outward from the side wall.         The structure of claim 19, wherein the metallization step includes a second trench and a second wire positioned in the second trench, the second wire includes a planar side wall and from the The tab protruding outward from the side wall and the tab of the second wire protrude in the horizontal direction toward the tab of the first wire.