TW201630112A - 夾具總成 - Google Patents
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- TW201630112A TW201630112A TW104135443A TW104135443A TW201630112A TW 201630112 A TW201630112 A TW 201630112A TW 104135443 A TW104135443 A TW 104135443A TW 104135443 A TW104135443 A TW 104135443A TW 201630112 A TW201630112 A TW 201630112A
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- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
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- H01J37/32—Gas-filled discharge tubes
- H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/3065—Plasma etching; Reactive-ion etching
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- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67017—Apparatus for fluid treatment
- H01L21/67063—Apparatus for fluid treatment for etching
- H01L21/67069—Apparatus for fluid treatment for etching for drying etching
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6831—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
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- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
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Abstract
根據本發明,存在一種用於將基板之外周邊部分夾持至電漿處理腔室中之支撐件的夾具總成,該電漿處理腔室具有RF偏壓功率在該基板之該電漿處理期間施加於該支撐件之類型,該夾具總成包含:外夾具構件;以及內夾具構件,其由該外夾具構件接收,該內夾具構件界定將該基板曝露至該電漿處理之孔;其中該外夾具構件具有終止於內邊緣之內部分,其中該內部分與該內夾具構件間隔分開。
Description
本發明係關於用於將晶圓夾持至電漿處理腔室中之支撐件的夾具總成,且係關於相關電漿處理裝置、方法、夾具構件及部件套組(kits of parts)。
在電漿蝕刻領域中,通常藉由靜電卡盤(ESC)或藉由機械夾具將晶圓保持在適當位置,以便確保系統內之晶圓的準確定位,以及允許晶圓之冷卻。ESC使用靜電力來將晶圓維持在適當位置。機械夾具依靠機械方法,諸如手指或環形結構來向下按壓晶圓以將其保持在適當位置。在晶圓及晶圓支撐壓盤之頂部之間引導氣流,以增強自晶圓至冷卻壓盤總成之熱傳遞是相當普遍的。此為可控制晶圓之溫度的方式。
安裝於載體上之薄晶圓的處理呈現出特殊問題,尤其對於穿過晶圓通孔之電漿蝕刻而言。載體晶圓通常由絕緣材料製成,且在此等實例中,單獨靜電夾持是無效的。載體往往昂貴且被再使用。另外,可能需要薄化晶圓之邊緣保護。已知的是具有指狀構件之「手指」型機械夾具,且在US610664描述實例。然而,指狀構件增加了由夾具所
引起之晶圓邊緣擯棄(exclusion)。另外,此類型之夾具允許薄化晶圓及載體之電漿攻擊,該電漿攻擊降低了載體壽命且增加了與微粒材料相關之問題的風險。已知的是提供單塊環形機械夾具。圖1描繪此類先前技術夾具之實例,其展示位於ESC 12上之薄晶圓及載體10。晶圓藉由一片環形夾具14保持在適當位置。亦展示襯裡16,其經定位來消除如該技術領域已知之非所要暗空間電漿。環形夾具14提供增強的夾持力,該夾持力增大了由ESC 12提供之夾持。亦可能的是省卻ESC之使用,而完全依靠夾具來提供對晶圓之夾持作用。夾具14保護薄晶圓及載體10之邊緣,且該等載體可被再使用。然而,為了最小化晶圓邊緣擯棄,環形夾具在與晶圓接觸之區域內必須為薄的。此類型之環形夾具所遭遇之問題是夾具之侵蝕速率高。使用以高速率侵蝕之薄夾具的結果是夾具之有效壽命低,且夾具必須經常替換。清楚地,自商業觀點來看此是不合需要的,且其導致高COO(所有權成本)以及低MWBC(清潔間之平均晶圓(mean wafers between cleans))及MTBC(清潔間之平均時問(mean time between cleans))。已知的是提供二片夾具總成,其中內部夾具片為犧牲的。在US5534110及US6231038中揭示二片夾具總成之實例。在US6231038中,片中之一者為犧牲的,此具有以下優點:僅需要替換該犧牲片,此降低了替換零件之成本。然而,此途徑未降低與中斷製造製程相關之其他成本。此外,未改良MWBC及MTBC。
在本發明之實施例之至少一些中,本發明解決上述問題。值得注意的是,以上所描述之問題不排他地與載體上之薄化晶圓相關。替代地,此等問題係關於基板諸如晶圓本身之處理,且本發明係關於基板,諸如晶圓本身。
根據本發明之第一態樣,提供夾具總成,該夾具總成用於將基板夾持至電漿處理腔室中之支撐件之外周邊部分,該電漿處理腔室係屬於有一RF偏壓功率在基板之電漿處理期間施加於支撐件之類型,該夾具總成包含:外夾具構件;以及內夾具構件,其由外夾具構件接收,該內夾具構件界定將基板曝露至電漿處理之孔;其中外夾具構件具有終止於內邊緣之內部分,其中該內部分與內夾具構件間隔分開。
在外夾具構件與內夾具構件之間提供間隙可降低侵蝕速率,且因此增加內夾具構件之壽命。內夾具構件可用作夾具總成之犧牲元件。
RF偏壓功率可在基板之電漿處理期間施加於支撐件。本發明者藉由將外夾具構件之內部分與內夾具構件間隔分開來達成此過程,可能降低內夾具構件及支撐件之間的RF耦合。此隨後降低內夾具構件之侵蝕速率。
熟練技術讀者將瞭解,如本文結合本發明所使用之「內」、「外」、「向內」及「向外」等詞係關於對由內夾具構件界定之孔的鄰近特徵。
外夾具構件之內部分可藉由小於250微米之間隙
與內夾具構件間隔分開。該間隙可小於100微米,且較佳地小於80微米。
內夾具構件及外夾具構件中之至少一者可具有用於夾持基板之外周邊部分的夾持表面。
外夾具構件可包含用於夾持基板之外周邊部分的夾持表面。外夾具構件之夾持表面可在使用中在由夾具總成提供之晶圓上提供大量夾持力。通常,外夾具之夾持表面包含外夾具之下表面的部分。
內夾具構件可包含用於夾持基板之外周邊部分的夾持表面。內夾具構件之下表面可包含凸緣。該凸緣可包含內夾具構件之夾持表面。該凸緣可進一步包含內表面,該內表面向內夾具構件之夾持表面內部延伸。內表面可相對於夾持表面上升,以使得在使用中,內表面不夾持基板之外周邊部分。內表面可相對於夾持表面上升小於100微米。上升的內表面可進一步降低RF耦合且降低侵蝕速率。
內表面可向下夾持表面內部延伸小於0.75mm,較佳地小於0.5mm。
內夾具構件可具有內邊緣。該內邊緣可向外夾具構件之內邊緣內部設置不多於1mm。
內夾具構件可具有與外夾具構件間隔分開之外部分。內夾具構件之外部分可藉由小於0.75mm,較佳地小於0.5mm之間隙與外夾具構件間隔分開。
外夾具構件可包含第一上表面及向該第一上表面內部設置之第二上表面。內夾具構件之外部分可與第二
上表面接觸。內夾具構件之外部分可與第一上表面間隔分開。外夾具構件之第一上表面及第二上表面可由台階部分分離。內夾具構件之外部分可與台階部分間隔分開。
外夾具構件可包含設置在內部分外部的主體部分。該主體部分可能厚於內部分。主體部分可在內部分之位準以下延伸。「位準」一詞被理解為係關於水平面,該水平面包括內部分之最低點或表面,當夾具總成處於其使用組態中時。
內夾具構件及外夾具構件可為環形的。原則上,內夾具構件及外夾具構件中之一者或兩者可包含多個子單元。例如,可預期開口環(split-ring)佈置。
內夾具構件及外夾具構件可由介電材料形成。該介電材料可為氧化鋁。可使用其他絕緣材料諸如其他陶瓷材料。介電材料可為石英。
外夾具構件可包含一或多個維持特徵,該等維持特徵用於維持內夾具構件與外夾具構件之所要對準或定位。維持特徵可為傾斜表面、上升特徵、曲折特徵、掣子、切口,或用於維持內夾具構件及外夾具構件之間的相互對準之任何其他合適特徵。可在內夾具構件上提供配合特徵。
根據本發明之第二態樣,提供用於在本發明之第一態樣的夾具總成中使用之內夾具構件。
根據本發明之第三態樣,提供用於在本發明之第一態樣的夾具總成中使用之外夾具構件。
根據本發明之第四態樣,提供用於根據本發明之
第一態樣的夾具總成之部件套組,該等部件套組包含內夾具構件及外夾具構件。
根據本發明之第五態樣,提供包括本發明之第一態樣的夾具總成之電漿處理裝置。該電漿處理裝置呈電漿蝕刻裝置形式。
該電漿處理裝置包含用於基板之RF從動支撐件。
該支撐件可包含靜電卡盤。
該基板可包含半導體材料。
該基板可為平面基板。
該基板可為晶圓。該基板可包含載體晶圓上之晶圓。該基板可包含載體晶圓上之薄化晶圓。薄化晶圓之實例為薄化SiC晶圓薄化晶圓可小於500微米厚,較佳地小於300微米厚。
根據本發明之第六態樣,提供在電漿處理腔室中電漿處理基板之方法,該方法包含以下步驟:使用本發明之第一態樣的夾具總成將基板夾持至支撐件;以及電漿處理基板,其中RF偏壓功率在電漿處理基板期間施加於支撐件。
雖然以上已描述了本發明,但本發明延伸至以上陳述,或以下描述、圖式或申請專利範圍中陳述之特徵的任何發明組合。例如,相對於本發明之一個態樣所描述之任何特徵被認為亦相對於本發明之任何其他態樣揭示。
10、30b‧‧‧載體
12‧‧‧ESC
14‧‧‧環形夾具/夾具
16、34‧‧‧襯裡
20‧‧‧夾具總成
22‧‧‧內環/內夾具
22a‧‧‧上表面/第一上表面
22b‧‧‧傾斜表面
22c、24e‧‧‧內邊緣
22d‧‧‧內環形凸緣/內凸緣
22e‧‧‧夾持表面
22f‧‧‧內台階部分
22g‧‧‧內表面
24‧‧‧外環
24a‧‧‧第一、主上表面/第一上表面
24b‧‧‧輪緣
24c‧‧‧第二上表面
24d‧‧‧環形傾斜表面/傾斜表面
30‧‧‧晶圓
30a‧‧‧薄晶圓
32‧‧‧靜電卡盤
36‧‧‧間隔
38‧‧‧間隙
40、42、44、46‧‧‧輪廓
現在將參考隨附圖式描述根據本發明之夾具總成的實施例,其中:圖1為由單塊先前技術夾具環夾持之晶圓的局部橫斷面視圖;圖2展示出夾具總成之分解透視圖,以及內夾具環之剖視圖;圖3展示出(a)由圖2之夾具總成夾持的晶圓之局部橫斷面視圖,以及(b)在夾具總成之外夾具環的內部分與內夾具環間隔分開之區域的放大局部橫斷面視圖;以及圖4展示出蝕刻前及蝕刻後,夾具環之尺寸的光學量測。
圖2展示出本發明之通常描繪於20的夾具總成。夾具總成20包含外環24及內環22。外環24包含由輪緣24b圍繞之第一、主上表面24a,該輪緣相對於第一上表面24a上升。在第一上表面24a之內部,存在通向第二上表面24c之向下的台階,該第二上表面設置在第一上表面24a之位準以下。外環24進一步包含環形傾斜表面24d,該環形傾斜表面向第二上表面24c之內部及下部傾斜。傾斜表面24d通向圖3中最好所見之內邊緣24e。傾斜表面24d、第二上表面24c及第一上表面24a之最內區域界定其中可接收內環22之容器區域。內環22包含上表面22a、向上表面22a之內部及下部傾斜之傾斜表面22b,以及內邊緣22c。
圖3(a)及(b)展示出用來夾持電漿蝕刻裝置中之晶圓30的夾具總成20。在圖3所示之實施例中,晶圓30具有載體類型之晶圓,其包含很厚的載體30b上之薄晶圓30a。晶圓30位於靜電卡盤32上。在晶圓30之周邊下方及以外提供襯裡34,以便消除暗空間電漿,如該技術中熟知的。
夾具總成20具有圖2所示之設計,且因此相同參考數字用來指示夾具總成20之特徵。外環24之內邊緣24e可在圖3(b)中更清楚地看到。外環24為與夾具相關之晶圓提供大多數乃至所有夾持力。外環24應足夠大,以使用合適的重疊量可靠地夾持晶圓之外周邊區域。約2mm之重疊通常被考慮為滿意的。內夾具22可被提供為犧牲部件。內環22希望是薄的,且不應自外環24之內邊緣24e突出太多以便最小化晶圓邊緣擯棄。一般而言,設計內環22以便自內邊緣24e不突出多於1mm。製造內環22及外環24,以使得內環22及外環24之間存在間隔36。間隔36為內環22之最內部分及外環24之傾斜表面24d/內邊緣24e之間的環形間隔。此對應於RF驅動的晶圓之區域。間隔36顯著地降低了內環22及靜電卡盤32之間的耦合,以及此在使用中顯著地降低了內環22之侵蝕速率。已發現間隔36不需要非常大,以便顯著地降低RF耦合。間隔36通常小於500微米,且典型地小於100微米。內環22包含攜帶內邊緣22c之內環形凸緣22d。內凸緣22d具有接觸晶圓30之表面的夾持表面22e。實際上,由夾持表面22e施加之夾持力可能是最小的。內凸緣22d進一步包含內台階部分22f,該內台階部分包括相對於夾持表面
22e上升之內表面22g。上升內表面22g以使得當夾持晶圓30時,存在合適的間隙來進一步降低RF耦合,且因此進一步降低內環22之侵蝕速率。代表性但非限制性間隙為70微米。內表面22g之徑向延伸通常約400微米。亦製造內環22及外環24,以使得在內環22之外區域及外環24之第一上表面24a之間存在間隙38。間隙38通常小於500微米。間隙38降低了粒子之位準,該等粒子由於內環及外環之相對運動,可以其他方式存在。
使用電漿蝕刻執行實驗來處理碳化矽晶圓。使用圖1所示之類型的一片夾持環及如圖2及圖3所示之本發明的二片夾具總成執行蝕刻。一片夾持環及二片夾具總成都由氧化鋁形成。使用一片夾持環執行蝕刻40 RF小時,且使用二片夾具總成執行蝕刻30 RF小時。在蝕刻製程之前及之後進行夾具環及夾具總成之尺寸的光學量測。圖4中可見光學量測之結果。輪廓40對應於蝕刻之前的單塊夾具環;輪廓42對應於40 RF小時蝕刻之後的單塊夾具環;輪廓44對應於蝕刻之前的兩部分夾具總成;以及輪廓46對應於30 RF小時蝕刻之後的兩部分夾具總成。圖4展示出單塊夾具環以每25完整晶圓約1mm直徑/40 RF小時之速率迅速侵蝕。已蝕刻約25晶圓之後,必須替換單塊夾具環。可見夾具總成之犧牲、內夾具環的側向侵蝕速率已降低至幾乎為零。30 RF小時蝕刻之後,未量測到二片夾具總成之內直徑的變化。順便注意,圖4指示蝕刻之後二片夾具總成之高度及外直徑的增加。此為真正的結果,且咸信歸因於夾具總成上之聚
合物沉積的建置。圖4指示本發明可大體上降低侵蝕速率,且因此增加犧牲內夾具環之壽命。由於晶圓處理之物理性質,存在腔室中之非揮發性產品的大量建置。開放腔室來改變部件諸如夾具將觸發腔室清潔。因此,增加夾具總成之犧牲部件的壽命增加了MTBC。
20‧‧‧夾具總成
22‧‧‧內環/內夾具
22a‧‧‧上表面/第一上表面
22b‧‧‧傾斜表面
22c‧‧‧內邊緣
24‧‧‧外環
24a‧‧‧第一、主上表面/第一上表面
24b‧‧‧輪緣
24c‧‧‧第二上表面
24d‧‧‧環形傾斜表面/傾斜表面
Claims (22)
- 一種夾具總成,其用於將一基板之一外周邊部分夾持至一電漿處理腔室中之一支撐件,該電漿處理腔室係屬於有一RF偏壓功率在該基板之電漿處理期間施加於該支撐件之類型,該夾具總成包含:一外夾具構件;以及一內夾具構件,其由該外夾具構件接收,該內夾具構件界定出一將該基板曝露至該電漿處理之孔;其中該外夾具構件具有一終止於一內邊緣之內部分,其中該內部分係與該內夾具構件呈間隔分開。
- 如請求項1之夾具總成,其中該外夾具構件之內部分由小於250微米之一間隙與該內夾具構件呈間隔分開。
- 如請求項2之夾具總成,其中該間隙小於100微米,較佳地小於80微米。
- 如請求項1至3中之夾具總成,其中該內夾具構件及外夾具構件中之至少一者具有一用於夾持該基板之外周邊部分的夾持表面。
- 如請求項4之夾具總成,其中該外夾具構件包含一用於夾持該基板之外周邊部分的夾持表面。
- 如請求項4或5之夾具總成,其中該內夾具構件包含一用於夾持該基板之外周邊部分的夾持表面。
- 如請求項6之夾具總成,其中該內夾具構件包含一凸緣,該凸緣包含該夾持表面及一內表面,該內表面向該夾持 表面作內部延伸,且相對於該夾持表面上升,以使得在使用中,該內表面不夾持該基板之該外周邊部分。
- 如請求項7之夾具總成,其中該內表面相對於該夾持表面上升小於100微米。
- 如請求項7或請求項8之夾具總成,其中該內表面向該下夾持表面作內部延伸小於0.75mm,較佳地小於0.5mm。
- 如請求項1至9中任一項之夾具總成,其中該內夾具構件具有一內邊緣,該內邊緣向該外夾具構件之內邊緣作內部設置不多於1mm。
- 如請求項1至10中任一項之夾具總成,其中該內夾具構件具有一外部分,該外部分與該外夾具構件呈間隔分開。
- 如請求項11之夾具總成,其中該內夾具構件之外部分由小於0.75mm、較佳地小於0.5mm之一間隙與該外夾具構件呈間隔分開。
- 如請求項11或請求項12之夾具總成,其中該外夾具構件包含一第一上表面、及向該第一上表面作內部設置之一第二上表面,其中該內夾具構件之外部分與該第二上表面接觸,且與該第一上表面呈間隔分開。
- 如請求項1至13中任一項之夾具總成,其中該內夾具構件及該外夾具構件為環形的。
- 如請求項1至14中任一項之夾具總成,其中該內夾具構件及該外夾具構件由一介電材料形成。
- 如請求項15之夾具總成,其中該介電材料為氧化鋁。
- 一種在如請求項1之一夾具總成中使用的內夾具構件。
- 一種在如請求項1之一夾具總成中使用的外夾具構件。
- 一種用於如請求項1之一夾具總成的部件套組,其包含一內夾具構件及一外夾具構件。
- 一種電漿處理裝置,其包括如請求項1之一夾具總成。
- 如請求項20之電漿處理裝置,其呈一電漿蝕刻裝置形式。
- 一種在一電漿處理腔室中電漿處理一基板之方法,其包含以下步驟:使用如請求項1之一夾具總成而將該基板夾持至一支撐件;以及電漿處理該基板,其中一RF偏壓功率在該基板之該電漿處理期間施加於該支撐件。
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GBGB1419210.8A GB201419210D0 (en) | 2014-10-29 | 2014-10-29 | Clamp assembly |
GB1419210.8 | 2014-10-29 |
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CN111613506B (zh) * | 2020-05-22 | 2023-10-13 | 北京北方华创微电子装备有限公司 | 半导体腔室的固定组件及半导体腔室 |
US20220108908A1 (en) * | 2020-10-06 | 2022-04-07 | Applied Materials, Inc. | Shadow ring kit for plasma etch wafer singulation process |
CN115132643A (zh) * | 2021-03-25 | 2022-09-30 | 鑫天虹(厦门)科技有限公司 | 晶圆承载固定装置及薄膜沉积设备 |
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JP2016092418A (ja) | 2016-05-23 |
EP3016137B1 (en) | 2021-06-23 |
US20160126129A1 (en) | 2016-05-05 |
GB201419210D0 (en) | 2014-12-10 |
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