201225309 六、發明說明： 【發明所屬之技術領域】 [0001] 本發明係有關一種太陽能電池的製造方法，特別有關太 陽能電池背面點接觸的製造方法。 [先前技術] Ο ❹ [0002] 近年來’由於油價高漲、全球暖化、化石能源的排放、 核廢料及新電廠場址選擇等問題，新型式的再生能源引 起世人高度重視。其中，直接將太陽能轉換成電能且無 污染的太陽能電池的研發已有長足的進展。 [0003] [0004] [0005] 099142375 現今廣泛使用的太陽能電池係於受光面附近成形有一γη 接面，且於大陽能電池吸收光能時會產生電子旋。常見 的電池設計，係在電池前後二側分別形成電拯。通常為 了供電於大電壓電器，該等電池係以串聯方 Μ \也性遠接 以增加電壓。 接 傳統的太陽能電池採用具有第一掺質的矽基板，/ 利用高溫熱擴散的處理，使基板表面上形成〜層二後再 二掺質的半導體’藉以形成不同型式的掺質的 面。例如，矽基板可為Ρ型基板，其表面上所 體為η型半導體，ρ型基板和型半導體之間存在一的半導 面。 Ρ π接 由於梦晶體在表面上㈣成如懸鍵（dangi 等晶格缺陷，《格軸易與太陽能電池產0nd) 合’_減少輸出_。因此，切基板的表=子結 進行氫純化，即形成—料儿a 般會 ρ办成一鈍化層，藉由鈍化層中 晶體中的缺陷及雜質作用 、虱與矽 表單編號A〇1〇1【作用’鈍化其電活性。 第3頁/共18頁 0992073584-0 201225309 _]太陽能電池之背光面通常會塗佈-層金屬膠。經燒結後 2屬谬會與背光面處的料成共晶結構。當太陽能電 '作用時，背光面的仙共晶結構會產生背面電場（哪 ):办電池㈣子的收集，並可回收未被吸收的光子 措此提升太陽能電池的轉換效率。 [0007]為了達到理想的鈍化效果，矽鋁此曰 ，、曰日層的厚度必須增加 ，習知技術提出在聽層上局部料，於燒結時使金屬 膠可以穿透純化層與魏板背面接㈣成局部背面電場 ，以提供較佳的鈍化效果。然而，局部開孔須透過化學 蝕刻製程，諸如使用_液或_膏、機械侧製程， 諸如使用雷射完成，費時費工。 闕有鑑於此，本發明人為改善並解決上述之缺失，乃特潛 心研究並配合學理H終於提出—種設計合理且有 效改善上述缺失之本發明。 【發明内容】 [0009] 本發明係有關一種太陽能電池背面點錢觸的製造方法， 無需在鈍化層上局部開孔，即可在觀結時使以點陣方式 塗佈含玻璃粉之金屬膠穿透鈍化層與半導體基材背面接 觸形成局部背面電場，緊密結合並導出電流。 [0010] 為達上述功效，本發明提供一種太陽能電池背面點接觸 的製造方法’包含以下步驟：提供一半導體基材；形成 一鈍化層於該半導體基材之一背面上；以點陣方式塗佈 含玻璃粉之第一金屬膠於該鈍化層上；塗佈未含玻璃粉 之第二金屬膠於該鈍化層及點陣狀的該第一金屬膠上； 及燒結該半導體基材’使得該第一金屬膠與該半導體基 099142375 表單編號 A0101 第 4 頁/共 18 頁 0992073584-0 201225309 [0011] [0012] [0013]Ο [0014] [0015] [0016]Ο [0017] [0018] 材形成共晶結構。 本發明之一實施例中，上述之太陽能電池背面點接觸的 製造方法，其中以點陣方式塗佈該第一金屬膠的步驟包 含：利用一網印塗佈製程。 本發明之一實施例中，上述之太陽能電池背面點接觸的 製造方法，其中塗佈該第二金屬膠的步驟包含：利用一 網印塗佈製程。 本發明之一實施例中，上述之太陽能電池背面點接觸的 製造方法，其中第一金屬膠中玻璃粉含量為0. Iwt%至 50wt% 。 本發明之一實施例中，上述之太陽能電池背面點接觸的 製造方法，其中該第一金屬膠為鋁膠或銀鋁膠。 本發明之一實施例中，上述之太陽能電池背面點接觸的 製造方法，其中該第二金屬膠為鋁膠或銀串膠。 本發明之一實施例中，上述之太陽能電池背面點接觸的 製造方法，其中燒結該半導體基材之步驟的燒結溫度為 500至900°C。 基於上述，本發明以點陣方式塗佈含玻璃粉之金屬膠於 鈍化層上，於燒結時含玻璃粉之金屬膠可穿透鈍化層與 半導體基材背面接觸形成局部背面電場，緊密結合並導 出電流。如此可提供良好的鈍化效果，進而提升太陽能 電池的轉換效率。 為了使任何熟習相關技藝者了解本發明之技術内容並據 099142375 表單編號A0101 第5頁/共18頁 0992073584-0 201225309 [0019] [0020] [0021] [0022] 099142375 以實施，且根據本說明書所揭露之内容、申請專利範圍 及圖式，任何熟習相關技藝者可輕易地理解本發明相關 之目'的及優點，因此將在實施方式中詳細敘述本發明之 詳細特徵以及優點。 【實施方式】 請參閱第一圖，第一圖係顯示根據本發明之實施例之太 陽能電池的立體圖。太陽能電池100包含半導體基材110 、掺質層120、抗反射層130、鈍化層140、第一金屬膠 150、第二金屬膠層160、背面匯流條170及正面匯流條 180。以下將詳細說明本發明之太陽能電池背面點接觸的 製造方法。 第二圖A至第二圖L為依照本發明之實施例之形成太陽能 電池之流程剖面示意圖。請參照第二圖A，在本實施例中 ，首先提供一半導體基材110，其具有一前表面ll〇a以及 一後表面110b。在本實施例中，半導體基材110主要是在 高純度的矽晶基板中，添加週期表第三族元素，例如硼 (B)、鎵（Ga)或銦（In)等，形成p型半導體基材。 接著，如第二圖B所示，以酸液將半導體基材110的前表 面110a與後表面110b餘刻成織狀結構（texture)。 接著，將對半導體基材110進行一磷擴散程序。在本實施 例中，對半導體基材110進行磷擴散程序的方式，是將半 導體基材110放置於一沈積腔室内，然後於半導體基材 110的表面沈積一含磷材料層，並且利用沈積程序的高溫 作用，使含磷材料層内的磷離子擴散至半導體基材110的 内部。 表單編號A0101 第6頁/共18頁 0992073584-0 201225309 ^ L〇〇23」具體s之，請參照第二圖c，將半導體基材1 1 0移至於一 沈積腔室内之後，即進行一沈積程序，在半導體基材110 的則表面110a上形成一磷矽玻螭層122a。當於進行上述 之沈積程序時，沈積腔室内的高溫會使磷矽玻璃層122a 内的碟離子擴散至半導體基材110的前表面110a的内部而 形成一摻雜層120亦即η層。半導體基材110與摻雜層120 間便形成一 Ρ η接面。 [0024] s 70成上述磷擴散程序後，移除半導體基材丨1()上的磷矽 玻璃層122a ’如第二圖D所示。 0 [〇〇25]接著，請參見第二圖E，在半導體基材U〇上的摻雜層 120上形成抗反射層130。抗反射層：3—例如可利用電漿 . 增強化學氣相沉積法（Plasma Enhanced Chemical201225309 VI. Description of the Invention: [Technical Field of the Invention] [0001] The present invention relates to a method of manufacturing a solar cell, and more particularly to a method of manufacturing a point contact on the back side of a solar cell. [Prior Art] Ο ❹ [0002] In recent years, due to high oil prices, global warming, emissions of fossil fuels, nuclear waste and site selection of new power plants, new types of renewable energy have attracted great attention. Among them, the development of solar cells that directly convert solar energy into electrical energy and is free of pollution has made great progress. [0003] [0005] [0005] 099142375 The solar cell widely used today forms a γη junction near the light receiving surface, and generates an electron spin when the solar cell absorbs light energy. A common battery design is formed on the front and back sides of the battery. Usually for powering large voltage appliances, the batteries are connected in series to increase voltage. Conventional solar cells use a germanium substrate having a first dopant, and a high-temperature thermal diffusion process to form a layer of a second layer of a second dopant to form a different type of dopant surface. For example, the germanium substrate may be a germanium-type substrate having an n-type semiconductor on its surface, and a semi-conducting surface between the p-type substrate and the type semiconductor. Ρ π connection Because the dream crystal is on the surface (four) into a dangling bond (dangi and other lattice defects, "the grid axis is easy to be combined with solar cell production 0nd" _ reduce output _. Therefore, the surface of the substrate is sub-deposited for hydrogen purification, that is, the formation of a material will be a passivation layer, by the defects and impurities in the crystal in the passivation layer, 虱 and 矽 form number A〇1〇 1 [Action] passivates its electrical activity. Page 3 of 18 0992073584-0 201225309 _] The back surface of the solar cell is usually coated with a layer of metal glue. After sintering, the two genus will form a eutectic structure with the material at the back surface. When the solar power acts, the eutectic structure of the backlight surface will generate a back electric field (which): collecting the battery (four), and recovering the unabsorbed photons to improve the conversion efficiency of the solar cell. [0007] In order to achieve the desired passivation effect, the thickness of the tantalum layer and the tantalum layer must be increased. The conventional technique proposes a partial material on the audition layer, so that the metal glue can penetrate the purification layer and the Wei board back during sintering. The face is connected (4) to a partial back electric field to provide a better passivation effect. However, the partial opening is required to pass through a chemical etching process, such as using a liquid or a paste, a mechanical side process, such as using a laser, which is time consuming and labor intensive. In view of the above, the present inventors have made great efforts to improve and solve the above-mentioned deficiencies, and have intensively studied and cooperated with the theory H to finally propose a present invention which is reasonable in design and effective in improving the above-mentioned defects. SUMMARY OF THE INVENTION [0009] The present invention relates to a method for manufacturing a solar cell backside touch, which can be used to apply a glass powder containing a glass powder in a dot matrix manner during the observation process without partially opening a hole in the passivation layer. The penetrating passivation layer is in contact with the back surface of the semiconductor substrate to form a local back surface electric field, which tightly combines and conducts current. [0010] In order to achieve the above effects, the present invention provides a method for manufacturing a back contact of a solar cell, comprising the steps of: providing a semiconductor substrate; forming a passivation layer on one of the back surfaces of the semiconductor substrate; and coating in a dot pattern Coating a first metal paste containing glass frit on the passivation layer; coating a second metal paste not containing glass frit on the passivation layer and the first metal paste in a lattice shape; and sintering the semiconductor substrate The first metal paste and the semiconductor base 099142375 Form No. A0101 Page 4 / 18 pages 0992073584-0 201225309 [0012] [0013] [0014] [0016] [0016] [0018] The material forms a eutectic structure. In an embodiment of the invention, the method for manufacturing the back contact of the solar cell back surface, wherein the step of applying the first metal paste in a dot matrix manner comprises: using a screen printing process. In an embodiment of the invention, the method for manufacturing the back contact of the solar cell back surface, wherein the step of coating the second metal paste comprises: using a screen printing process. Iwt%至50重量%。 The first embodiment of the present invention, wherein the glass frit content of the first metal glue is 0. Iwt% to 50wt%. In an embodiment of the invention, the method for manufacturing the back contact of the solar cell back surface, wherein the first metal paste is aluminum glue or silver aluminum glue. In an embodiment of the invention, the method for manufacturing the back contact of the solar cell back surface, wherein the second metal paste is aluminum glue or silver string glue. In one embodiment of the invention, the method of manufacturing the back contact of the solar cell described above, wherein the step of sintering the semiconductor substrate has a sintering temperature of 500 to 900 °C. Based on the above, the present invention applies a glass frit-containing metal paste on a passivation layer in a dot matrix manner. When sintered, the glass paste-containing metal paste can penetrate the passivation layer to contact the back surface of the semiconductor substrate to form a partial back surface electric field, and tightly combine and Export current. This provides a good passivation effect, which in turn increases the conversion efficiency of the solar cell. In order to make the technical contents of the present invention known to those skilled in the art, according to 099142375, Form No. A0101, Page 5 of 18, 0992073584-0 201225309 [0019] [0020] [0022] 099142375 to implement, and according to the present specification The details and advantages of the present invention are set forth in the Detailed Description of the Detailed Description. [Embodiment] Referring to the first drawing, the first drawing shows a perspective view of a solar battery according to an embodiment of the present invention. The solar cell 100 includes a semiconductor substrate 110, a dopant layer 120, an anti-reflection layer 130, a passivation layer 140, a first metal paste 150, a second metal paste layer 160, a backside bus bar 170, and a front bus bar 180. Hereinafter, a method of manufacturing the back contact of the solar cell of the present invention will be described in detail. 2A to 2D are schematic cross-sectional views showing a process of forming a solar cell according to an embodiment of the present invention. Referring to Figure 2A, in the present embodiment, a semiconductor substrate 110 having a front surface 11a and a back surface 110b is first provided. In the present embodiment, the semiconductor substrate 110 is mainly added to a high-purity twinned substrate by adding a third group element of the periodic table, such as boron (B), gallium (Ga) or indium (In), to form a p-type semiconductor. Substrate. Next, as shown in Fig. B, the front surface 110a and the rear surface 110b of the semiconductor substrate 110 are left with a texture to form a texture. Next, a semiconductor phosphorus diffusion process is performed on the semiconductor substrate 110. In the present embodiment, the semiconductor substrate 110 is subjected to a phosphorus diffusion process by placing the semiconductor substrate 110 in a deposition chamber, then depositing a layer of a phosphorus-containing material on the surface of the semiconductor substrate 110, and using a deposition process. The high temperature acts to diffuse phosphorus ions in the phosphor-containing material layer to the inside of the semiconductor substrate 110. Form No. A0101 Page 6 / 18 pages 0992073584-0 201225309 ^ L〇〇23" Specifically, please refer to the second figure c, after the semiconductor substrate 110 is moved into a deposition chamber, a deposition is performed. In the procedure, a phosphor ruthenium layer 122a is formed on the surface 110a of the semiconductor substrate 110. When the deposition process described above is performed, the high temperature in the deposition chamber causes the dish ions in the phosphorous silicate layer 122a to diffuse into the inside of the front surface 110a of the semiconductor substrate 110 to form a doped layer 120, i.e., an η layer. An 接 junction is formed between the semiconductor substrate 110 and the doped layer 120. [0024] After s 70 is subjected to the above phosphorus diffusion process, the phosphorous-glass layer 122a' on the semiconductor substrate 丨1() is removed as shown in FIG. 0 [〇〇25] Next, referring to Fig. E, an anti-reflection layer 130 is formed on the doped layer 120 on the semiconductor substrate U?. Anti-reflective layer: 3 - for example, plasma can be used. Enhanced Chemical Vapor Deposition (Plasma Enhanced Chemical
Vapor Deposition，PECVD)來形成，其材質包括氮化 矽、氧化矽、非晶矽或氧化鋁。抗反射層13〇可減少太陽 光的反射，以提高太陽光的吸收率。同時，抗反射層丨30 還兼具鈍化（passivation)的作用，以降低電池中電荷 〇 載子在半導體基材110表面上再結合損失。 [0026] 接著，請參見第二圖F，在半導體基材110後表面110b上 形成鈍化層140，其材質可為氮化矽、氧化矽、非晶矽或 氧化鋁。鈍化層140可降低表面載子再結合速率，提升開 路電壓。 [0027] 接著，請參見第二圖G，於鈍化層14〇上網印塗佈背面導 電膠145，例如銀膠或銀銘膠，形成背面匯流條（第一圖 元件符號170)。 099142375 表單編號A0101 第7頁/共18頁 0992073584-0 201225309 妾者，請參見第二圖Η，以點陣方式塗佈，例如利用網印 塗佈製程，塗佈含破璃粉之第一金屬卵〇於純化層140 其中第—金屬膠_破璃粉含量為G.lWtn50wt%。 該第一金屬膠為鋁膠或銀鋁膠。 [0029] 接者，請參見第二圖！，塗佈不含玻璃粉之第二金屬勝 160於純化層14G及點陣狀的第一金屬膠15〇之上，汾佈 製程例如網印塗佈製程。該第二金屬膠為_或銀轉 圆接者，凊參見第二圖於抗反射層㈣上網印塗佈正面 導電膠155，例如銀膝或銀_，形成正面匯流條（第一 圖元件符號180)及指又電極。 _] i述完成網印塗佈正面導轉155 '背㈣電膠145、第 -金屬膠150與第二金屬膠16G之後，皆進行一烘乾步驟 〇 闕接著，請參見第二《，綠該半導慮翁110。正面導 電膠155、背面導電膠i45、第一金聽15〇與第二金屬 膠160經過網印、烘乾之步驟，需要經過燒結處理。經過 快速燒結爐讓正面導電膠155穿透抗反射層13〇與半導體 基材11〇表面燒結，同時讓背面導電膠145與第一金屬膝 150及第二金屬膠16〇燒結，並且點陣狀的含玻璃粉之第 -金屬膠150會穿透鈍化層14〇與半導體基材11〇的背面 接觸，形成共晶結構165與局部背面電場（BSF)，而不 含玻璃粉之第二金屬膠則不會穿透鈍化層140與半導 體基材110接觸。燒結該半導體基材110的燒結溫度為 099142375 表單編號A0101 第8頁/共18頁 0992073584-0 201225309 500至900〇C。 [0033]接著’請參見第二圖[，進行雷射絕緣。以p型半導體基 材製作的太陽能電池正面為負極、背自為正極，為避免 正負兩極之間在半導體基材邊緣有短路之現象需要以 雷射光束沿半導體基材邊緣切割一道深度舰即接面的 凹槽190，如此電流才能正確導出。此步驟也可由電漿處 理或化學蝕刻製程進行。 [0034] ❹ 土；上返一…和,卞々巧塗佈含玻瑀粉之金屬膠於 純化層上，讀結時含破％㈣金·可料恳 半導體基材背面接觸形成局邹背面電場，緊密結人:與 出電流。如此可提供良好的，化效果，進而提升導 電池的轉換效率。 能 剛以上所述僅為本發明之較佳實施例，非用以限 之專利，其他運用本發明之專利精神之等 明 均應俱屬本發明之專利範圍β 匕’Formed by Vapor Deposition (PECVD), the material of which includes tantalum nitride, hafnium oxide, amorphous germanium or aluminum oxide. The anti-reflection layer 13 reduces the reflection of sunlight to increase the absorption of sunlight. At the same time, the anti-reflection layer 30 also functions as a passivation to reduce the recombination loss of the charge 〇 carriers on the surface of the semiconductor substrate 110 in the battery. Next, referring to FIG. F, a passivation layer 140 is formed on the rear surface 110b of the semiconductor substrate 110, and the material thereof may be tantalum nitride, hafnium oxide, amorphous germanium or aluminum oxide. The passivation layer 140 reduces the surface carrier recombination rate and increases the open circuit voltage. [0027] Next, referring to FIG. G, the back surface conductive paste 145, such as silver paste or silver gelatin, is overprinted on the passivation layer 14 to form a backside bus bar (first figure component symbol 170). 099142375 Form No. A0101 Page 7 of 18 0992073584-0 201225309 For details, please refer to the second figure, which is applied in dot matrix, for example, using the screen printing process to coat the first metal containing the broken glass. The egg yolk is in the purification layer 140, wherein the content of the first metal glue_glass powder is G.lWtn 50wt%. The first metal glue is aluminum glue or silver aluminum glue. [0029] Receiver, please see the second picture! The coating of the second metal containing no glass frit is performed on the purification layer 14G and the first metal paste 15点 in a lattice form, and the rubbing process is, for example, a screen printing process. The second metal glue is _ or silver-turned, and the second figure is printed on the anti-reflective layer (4). The front conductive adhesive 155, such as silver knee or silver _, forms a front bus bar (the first figure component symbol) 180) and refers to the electrode. _] i finish the screen printing coating front guide 155 'back (four) electric glue 145, the first metal glue 150 and the second metal glue 16G, after a drying step, then see the second ", green The semi-guided caregone 110. The front conductive adhesive 155, the back conductive adhesive i45, the first gold cymbal 15 〇 and the second metal paste 160 are subjected to screen printing and drying, and need to be subjected to sintering treatment. After the rapid sintering furnace, the front conductive paste 155 penetrates the anti-reflective layer 13 and the surface of the semiconductor substrate 11 is sintered, and the back conductive paste 145 is sintered with the first metal knee 150 and the second metal paste 16 and is lattice-shaped. The glass-containing metal-metal paste 150 penetrates the passivation layer 14〇 to contact the back surface of the semiconductor substrate 11〇 to form a eutectic structure 165 and a partial back surface electric field (BSF), and a second metal paste not containing the glass powder. Then, the passivation layer 140 is not penetrated into contact with the semiconductor substrate 110. The sintering temperature of the semiconductor substrate 110 is 099142375. Form No. A0101 Page 8 of 18 0992073584-0 201225309 500 to 900 〇C. [0033] Then, please refer to the second figure [, performing laser insulation. The front side of a solar cell fabricated on a p-type semiconductor substrate is a negative electrode and a self-contained positive electrode. In order to avoid a short circuit between the positive and negative electrodes at the edge of the semiconductor substrate, it is necessary to cut a deep ship along the edge of the semiconductor substrate with a laser beam. The groove 190 of the face, so that the current can be correctly derived. This step can also be carried out by a plasma treatment or a chemical etching process. [0034] ❹土; 上回一... and, 卞々 涂布 涂布 涂布 涂布 涂布 涂布 涂布 涂布 涂布 涂布 涂布 涂布 涂布 涂布 涂布 涂布 涂布 涂布 涂布 涂布 涂布 涂布 涂布 涂布 涂布 涂布 涂布 涂布 涂布 涂布 涂布 涂布 涂布 涂布 涂布 涂布 涂布 涂布 涂布 涂布 涂布 涂布The electric field is tightly connected: with current. This can provide good and chemical effects, thereby improving the conversion efficiency of the battery. The foregoing is only the preferred embodiment of the present invention, and the patents of the present invention are not limited to the patents.
【圖式簡單說明】 '*/ 剛帛―圖侧示減本發明之實㈣之 圖。 &的立體 [0037] 第二圖Α至第二圖L為依照本發明 電池之流程剖面示意圖。 之實施例之形成太陽能 【主要元件符號說明】 [0038] 100太陽能電池 半導體基材 11 前表面 099142375 表單坞號A0101 第9頁/共18頁 201225309 110b後表面 111 a前粗糙面 111b後粗糙面 120掺雜層 12 2a填矽玻璃層 130抗反射層 140鈍化層 145背面導電膠 150第一金屬膠 155正面導電膠 160第二金屬膠層 165共晶結構 170背面匯流條 180正面匯流條 190凹槽 099142375 表單編號A0101 第10頁/共18頁 0992073584-0[Simple description of the diagram] '*/ 帛 帛 图 图 图 图 图 图 图 。 。 。 。 。 。 。 。 。 。 。 。 Stereoscopic [0037] Fig. 2 to Fig. L are schematic cross-sectional views showing the flow of the battery in accordance with the present invention. Solar Energy Forming Example [Main Element Symbol Description] [0038] 100 Solar Cell Semiconductor Substrate 11 Front Surface 099142375 Form Dock No. A0101 Page 9 / Total 18 Page 201225309 110b Rear Surface 111 a Front Rough Surface 111b Rear Rough Surface 120 Doped layer 12 2a filled glass layer 130 anti-reflective layer 140 passivation layer 145 back conductive paste 150 first metal paste 155 front conductive paste 160 second metal paste layer 165 eutectic structure 170 back bus bar 180 front bus bar 190 groove 099142375 Form No. A0101 Page 10 / Total 18 Page 0992073584-0