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TW201125091A - Method for detecting wiring location of wire rack. - Google Patents

Method for detecting wiring location of wire rack. Download PDF

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Publication number
TW201125091A
TW201125091A TW099101079A TW99101079A TW201125091A TW 201125091 A TW201125091 A TW 201125091A TW 099101079 A TW099101079 A TW 099101079A TW 99101079 A TW99101079 A TW 99101079A TW 201125091 A TW201125091 A TW 201125091A
Authority
TW
Taiwan
Prior art keywords
wire
lead frame
image
standard
corrected
Prior art date
Application number
TW099101079A
Other languages
Chinese (zh)
Other versions
TWI423411B (en
Inventor
de-bao Peng
Wei-Ting Shen
Gui-Qi Zhang
Original Assignee
de-bao Peng
Wei-Ting Shen
Gui-Qi Zhang
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Publication date
Application filed by de-bao Peng, Wei-Ting Shen, Gui-Qi Zhang filed Critical de-bao Peng
Priority to TW099101079A priority Critical patent/TW201125091A/en
Publication of TW201125091A publication Critical patent/TW201125091A/en
Application granted granted Critical
Publication of TWI423411B publication Critical patent/TWI423411B/zh

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/859Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector involving monitoring, e.g. feedback loop
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Image Processing (AREA)

Abstract

The present invention discloses a method for detecting wiring location of a wire rack. Firstly, it gets an image of wiring region of the wire rack and a corresponding standard wire pattern marked with solder points, then, respectively, marking the corresponding reference location of the region image and the wire rack pattern, and then assigning a corresponding pseudo code to each wire lead of the region image and the wire rack pattern. Next, processing each wire lead of the region image for getting an idea axis of each wire lead, then, according to said reference location, calculating the ready-to-correct coordinates that the solder point corresponding to the region image. Finally, by the mapping of the pseudo code, it can correct the ready-to-correct coordinate into a corrected coordinate which is disposed on the corresponding idea axis of the wire lead. The present invention can correct the deviation of the wiring region image and the wire rack wire so that can prevent the wire from going along the wrong track.

Description

201125091 六、發明說明: 【發明所屬之技術領域】 本發明係有關-種位置_法,特別是種導線架打線位置檢測 法。 【先前技術】 鮮線(Wire Bonding) ’俗稱打線是積體電路⑽封裝中最重要的一 道製程,以金線、麟或銅線來連接IC晶片上的⑷墊片(PM)與導線 架之引腳(Lead) ’使付電子訊號得以傳輸。當封裝廠_已製造好的導線 架後,製虹程師會依據該導_對應之電腦辅助設計(CM)圖標,來 設定銲線_每-個銲線點之正確座標位置,隨著ic功能越來越強大,鲜 線的數目也越來越多’已多達數百條線’若以一個有條線的K為例, 製程工程師需要花f 2〜3小時,才能完成其銲線齡置的設定,在這漫長 且複雜的蚊過財,需要極度的細心與耐心才可能不發生任何錯誤,才 可能完成這項幾近不可能的任務。 近年來,封裝廠經由CAD下載的程序,直接將CAD圖中的每一個鲜 線點的座標位置,經由轉換的程序’直接轉換成銲線機的程式,來取代傳 統手動的方式逐-設定每―個座標位置^理論上,透過⑽下載的程序, 可將銲線機的每—嶋闕織置,設定正伽丨但實務上,透過 奶下載的程序所轉換出來的每一個鲜線點的座標位置㈠ =喝,與實際上最⑽座標健,存在著—定的差距,其主要的原線= 有二: 其一為導物光罩賴具設計的誤差’魏m域具設計會以封 201125091 裝廠提供的原始設計CAD圖為基準作一些調整,主要調整都與導線架在製 作之餘刻或電鍍過程有關;同樣地,另一原因為導線架製造過程中的變異; 而最後一個原因為原始CAD圖的偏移,在設計繪製CAD圖時,為方便人 員觀看,讓落在CAD圖上同一根引腳的多條線,能清楚分辨,以避免因為 重疊而誤判,而會刻意將這些線不繪製在引腳的中軸上,使彼此有空隙, 故在端點轉換至導線架後也需要以人工將端點校正至中軸上。 因為以上的原因,即使透過CAD下載的程序,所轉換出來的每一個輝 線點的座標位置,仍需要透過人卫逐―的難。但在人工調整的過程中, 部無法①全避免因疏失而調整錯誤,產生錯誤的銲線點座標位置而輝接到 錯誤的引腳上’導致錯銲線^因此在輕之後,都必賴打-鑛的樣品、 並且仔細的檢查,來避免錯銲線的發生。 銲線是無法重工的,銲線後即無法修復為正確的銲線位置,這是一 重的問Γ通常都需要付出巨額的賠償金。直到目前,封裝顧 極為費_、過Γ倍顯微鏡,逐—的檢查每—個銲線點的位置是否正確’ 此柳輪_細步進行。 以解決習知所產生的問題。擾’⑼—種導線架打線位置檢測法, 【發明内容】 導 端點的位置,姑仰以工作業切^^妨峨,《奴_線 也大幅縮減人卫作業所需的時間。4人為疏忽所導致的錯銲線, 201125091 為達上述目的,本發明提供-種導線架打線位置檢測法,首先取得一 導線架之打線區域影像,及-與其對應之標準導線架圖形,此標準導線架 圖形標有複數標轉,_點。接著於打線_影像與標料線細形分別 .標示至少二第―、第二參考位置,骑第―、第二參考位置係分別相互 •對應。再來對打線區域影像與標準導線_形之每—引腳,分別給一獨立 之第-、第二虛擬瑪,且每一第一、第二虛擬碼亦分別相互對應。下一步 驟則將打線區域影像之每-引腳進行細線化處理,以分別取得一引腳中 #軸’取得後再對引腳中軸進行移除及修補,以分別得到引腳理想中轴。下 一步係根據第-、第二參考位置之座標,計算標準銲線端點對應於打線區 域影像之待校正座標,最後係藉由第一、第二虛擬碼之對應關係,修正待 校正座縣已校正絲,並使其姆職之⑽理想中轴上。 #為使貝審查委員對本發明之結構特徵及所達成之功效,能有更進 步之瞭解與地識’謹佐以較佳之實施例圖及配合詳細之說明,說明如後: 【實施方式】 • 有鑑於習知利用人工方式來對導線架之銲線端點進行檢測,係相當費 時費力’錄Μ錯’因此本發_提出_種導線架打線位置檢測法,以 = ° I去技術炫說明如下’請同時參閱第1圖與第2(a)圖至第2(b)圖,由 •於導線架有基板導線架與金屬導線架兩種,以下先以金屬導線架為例進行 說明。 首先如步驟S10所不’取得一導線架之打線區域影像,及一與其對應 &準導線架圖形’打線區域影像為實際拍攝而來,標準導線㈣形為電 遂輔助4 (CAD) 越有複數標準銲線端點,此外,此打線區域 201125091 影像與標準導線架圖形分別為灰階影像與灰階圖形。舉例來說,如第a⑷ 圖所示,其左删為上述之打線區域影像10,其右侧圖為標準導線架圖形 12 ’打線區域影像1G包含—積體電路⑽底座14、與積魏路底錢 連接之支数丨6 ’及分佈於四複數引腳ls,同樣地標準導線架圖形 12包含-標準積體電路(IC)底座2〇、與標準積體電路底座2〇連接之標 準支撐架22,及分佈於四周的複數標準引腳24,另外在標準引腳上μ,標 有複數標準銲線端點26。 接著如步驟S12所示,對打線區域影像與標準導線架圖形進行二值化 處理’使打線區域影像與鮮導線細形分顺黑白分_影像與圖形。 舉例來說’在第2(a)圖中,打線區域影像10之積體電路底座…支撐架 及複數引腳18皆呈職色,其餘部分暇白色,另外,標料線架圖形Η 之標準積體電路底座20、標準支撐架22、複數標準⑽24,及標準銲線端 點26皆呈現黑色,其餘部分則呈白色。 再來如步驟SM所示’由於打線區域影像與標準導線架圖形極其近似, 故於打線區域影像與標準導線架圖形分別標示至少二第一、第二參考位 置,且每一第一、第二參考位置係分別相互對應,在此實施例中,第—、 第二參考位置的數量皆以二為例,且此二第一參考位置相距愈遠愈好,此 二第二參考位置相距亦愈遠愈好,因有助於之後進行座標對位的精準度。 舉例來說’如第2(b)圖所示,打線區域影像1 〇上標有二第一參考點28、3〇 , 其係分別設於相距最遠的二引腳18旁,此二第一參考點28、30的所在位 置分別作為二第一參考位置。同樣地,標準導線架圖形12上標有二第二參 考點32、34’其係分別設於相距最遠的二標準引腳%旁,此二第二參考點 201125091 32、34的所纽置分別作為二第二參考位置。 下-步如步驟S16所示,對打線區域影像與標準導線架圖形之每 腳’分別給-獨立之第_、第:細,且每—第―、第:虛擬碼係分別 相互對應。舉例來說,在第2(_之打線區域影像Μ中由於引腳 量為個,因此可於打線區域影㈣上,爾近第—參考點 ㈣,依順時針方向,依序給予W⑻之第—虛料。此第—虛擬碼不— 疋要限制在從i開始,顧結束,只要每,_虛_ ,同即可。《地,於標彻_12上,從最軸:參考點 準引依順時針方向,依序给予!〜_之第二虛擬碼。此第二虛料 料疋要限制在從!開始,並從1〇〇結束,只要每一個第二虛擬碼的號 ==^__咖,峨編鄭〜 以下請同時參閱第1圖及第侧至第3⑷圖。 虛擬碼給予之後,如步驟Sl8所示,將打線區域影像 細線化處理,以分別取猎一以腳進仃 ㈣之/舉例來說,如第3(撕示,打線區 ^像H)之每-彳丨㈣物㈣3_虛輪。 姉並未準確地位於每一引腳18之對稱中軸上。 引聊中 因此’便進行下-步驟,如步驟⑽所示,對引腳 補,以分別得到恤㈣,__中㈣ = 對稱中轴上。舉例來說,如第3(b)圖所 2弓I腳之 的引腳理想中㈣㈣線絲,且^ ^像1G之每-引㈣ 上。 ,、鱗確地位於母—彡丨腳之對稱中轴 201125091 接著如步驟S22所示,根據第一、第二參考位置之座標 線端點對應於打線區域影像 r异棕换 ⑴、式⑵、式⑴取得。此待校正絲_用下列式 ⑴ (2) (3)201125091 VI. Description of the Invention: [Technical Field to Be Invented by the Invention] The present invention relates to a positional method, in particular, a wire lead wire position detecting method. [Prior Art] Wire Bonding 'Commonly known as wire bonding is the most important process in the integrated circuit (10) package. The gold wire, the lining or the copper wire is used to connect the (4) gasket (PM) and the lead frame on the IC chip. Lead 'Transfers the electronic signal to be transmitted. After the package factory _ has manufactured the lead frame, the system will set the correct coordinate position of the wire _ each wire point according to the computer aided design (CM) icon corresponding to the guide _, with the ic function The more powerful, the more the number of fresh lines is 'more than hundreds of lines'. If a K is a line, the process engineer needs to spend 2 to 3 hours to complete the wire age. The setting, in this long and complicated mosquito, and the need for extreme care and patience, may not make any mistakes, it is possible to complete this almost impossible task. In recent years, the packaging factory has directly downloaded the coordinate position of each fresh line point in the CAD drawing through the program of the conversion program directly into the program of the wire bonding machine, instead of the traditional manual method. ― a coordinate position ^ In theory, through the program downloaded by (10), each thread of the wire bonding machine can be woven, and the positive gamma is set, but in practice, each fresh line point converted by the milk downloading program is set. Coordinate position (1) = drink, and actually the most (10) coordinate health, there is a certain gap, the main original line = there are two: one is the error of the design of the guide reticle 'Wei m domain design will The original design CAD drawing provided by the 201125091 packaging factory is adjusted as a reference. The main adjustments are related to the lead frame during the production or electroplating process; similarly, another reason is the variation in the manufacturing process of the lead frame; and the last one The reason is the offset of the original CAD drawing. When designing the CAD drawing, it is convenient for the personnel to watch, so that multiple lines falling on the same pin on the CAD drawing can be clearly distinguished to avoid misjudgment due to overlap, but will be deliberate These lines are not plotted in the axis of the pin, so that a gap to each other, so that after conversion to the terminal lead frame need to manually corrected to the shaft end. For the above reasons, even if the program is downloaded through CAD, the coordinate position of each of the converted glow points still needs to be difficult to pass through. However, in the process of manual adjustment, the Ministry cannot completely avoid the adjustment error due to the loss, and the wrong position of the wire bond point is generated and the fused wire is connected to the wrong pin. Hit-mine samples and carefully check to avoid the occurrence of mis-welding lines. The wire bond cannot be reworked, and the wire bond cannot be repaired to the correct wire position. This is a heavy question and usually requires a huge amount of compensation. Until now, the package has been extremely expensive _, over the microscope, and the position of each wire point is checked correctly. To solve the problems caused by the knowledge. Disturbing (9) - a kind of lead wire position detection method, [Summary of the invention] The position of the end point of the guide is abruptly cut by the work industry, and the slave line also greatly reduces the time required for the operation of the person. 4 wrong welding line caused by negligence, 201125091 In order to achieve the above purpose, the present invention provides a method for detecting the position of the lead frame, first obtaining an image of the wire area of a lead frame, and corresponding to the standard lead frame pattern, the standard The lead frame pattern is marked with a complex index, _ point. Then, the line_image and the standard line are respectively finely shaped. At least two first and second reference positions are indicated, and the riding first and second reference positions respectively correspond to each other. Then, for each of the wire area image and the standard wire _ shape, a separate first and second virtual horses are respectively given, and each of the first and second virtual codes respectively correspond to each other. In the next step, each pin of the wire area image is thinned to obtain the #axis of one pin, and then the axis of the pin is removed and repaired to obtain the ideal center axis of the pin. The next step is to calculate the coordinate to be corrected corresponding to the image of the wire area according to the coordinates of the first and second reference positions, and finally correct the county to be corrected by the correspondence between the first and second virtual codes. The wire has been calibrated and made to work on the (10) ideal axis. For the purpose of making the structure and characteristics of the present invention, the reviewer and the detailed understanding of the present invention can be improved by the description of the preferred embodiment and the detailed description, as follows: [Embodiment] In view of the fact that the manual method is used to detect the end points of the wire ends of the lead frame, it is quite time-consuming and laborious to record the error. Therefore, the present invention provides a method for detecting the position of the wire frame of the lead frame. As shown below, please refer to Fig. 1 and Fig. 2(a) to Fig. 2(b). The lead frame has two kinds of substrate lead frame and metal lead frame. The following is a description of the metal lead frame. First, if the image of the wire area of a lead frame is not obtained in step S10, and the image of the wire area of the corresponding & lead wire frame is taken as the actual shooting, the standard wire (4) is shaped as the electric auxiliary 4 (CAD). The standard wire bond end points, in addition, the wire area 201125091 image and standard wire frame graphics are grayscale image and grayscale graphics. For example, as shown in the figure a (4), the left side is deleted as the above-mentioned wire area image 10, and the right side picture is the standard wire frame pattern 12 'the wire area image 1G contains the integrated circuit (10) base 14 and the Weiwei Road The bottom of the money connection is 丨6' and distributed over the four complex pins ls. Similarly, the standard lead frame pattern 12 includes a standard integrated circuit (IC) base 2〇, and a standard support connected to the standard integrated circuit base 2〇. The frame 22, and a plurality of standard pins 24 distributed around the periphery, and μ on the standard pins, are labeled with a plurality of standard wire end points 26. Then, as shown in step S12, the line image and the standard lead frame pattern are binarized. The line area image and the fresh line are finely divided into black and white images and images. For example, in the 2nd (a) diagram, the integrated circuit base of the wire area image 10...the support frame and the plurality of pins 18 are in the color of the job, and the rest are white, and the standard of the wire frame pattern Η The integrated circuit base 20, the standard support frame 22, the plurality of standards (10) 24, and the standard wire end points 26 are all black, and the rest are white. Then, as shown in step SM, 'because the line area image is extremely similar to the standard lead frame pattern, the line area image and the standard lead frame pattern respectively indicate at least two first and second reference positions, and each of the first and second positions. The reference positions are respectively corresponding to each other. In this embodiment, the number of the first and second reference positions are both taken as an example, and the distance between the two first reference positions is as good as possible, and the second reference positions are further apart. Far better, because it helps to coordinate the coordinates afterwards. For example, as shown in Figure 2(b), the line area image 1 is marked with two first reference points 28 and 3, which are respectively placed next to the two pins 18 which are farthest apart. The positions of a reference point 28, 30 are respectively taken as two first reference positions. Similarly, the standard lead frame pattern 12 is marked with two second reference points 32, 34' which are respectively disposed next to the two standard pins % which are farthest apart, and the second reference points 201125091 32, 34 are placed. As the second second reference position. The next step is as shown in step S16, and the respective lines of the line area image and the standard lead frame pattern are respectively given - independent, and the first and the first: the virtual code systems respectively correspond to each other. For example, in the second (the line image area of _, because the amount of pins is one, it can be given in the line area (4), near the first - reference point (four), in the clockwise direction, sequentially given W (8) - imaginary material. This first - virtual code is not - 疋 to limit from the beginning of i, the end of the end, as long as each, _ virtual _, the same. "Ground, on the standard _12, from the most axis: reference point In the clockwise direction, the second virtual code is given in order!~_. The second virtual material is limited to start from ! and end from 1〇〇, as long as the number of each second virtual code == ^__咖,峨编郑~ Please refer to the first picture and the first side to the third (4) picture. After the virtual code is given, as shown in step S18, the line area image is thinned to take a foot. In the case of (4), for example, every 3th (4) (4) 3_ virtual wheel of the third (tear, line area ^ H) 姊 is not accurately located on the symmetrical central axis of each pin 18. In the chat, therefore, the next step is performed, as shown in step (10), to complement the pins to get the shirt (4), __ (4) = symmetrical on the axis. For example For example, in the figure 3(b), the pin of the bow I is ideally in the (four) (four) wire, and ^ ^ is like 1G on each - (four), and the scale is located in the mother-squat symmetry axis 201125091 Then, as shown in step S22, the endpoints of the coordinate lines according to the first and second reference positions are obtained corresponding to the line-of-line image r (1), (2), and (1). The wire to be corrected is represented by the following formula (1) (2) (3)

Xw= (RxXcad) +Xc Yw= (RxYcad) +Yc R=Dj/ 〇2 為每’_正蘇之水平座標’Yw為待校正絲之垂直座標,x⑽ 碑銲線端縣標⑽線細形上之水平鋪,絲 =::在標準導齡圓形上之垂直座標,&為打線區域影像之積體電路底 之欠平座心’ Yc為打線區域影像之積體電路底座中心之垂直座;P, D1為二第—參考位置之間的距離…為二第二參考位置之間的距離/ 舉^來說上财式對第3(_之打線區域影像10計算每一待校 正則如第3⑹圖所示,可得到與標準銲線端點對應之複數鲜線端點 ’其中每個銲線端·點40的待校正座標並非皆位於引腳理想中轴%上, 此些銲線端點40係包含第一、第二鲜線端點42、糾,如第一輝線端點42 犧正細__谢㈣上,陳銲_ 44的待校正座 私則未位在引腳理想中軸38上。 由於打線區域影像與標準導線架圖形之每一引腳都有對應之虛擬碼, 因此再來_由第-、第二虛擬碼之職_,修正待校正座標為已校正 座標,並使其位於對應之⑽理想中軸上,以避免錯銲線的發生。 ,飾_如_ S24所示’藉由上价、第:虛_之對應關係, 靖母-雜正座標是否位於對應之引腳理想中軸上,若是,則如步驟伽 201125091 所示,結束整鑛程;的,則 8所7F,則修正待校正座標μ 校正座&,雜其錄對應之_ τ釉上舉例來說,在第3(c)圖中, 右對第一銲線端點42進行判斷,則 中 發現其雜正座標係位在引腳理想中軸 38上,因此不進行任何動作。但若 待h— 作―*線端點44進行判斷’則發現其 待扠正座標未位在引腳理想中軸 挪 ㈣上’因此修正其待校正座標為已校正座 並使其位於對應之引腳理㈣38上,如第咖所示。其中還要注 思,銲線端點4〇的待校正座標麵行修正時,賴最接近對應之已 標。 此外修正的同時’轉之二已校正座標相距距離係大於或等於一預 設安全距離,且每-已校正座標與對應之引腳的下緣相距距離,係大於或 等於-預設警示距離。舉例來說,如第4圖所示,第一、第二鲜線端.點42、 44係相距-預設安全距離a,以避免未來在進行打線時,銲線因為輝線端 點過於接近而造成彼此破壞的踰。另外,第一、第二鲜線端點 引腳18之下緣46相距的距離,係大於一預設警示距離,以免造成實際打 攀線時,端點超出引腳範圍之風險。 以上為金屬導線架之打線位置檢測法流程,若導線架為基板導線架 “時’由於打線區域影像上的引腳常有變形、露金、位移等問題,常會導致 •引腳編號不—致的情形。因此在第1 ®中,於步驟SM後,必須先進行一 影像修正步驟,其係將打線區域影像與標準導線架圖形互相重疊,以利用 粒子群最佳化法(Particle Swarm0ptimizati〇n,ps〇)找出打線區域影像與 標準導線架圖形之重疊區域,並藉此對打線區域影像進行修正,也就是刪 除重疊面積不夠大的區域,以過濾露金、減少引腳變形、弓丨腳平移或引腳 201125091 寬度不-_擾,最後再進行步驟⑽。在給予對應之虛擬碼時,不需依照 順時針方向給予’只需要確認每則腳都給到即可。 不管是對於金屬導線架或基板導線架而言,由於端點校正需要高解析 度的衫像來類實際銲線概是純於腳上準確可靠的位置,而礙於相 機本身低騎度的_,必觀用第5圖之流程方法,以取得上述導線架 之高解析度的打線區域影像。首先如步驟咖所示,利用相機,如工業級 的電荷耦合器(charge-coupleddevice,CCD)灰階相機,職 個區塊進行拍攝取像,以得到複數個導線架子影像。接著如步驟如所示, 結合此複數個導線架子影像,以得到一完整導線架影像。最後如步驟伽 所示,透過去除導線架影像中導線架打線區域以外的影像,取得一導線架 之打線區域影像。 ^ 表-是將本發明提供的技術進行實驗,並與以人工方式進行導線架位 置檢測之先前技術加以比較,發現在校正時間上,本發明至少比人工方式 快60倍,且引腳數與端點數愈多’職_現其高效率此乃本發明之^ 越之處。Xw= (RxXcad) +Xc Yw= (RxYcad) +Yc R=Dj/ 〇2 is the horizontal coordinate of each '_正苏'Yw is the vertical coordinate of the wire to be corrected, x(10) The wire end of the wire is the county standard (10) line fine Horizontal paving, silk =:: vertical coordinate on the standard lead-in circle, & is the under-seat center of the integrated circuit at the end of the line image. Yc is the vertical center of the integrated circuit base of the line-up area image Seat; P, D1 is the second - the distance between the reference positions ... is the distance between the two second reference positions / the upper limit is the third (the line area image 10 is calculated for each to be corrected) As shown in Figure 3(6), the end points of the plurality of fresh lines corresponding to the end points of the standard wire bonds are obtained. The coordinates to be corrected of each of the wire ends and the points 40 are not all located on the ideal axis % of the pins. The line end point 40 includes the first and second fresh line end points 42 and the correction, such as the first bright line end point 42 is on the __ Xie (four), and the Chen _ _ 44 to be corrected is not at the pin. Ideally on the axis 38. Since the line area image and the standard lead frame pattern have corresponding virtual codes for each pin, the _ by the first and second virtual codes _, correct the coordinate to be corrected as the corrected coordinate, and make it on the corresponding (10) ideal central axis to avoid the occurrence of the wrong welding line. , _ _ S24 as shown by 'upper price, the first: virtual _ corresponding Relationship, whether the Jingmu-Miscellaneous coordinate is located on the ideal axis of the corresponding pin, and if so, the process is completed as shown in step 2011201125091, and the 8N is corrected, then the coordinate to be corrected μ correction seat & For example, in the 3rd (c) diagram, the right end of the first bonding wire 42 is judged, and the misaligned coordinate system is found in the pin ideal axis 38. Up, therefore, no action is taken. However, if h_ is made to the "* line end point 44 to judge", it is found that the to-be-forged positive coordinate is not on the pin's ideal axis shift (4). Therefore, the coordinates to be corrected are corrected to be corrected. The seat is placed on the corresponding pin (4) 38, as shown in the first coffee. It should also be noted that when the end point of the wire end is corrected, the coordinate surface to be corrected is corrected, and the closest is corresponding to the marked mark. At the same time, the 'turned two corrected coordinates are separated by a distance greater than or equal to a preset Full distance, and the distance between each-corrected coordinate and the lower edge of the corresponding pin is greater than or equal to - the preset warning distance. For example, as shown in Figure 4, the first and second fresh line ends. Points 42 and 44 are separated by a preset safety distance a to avoid the damage of the bonding wires due to the proximity of the ends of the glow wires when the wires are being wired in the future. In addition, the first and second fresh wire terminal pins 18 The distance between the lower edge 46 is greater than a preset warning distance, so as to avoid the risk that the end point exceeds the pin range when actually climbing the line. The above is the wire position detection process of the metal lead frame, if the lead frame is the substrate When the lead frame "time" is often deformed, exposed to gold, or displaced due to the pins on the image of the wire area, it often causes the pin number not to be caused. Therefore, in the 1st, after the step SM, an image correction step must be performed, which overlaps the line area image and the standard lead frame pattern to utilize the particle swarm optimization method (Particle Swarm0ptimizati〇n, ps〇) Find out the overlap area between the image of the wire area and the standard wire frame pattern, and use this to correct the image of the wire area, that is, delete the area with insufficient overlap area to filter the gold, reduce the pin deformation, bow and foot translation or Pin 201125091 width is not - _ disturb, and finally step (10). When the corresponding virtual code is given, it is not necessary to give it in a clockwise direction. It is only necessary to confirm that each foot is given. Regardless of the metal lead frame or the substrate lead frame, since the end point correction requires a high-resolution shirt image, the actual wire bond is pure and accurate on the foot, and the camera itself is low in riding. It is necessary to use the flow method of Fig. 5 to obtain a high resolution wire area image of the above lead frame. First, as shown in the step coffee, a camera, such as an industrial-grade charge-coupled device (CCD) gray-scale camera, is used to take a picture to obtain a plurality of wire shelf images. Then, as shown in the steps, the plurality of wire shelf images are combined to obtain a complete lead frame image. Finally, as shown in the step gamma, an image of the wire area of a lead frame is obtained by removing the image outside the wire frame area of the lead frame image. ^ Table - is the experiment of the technology provided by the present invention, and compared with the prior art of manually performing lead frame position detection, it is found that the present invention is at least 60 times faster than the manual method in the correction time, and the number of pins is The more the number of endpoints, the more efficient it is, the more it is.

端點數:176 引腳數:216 35秒 (約)48分鐘Number of endpoints: 176 Pins: 216 35 seconds (about) 48 minutes

端點數:303 38秒 (約)90分鐘 “述’本發明, 201125091 並將其與原CAD _進行比對,以校正實際銲線端點的位置,此法可取代 人工作業及避免因為人為疏麟導致的錯銲線,也大幅縮減人卫作業 的時間。 以上所述者,僅為本發明-較佳實施_已,並義來限林發明實 施之範圍,故舉凡依本發明巾請專利細所述之形狀、構造、特徵及精神 所為之均等變化與修斜’均應包括於本發明之_請專利細内。 【圖式簡單說明】Number of endpoints: 303 38 seconds (about) 90 minutes "Description of the present invention, 201125091 and compare it with the original CAD _ to correct the position of the actual wire end, this method can replace manual work and avoid artificial The mis-welding line caused by Shulin also greatly reduces the time for the operation of the people. The above is only the scope of the present invention - the preferred embodiment has been implemented, and the scope of the invention is limited. The uniform changes and trimmings of the shapes, structures, features and spirits described in the patents are to be included in the patents of the present invention. [Simplified illustration]

第1圖為本發明之檢測流程圖。 第2(a)圖至第2(b)圖為本發明對—導線架之打線區域影像,及與其對應之標 準導線架圖形進行各步驟處理的結構示意圖。 第3(a)圖至第3(d)®對打、線區域影像進行各步驟處理的結構示意圖。 第4圖為本發明之第一、第二銲線端點位於腳位上之示意圖。 第5圖為本發明之打線區域影像的取得流程圓。Figure 1 is a flow chart of the detection of the present invention. 2(a) to 2(b) are schematic views showing the structure of the wire-bonding area image of the lead frame and the corresponding standard lead frame pattern. 3(a) to 3(d)® are schematic structural diagrams for processing each step of the hit area and line area image. Figure 4 is a schematic view showing the first and second bonding wire ends of the present invention on the pin position. Fig. 5 is a flow chart for obtaining the image of the wire area of the present invention.

【主要元件符號說明】 1〇打線區域影像 14積體電路底座 Μ引腳 22標準支撐架 26標準銲線端點 30第一參考點 34第二參考點 38弓丨腳理想中轴 12標準導線架圖形 16支撐架 20標準積體電路底座 24標準引腳 28第一參考點 32第二參考點 36引腳中軸 40銲線端點 201125091 42第一銲線端點 44第二銲線端點 46下緣[Main component symbol description] 1 〇 line area image 14 integrated circuit base Μ pin 22 standard support frame 26 standard wire end point 30 first reference point 34 second reference point 38 bow foot ideal axis 12 standard lead frame Graphics 16 support frame 20 standard integrated circuit base 24 standard pin 28 first reference point 32 second reference point 36 pin middle axis 40 wire end point 201125091 42 first wire end point 44 second wire end point 46 edge

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Claims (1)

201125091 七、申請專利範圍: 1. 一種導線架打線位置檢測法,其係包含下列步驟: 取付-導雜之打龍域影像,及_與其對狀鮮導線軸形,該掉 準導線架圖形標有複數標準銲線端點; 於該打線區域影像與該標準導線架圖形分別標示至少二第一、第二參考 位置,且每一該第一、第二參考位置係分別相互對應; 對該打線區域影像與該標準導線細形之每—引腳,分別給—獨立之第 • _、第二虛擬碼’且每—該第―、第二虛擬碼係分別相互對應; 將該打線區域影像之每—該引騎行細線化處理,以分得1腳中 轴; 對该引腳中轴進行移除及修補,以分別得到引腳理想中軸; 打線區域影像之待校正座標;以及 根據該些第-、第二參考錄之座標,計算婦鮮銲線概對應於該 藉由該第―、第二虛擬狀對應_,修正雜校正座縣已校正座標, 並使其位於對應之該引腳理想中軸上。 2·如申請專利範圍第i項所述之導線架打線位置檢測法,其中在藉由該第 第虛擬碼之對應關係,修正該待校正座標為該已校正座標之步驟 中’更包含下列步驟: 藉由該第-、第二虛擬碼之對應關係 對應之該引腳理想中軸上: 若是,結束;以及 ’判斷每-該待校正座標是否位於 並使其位於對應之該亏丨 若否,則修正該待校正座標為該已校正座標 13 201125091 腳理想中轴上。 3. 如申。_觸1項所述之輸打線位置檢職,其中在取得該導 線架之該打線區域影狀步财包含下列步驟: 將該導線架分成複數個區塊進行拍攝取像,以得到複數個導線架子影像. 結合該些導線架子影像,以得到一完整導線架影像;以及從該完整導線 架影像中擷取該打線區域影像。 4. 如申請專利第丨顧叙導線⑽了線錢檢耻,其巾該標準導線 架圖形為電腦輔助設計(CAD)圖檔。 5·如申請專利細第丨項所述之導線架打線位置檢測法,其中該打線區域 影像與該標準導線_形係分稱灰階影像與灰階圖形。 6. 如申請專利範圍第1項所述之輪打線位置檢測法,其中在取㈣打 線區域影像與該標準導線架圖形之步驟後,更可對該打線區域影像卿 標準導線架圖形進行二值化處理,再進行對該打線區域影像與該標準導 線架圖形分別標示該等第一、第二參考位置之步驟。 7. 如申請柄關第〖項所紅祕针軸雜齡,其 金屬導線架。 8. 如申請專利範圍第1項所述之導線架打線位置檢測法,其中該待校正座 標係利用下列公式取得: Xw= (RxXcad) +Xc ; Yw= (RxYcad) +YC ;以及 ㈣〜其中Xw為該待校正座標之水平座標,Yw為該待校正座標之 垂直座標’ X⑽為每一該標準銲線端點在該標準導線架圖形上之水平 201125091 座標,YCAD為每一該標準銲線端點在該標準導線架圖形上之垂直座 標,χ〇為該打線區域影像之積體電路(ic)底座中心之水平座標,Yc 為該打線區域影像之積體電路底座中心之垂直座標,&為該二第一參 考位置之間的距離,D2為該二第二參考位置之間的距離。 9. 如申請專利範圍第1項所述之導線架打線位置檢測法,其中該已校正座 標係最接近該待校正座標。 10. 如申請專利細第丨項所述之導線架打線位置檢齡,其中相鄰之該二 已校正座標相距距離係大於或等於一預設安全距離。 11·如申請專觸圍第1項所述之導線架打線位置制法,其巾該些已校正 座標與對應之該引腳的下緣相距距離,係大於或等於一預設警示距離。 以如申請專利範圍第丨項所述之導線架打線位置檢測法,其中該導線架為 基板導線架。 13. 如申請專利範圍第12項所述之導線架打線位置檢測法,其中在於該打線 區域影像與該標準導線架圖形分別標示至少二該第_、第二參考位置之 娜後’係進行-影像修正步驟,其係職打線區域影像與該標準導線 架圖形互相重疊’以找出該打線區域影像與該標準導線架圖形之重叠區 域,並藉此對該打線區域影像進行修正,再進行對該打線區域影像與該 標準導線架圖形之每-該引腳,分別給該獨立之第一、第二虛擬碼之步 驟。 14. 如申請專侧第U項输獅打幢檢,其巾該影像修正 步驟中,細-粒子縣佳化法(Partideswann0ptimizatk)n,pso) 執行。 15201125091 VII. Scope of application for patents: 1. A method for detecting the position of the lead frame, which includes the following steps: Take the image of the dragon-domain of the miscellaneous-difference, and _ the shape of the fresh-shaped wire with the opposite direction. There is a plurality of standard wire end points; the wire area image and the standard wire frame pattern respectively indicate at least two first and second reference positions, and each of the first and second reference positions respectively correspond to each other; The area image and each of the thin wires of the standard wire respectively give an independent - _, a second virtual code 'and each of the first and second virtual code systems respectively correspond to each other; Each--the riding line is thinned to obtain the 1-pin central axis; the axis in the pin is removed and repaired to obtain the ideal center axis of the pin; the coordinates of the line-area image to be corrected; and according to the - the coordinates of the second reference record, the calculation of the mating welding line corresponds to the corresponding - and the second virtual shape corresponding _, correcting the corrected coordinates of the miscellaneous correction seat, and making it corresponding to the pin Ideal on the axis. 2. The lead frame wire position detecting method according to item i of claim 1, wherein in the step of correcting the coordinate to be corrected as the corrected coordinate by the correspondence of the first virtual code, the step further comprises the following steps: : the pin corresponding to the corresponding relationship between the first and second virtual codes is on the ideal axis: if yes, ending; and 'determining whether each of the coordinates to be corrected is located and causing the corresponding deficit to be negative, Then, the coordinates to be corrected are corrected to be on the ideal central axis of the corrected coordinate 13 201125091. 3. If you apply. _ Touching the position of the transmission line as described in item 1, wherein the step of capturing the line area of the lead frame comprises the following steps: dividing the lead frame into a plurality of blocks for taking images to obtain a plurality of wires Shelf image. Combine the wire shelf images to obtain a complete lead frame image; and capture the wire area image from the complete wire frame image. 4. If the patent application No. 丨GuSui wire (10) has a shame on the wire, the standard wire frame pattern of the towel is a computer aided design (CAD) image file. 5. The lead frame wire position detecting method according to the patent application specification, wherein the wire area image and the standard wire shape are classified into a gray scale image and a gray scale pattern. 6. The method for detecting the position of the wheel line according to item 1 of the patent application scope, wherein after the step of taking the image of the (4) line area and the pattern of the standard lead frame, the value of the standard lead frame pattern of the line area image can be doubled. And processing, the step of indicating the first and second reference positions respectively on the line area image and the standard lead frame pattern. 7. If the application handle is the same as the red needle axis of the item, the metal lead frame. 8. The lead wire position detection method according to claim 1, wherein the coordinate to be corrected is obtained by the following formula: Xw=(RxXcad) +Xc; Yw=(RxYcad)+YC; and (4)~ Xw is the horizontal coordinate of the coordinate to be corrected, Yw is the vertical coordinate 'X(10) of the coordinate to be corrected is the level 201125091 coordinate of each standard wire end point on the standard lead frame graphic, and YCAD is each standard bonding wire The vertical coordinate of the end point on the standard lead frame pattern is the horizontal coordinate of the center of the integrated circuit (ic) of the line image, and Yc is the vertical coordinate of the center of the integrated circuit base of the line area image, & For the distance between the two first reference positions, D2 is the distance between the two second reference positions. 9. The lead frame wire position detection method of claim 1, wherein the corrected coordinate system is closest to the coordinate to be corrected. 10. If the lead frame is in the position of the wire as described in the application specification, wherein the adjacent corrected coordinates are greater than or equal to a predetermined safety distance. 11. If the lead frame wire position method described in Item 1 is applied, the distance between the corrected coordinates and the corresponding lower edge of the pin is greater than or equal to a preset warning distance. The lead frame wire position detecting method according to the invention of claim 2, wherein the lead frame is a substrate lead frame. 13. The lead frame wire position detecting method according to claim 12, wherein the wire area image and the standard wire frame pattern respectively indicate at least two of the first and second reference positions are followed by a system- In the image correction step, the contact line area image and the standard lead frame pattern overlap each other to find an overlapping area between the line area image and the standard lead frame pattern, and thereby correct the line area image, and then perform the pair The wire area image and each of the standard lead frame patterns are respectively provided to the independent first and second virtual code steps. 14. If you apply for the special U-zone lion screening test, the towel will be executed in the image correction step, Partideswann0ptimizatk n, pso). 15
TW099101079A 2010-01-15 2010-01-15 Method for detecting wiring location of wire rack. TW201125091A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI818614B (en) * 2022-07-04 2023-10-11 日商新川股份有限公司 Semiconductor device manufacturing apparatus and manufacturing method

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6362241A (en) * 1986-09-02 1988-03-18 Toshiba Corp Wire bonding method
JPH0810715B2 (en) * 1989-03-24 1996-01-31 株式会社カイジョー Wire bonding method
JP2672695B2 (en) * 1990-07-12 1997-11-05 ローム株式会社 Bonding equipment for integrated circuits
JP3215871B2 (en) * 1992-06-19 2001-10-09 ティーディーケイ株式会社 Wire bonding visual inspection device
JPH0835474A (en) * 1994-07-26 1996-02-06 Ngk Spark Plug Co Ltd Secondary voltage waveform detector for internal combustion engine
US5731244A (en) * 1996-05-28 1998-03-24 Micron Technology, Inc. Laser wire bonding for wire embedded dielectrics to integrated circuits
US6068174A (en) * 1996-12-13 2000-05-30 Micro)N Technology, Inc. Device and method for clamping and wire-bonding the leads of a lead frame one set at a time
JP2000216188A (en) * 1999-01-22 2000-08-04 Seiko Epson Corp Wire bonding method, semiconductor device, circuit board, electronic device, and wire bonding device
KR100896828B1 (en) * 2001-10-26 2009-05-12 외르리콘 어셈블리 이큅먼트 아게, 슈타인하우젠 Method for the calibration of a wire bonder
TWI242251B (en) * 2004-08-11 2005-10-21 Advanced Semiconductor Eng Method for auto checking wire bonding parameters

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI818614B (en) * 2022-07-04 2023-10-11 日商新川股份有限公司 Semiconductor device manufacturing apparatus and manufacturing method

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