201123449 六、發明說明： 【發明所屬之技術領域】 本發明係關於-種液晶顯示裝置（LCD)。 【先前技術】 通常’液晶顯稀置之巾具有介電各向異性之液晶的透光率 透過電場控制’用以顯示一影像。此液晶顯示裝置通常透過將 -彩色濾、光陣列基板與—細電晶體_基板相結合，並且透過 其間包含有一液晶層製成。 近來，幾種新模式的液晶顯示裝置（LCD)正在開發以解決 習知技術之液關稀置（LCD) _姻。具有寬則的液晶 顯不裝置（LCD)可分類為一平面浦模式（Ιη·ρι·Switching， IPS)' ( Optically Compensated Birefringence, 〇CB)模式、—邊緣電場切換（FringeField Switching, FFS)模式、 或其他模式。 在具有寬視角之液晶顯示裝置（LCD)之中，平面切換（ips) 模式液晶顯示裝置允許—畫素電極與—共同電極排列於同一基板 之上以使得水平電場感應於這兩個電極之間。同樣，液晶分 子之主轴在關於該基板之一水平方向上排列。因此，平面切換 (IPS )模式之液晶顯示衷置相比較於習知技術之扭轉向列 (TwistedNematie，TN)模式液晶顯示裝置具有—更寬之視角。 「第1圖」係為習知技術之平面切換（IPS)模式之 裝置之中的-晝素結構之示意圖。「第2圖」係為沿「第⑽:之 U’線之畫素結構之橫截面圖。 201123449 :參閱「ϋ圖」及「第2圖」閑極線】與一資 *目乂又讀歧義-晝素區域。—用作開 TFT位於閘極線〗與資料線5之交又處。 ㈣電曰曰體 ，畫素區域之上，—與閘極線i相對之第—共同線3 ^相交又，第-共同電極3&自第—共同線3延伸出且與資料線 相+订，並且第一共同電極3a形成於晝素區域之兩側面。 閘極線1包含有一具有加寬寬度之間極&。 6相鄰於閘極ia。第一儲存電 電極 存電極與第—共同電極3a形成為-單 •丹问線3電連接之第 叩且 〜不一六·鬥琢υ桫成於第一 ^ 上。第二共同電極以自第二共同線13朝向晝素區域 中。此外’與第一共同電極3a部份相重疊的第三共同電極 自第二共同線13延伸出。 查第二共同電極l3a與晝素電極？a交替配設於畫素區域之中。 旦素電極7a自與第—儲存電極6相重疊的—第二儲存電極7延伸 出。 「第2圖」表示沿資料線5之一區域中的w，線之橫截面圖， 在「第2圓」之中，一閘極絕緣膜12形成一底基板10之上。資 料線5形成於閘極絕緣膜12之上。排列於資料線5之兩側的第一 八同電極3a形成於底基板1〇之上。第三共同電極13b形成於一 保5蒦（或鈍化）膜19之上且與第一共同電極3a部份相重疊。 彩色濾光陣列基板包含有一黑矩陣21，黑矩陣21與資料線相 對。黑矩陣21形成於一頂基板20之上。-紅色（R)滤、光層25a 6 201123449 及一綠色（G)濾光層25b形成於黑矩陣21之兩側面。"29〃代 表一覆蓋層。 如此之一習知技術之平面切換（ips)模式液晶顯示裝置迫使 黑矩陣21之寬度L1變得更寬，用以防止透過背光單元產生且圍 繞畫素區域之邊緣傳送的光線產生之光線洩漏。更具體而言，黑 矩陣21形成為到達第一共同電極％之一邊緣，以便在關於一垂 直線傾斜至少一悝定角度的方向上，中斷光線在資料線5與第一 共同電極3a之間通過。由於此原因，畫素區域之孔徑比降低。 此外’由於第一共同電極3a排列於資料線5之兩側面，因此 對於習知技術之薄膜電晶體陣列基板在臨界值之上增加晝素區域 之孔徑比比較困難。 【發明内容】 因此鐾於上述之問題，本發明關於一種薄膜電晶體陣列基 板，藉以消除由於習知技術限制及缺騎產生—個或多個問題。 本發明之目的之-在於提供_種雜電晶斷板及其製 造方法，其透過在—資料線之上配設—制f極適合於增加畫素 區域之孔徑比。 ' 生本發明之另-目的在於提供—種祕電晶體_基板及其製 造方法’其_制—半色調鮮及―繞射光罩之―，適合於防 止第二共同電極與—資料線之下形成的通道層圖案之間的短路缺 陷。 、 本發·_缝及優簡親本發明如下的得以部分 地理解或者可以從本發_實射得出。本發明的目的和其他= 201123449 點可以透過本發明所記載的說明書和申請專利範圍中特別指明的 結構並結合圖式部份，得以實現和獲得。 根據本發明之一般目的，一種薄膜電晶體陣列基板包含有一 基板；一閘極線及一資料線，閘極線與資料線彼此相交又排列用 以在基板之上疋義一晝素區域；一開關元件，其位於閘極線與資 料線之一交叉處；複數個第二畫素電極及複數個第一共同電極， 这些第二畫素電極與第一共同電極相交替排列於基板上的一保護 膜之上形成的晝素區域之中；―第二共同電極，其形成為與資料 線相重疊，其中資料線位於一閘極絕緣膜與一保護膜之間丨一第 -儲存電極，其形成於基板之上；—第二儲存電極，其形成為與 第-儲存電極相重疊且與關元件之—錄形成為—單一體；以 及-有機絕賴，此有觀緣卿成於關元件、第二儲存電極、 資料線、一閘極墊、以及一資料墊之上，其 ^ τ第一共同電極形成 ’、、▲板之上的㈣線、保護膜錢有機絕_，且具有到達 晝素區域之中的保護膜之傾斜表面。 /、 法包般目的，—㈣職晶斷板之製造方 3 &供基板，喊—第—金屬膜於基板之上 一第一光罩製程將第-金屬卿成醉 ^ 隹—計^ 、傾閘極、-閘極線、- 儲錢極以及-閘極墊；順次形 層、以>5一笛Μ 只人械閘極絕緣膜、-半導體 第一冬恩屬膜於基板之上，並且通過—第二光罩製程自 -屬臈及半導體層形成源極 料線、一通道層以及-資料塾；順—料—第r儲存電極、一資 臈於基板之上及—有機絕緣 上並且通過-第三光罩製程形成有機絕緣膜之圖案 8 201123449 用以暴露保護膜之-部份；順次執行第—及第二㈣步驟，第一 及第二_步驟之巾形成_的有機絕緣顧作—_光罩且透 過使用不同氧氣含量比祕觀體，用以形成保護膜之上的一晝 素區域、-暴露第二儲存電極的第—接觸孔及—暴露閘極塾的第 二接觸孔·’以及形成-第三金屬膜於基板之上，以及然後將晝素 區域中的第三金屬獻成為複數個晝素電極及複數個 電極。 ^ 並且本發明其他的域、方法、特徵及優點對於本領域的普 通技術人S來說’可以透過以下圖式及詳細說賴得清楚。應該 理解的是财如狀其他_、方法、賊及優點包含於本說明 本發明之範圍之内，並且透過以下之申請專利範圍 付到保4。本部份之内料看作對申請專利翻之限制。更多方 面及優點將結合以下實施例進行討論。可紐解的是，如上所述 的本發明之__和隨後_的本_之詳細朗均是具 =請馳的，並且是為了進—步揭示本㈣之_請專 畢巳圍。 【實施方式】 ▲以下將結麵式雜詳細财本㈣之實酬。 嶋賴蝴嫩 之這些實施例 而且，應 一基板、一層 =實施射_林狀财，耻並稀祕在此描述 元件，例如 該理解的是在本發明之實施例中，當 、一區域、一臈、或一電極稱作形成於另一元件 201123449 之上或之下時，其可直接位於另一元件"之上戍，之下"， 或者可插人有（間接）從。-树β之上,，或„之可根據 圖式確定。在圖式之中，元件之尺寸為了清楚展示可放大，但是 並不表示元件之實際尺寸。 第3圖」係為本發明第一實施例之液晶顯示裝置之一畫素 區域之示意圖。 ^閱第3圖」’本發明第一實施例之液晶顯示裝置包含有 -=素區域，該晝素區域透過一閘極線犯與一資料線仍相交 叉疋義冑膜電晶體配設於閘極線215與資料線315之交叉處。 -第-共同線225在相鄰於閘極線215的位置 相平行。第-制線225鐘騎315椒。』極線215 閘極線215在與資料線315相交叉之區域相比較於其他區域 具有-加寬之寬度。閘板線之加寬寬度用作一薄膜電晶體FT 之閘極250。因此’閘極25〇與閘極線215形成為一單一體。薄膜 電晶體TFT包含有閘極25〇、一雜44〇、一沒極45〇、以及一通 道層（圖未示）。 而且，一第一儲存電極225a形成於晝素區域之中且與第一共 同線225形成為一體（自第一共同線225延伸出）。第一儲存電極 225a與第二儲存電極26()在晝素區域之中—起形成—儲存電容 器。第二健存電極26〇與第一儲存_225a相對。第二儲存電極 260與沒極450形成為一單一體（或延伸出）。 在晝素區域之中，一第一畫素電極240形成為與第一共同線 225相重疊’並且複數個第二晝素電極730自第一晝素電極24〇 201123449 朝向畫素區域延伸出且與資料線315相平行。複數個第二畫素電 極730以固定間隔排列於晝素區域之内。此外，第二儲存電極2的 通過第一接觸孔610與第一畫素電極240電連接。 而且，一第二共同線245形成為與第一共同線225及畫素區 域中的第一儲存電極225a相對。複數個第一共同電極74〇自第二 共同線245朝向晝素區域延伸且與資料線315相平行。而且，第 一共同電極740在畫素區域中與第二畫素電極730相交替排列。 ^ 一第二共同電極235自第二共同線245之兩側面延伸出以與 資料線315相重疊。第二共同電極235防止透過一背光單元（圖 未示）之光源產生且通過資料線315的一區域之光線引起的茂漏。 而且’第二共同電極23s通過一第三接觸孔㈣與第一儲存電極 心電連接。因此’一共同電壓通過第-共同、線225及第-儲存 電極225a提供至第二共同電極235、第—共同電極、以 二共同線245。 而且 之間。雖然圖未示 有機絕緣膜600位於第二共同電極235與資料線315 〜—通道案（請參閱「第5八圖」）位於資 /、’’ 之下。這是由於在本實施執行四個光罩製程之方法中， 同時形成資料線315及半導體層之圖案的事實所致。 圖案第二共㈣極235與資料線315之下形成的通道層 保護畴在域之液晶顯示裝置（LCD)允許一 一方法在接觸孔之形成期間使用一半色調光罩及一繞射光罩之 11 201123449 (口J α守 、深（仲出之閘極墊 執21“ 之—之巾…閘轉接觸電極71G形成於閘極 埶 4上_塾接觸電極710通過一第二接觸孔620與閘極 墊210相接觸。 第4A圖」至「第8B圖」係為一液晶顯示裝置之製造方法 圖’並且表示沿「第3圖」之IWI，線及麵，線之薄膜 電B曰體陣列基板之橫截面結構。 、月參閱第4A圖」及「第4B圖」，一第一金屬膜透過一喷 鑛方法沉積於—透8聽緣材料之缝板1GG之上。織，在一第 一光罩製簡間’對沉積的金屬膜執行—侧步驟。 在第光罩製程期間’-具有感光材料之光阻劑首先形成於 ，積的金屬默上。鎌此光阻舰過使用具有透親及非透射 區的光罩執仃曝光及顯影，由此形成—光阻圖案。其後，透過使 用光阻圖案作為-光罩個沉積之金屬膜，以使得形成一閘極 25〇、一第一儲存電極225a、以及一閘極墊210。並且同時形成一 閘極線215及-第一共同、線225。閘極線215與閘極25〇形成一單 一體。第一共同線225與第一儲存電極225a形成為一單一體。 第一金屬臈可自鉬（Mo)、鈦（Ti)、鈕（Ta)、鎢（w)、銅 (Cu)、鉻（Cr)、鋁（A1)、其合金或其組合物之一組中選擇一種 材料形成。雖然如圖所示，金屬膜形成於一單層之中，然而當需 要時’該金屬膜可透過堆疊至少兩個金屬層形成。 在閘極250等元件形成於底基板1〇〇上之後，如「第5a圖」 及「第5B圖」所示，一閘極絕緣膜200、一非晶矽膜及一摻雜非 12 201123449 B曰矽膜（n+或p+)之半導體層，以及一第二金屬膜順次形成於具 有上述之閘極250及第一儲存電極225a以及閘極墊21〇的底基板 100之上。 第二金屬膜可自銦（M。）、鈦㈤、組（Ta)、鎢銅 (Cu)、鉻（Cr)、！呂（A1)、其合金或其組合物之一組中選擇之一 種材料形成。而且，-例如氧化鋼錫⑽iumTin〇xide,IT〇)的 透明導電材料層可用作第二金屬膜。而且，雖然第二金屬膜如圖 所示形成-單層之中，但是當需要時，第二金屬膜可透過堆疊至 少兩個金屬層形成。 隨後’對覆蓋有第二金屬膜的底基板廳執行使用半色調光 罩及繞射光罩之-㈣二光罩製程，用以自第二金制形成源極 /及極440及450、-第二儲存電極26〇、以及一資料線315，並 且自半導體層形成—通道層340。雖細未示 ’還同時形成一資料 塾0 由於使用半色调光罩或繞射光罩通道層圖案挪存在於資 料線315之下。如「第5B圖」所示一儲存電容器形成於第一儲 存1：極225a與第二儲存電極26〇之間。其後，一保護膜形成 於底基板100之全部表面上。 口月參閱第6A圖」至「第6C圖」及「第7圖」，一有機絕 緣膜00七成於其上形成有保護膜的底基板之上，如「第 t圖」:斤一不。其後’對其上形成有有機絕賴600的底基板1〇〇 π -林製程’第三光罩製程之巾朗—具有全透射區 Ρ1非透㈣Ρ3、以及半透射區Ρ2的光罩娜。全透射區Ρ1與 13 201123449 基板上待形祕麻的_補應，並且半透紐p2絲板上待 形成一畫素區域的區域相對應。換句話而言，如「第6b圖」所示， 第三光罩製程完全去除與鮮85G之全透舰ρι姆應的有機絕 緣膜_肖以暴細蒦膜500，部份去除與光罩85〇之半透射區 P2相對應的有機絕緣臈6_以減少保護膜之厚度並且按 照原樣維持（即，不去除）與鮮㈣之非透射區p3相對應的有 機絕緣膜600。 有機絕緣膜600具有一相比較於保護膜5〇〇更低的介電常 數。有機絕緣膜_可具有一大約3 〇〜4 〇之介電常數。較佳地， 位於貝料線315與稱後形成的第二共同電極235 (請參閱「第犯 圖」）之_有機絕_ _具有大約為3 4〜3 8之介電常數。位 於資料線315與稍後形成的第二共同電極23s之間的有機絕緣膜 600可具有大約為3〜6微米（μπ〇之厚度。或者，有機絕緣膜_ 可根據液晶顯示裝置（LCD)之驅動辭具有不同之厚度。 隨著軸頻率變得更高，在資料線315與第二共同電極（「第 3圖」之235)之間產生的輕合效應產生一訊號延遲，其中該第二 〇同電鋪紗成於有機絕賴_之上。然而，本發明之液晶 顯不裝置（LCD)使用低介電常數的有機絕賴_，以使得減少 貝料線315與第—共同電極235之間產生的寄生電容。因此，可 防止訊號延遲。 更具體而言’寄生電容與資料線315及第二共同電極235之 間的距離成反比例。因此，資料線315與第二共同電極235之間 有機絕緣膜600之厚度越大，寄生電容越小。結果，可減少透過 201123449 k料線15與第—共同電極235之間的耗合效應產生的訊號延遲。 舉例而言，如果液晶顯示裝置（LCD)之驅動頻率設置為⑼ .赫兹㈤’資料線315與第二共同電極235之間的有機絕賴 600之厚度可為大約2 5〜3 5微米（帅）之範肋。或者，當液 晶顯示裝置（LCD)具有24〇_ (Hz)之驅動頻率時，有機絕 緣膜600之厚度可為大約55〜65微米（μιη)之範圍内。這樣， 由於當設計液晶顯示裝置（LCD)時此厚度並不設置為一固定值， 因此可根據液晶顯示裝置之規格而改變。而且，需要改變第二共 同電極235之位置，用以防止光線茂漏且提高晝素區域之孔徑比。 此種情況下，有機絕緣臈_可根據驅動頻率變得更薄或更厚。 此外，有機絕緣獏_可自一丙烯酸基樹脂形成 。丙烯酸基 樹脂包含有_辆_ ’但是並不限繼此。換句話而言，如果有 機絕緣膜600之材料具有一低介電常數，有機絕緣膜_並不限 制於光丙烯。 本實施例之液晶顯示裝置（LCD)之製造方法制的第三光 罩製程對底基板100執行曝光及顯影步驟。此時，去除與全透射 區P1相對應的有機絕緣膜600，用以暴露第二儲存電極26〇、問 極墊210、以及資料塾（圖未示）之上的保護膜。部份去除與半透 射區P2相對應的有機絕賴_，也就是說，與半透射區p2相 對應的有祕賴600之厚度減少且目此林雜細5⑻。不去 除與非透射HP3相對應的有機絕緣膜_。簡*言之，透過結合 「第6B圖」’如上所述’本實施例之液晶顯示裝置（LCD)之製 造方法採㈣第二光罩製程執行底基板祕光及顯影步驟， 15 201123449 用以完全及部份去除有機絕賴_。換句話而士 賴_透過曝光及顯影步驟形成圖案。。’㈣，有機絕 作為=2=影步驟之後，透過使用形成圖案的有機絕緣膜_ 忭局尤卓執仃一蝕刻步驟。 在該钮刻步驟之中，如「第6C圖」所示 ⑽之上暴露的保護_，用以形成一第一接觸孔6；^子: 觸謂暴露第二儲存電極之—部份，奴去除位於暴 保賴500之下及開極塾21〇之上的閘極絕緣膜_，用以开晨 露問極塾210的第二接觸孔620。類似地，去除在曝光及顯影步驟 中厚度逐漸減少的有機絕緣膜㈣，用以形成一晝素區域=驟 更具體而言，在本發明之方法中採用的第三光罩 用不同氧含量比魏觀行兩次侧步驟。這樣，這些接觸孔之 内側表面平滑傾斜。此^個侧步_後描述。 而且如第7圖」所示，一暴露第一儲存電極225&的第三 接觸孔’通過第三光罩製程形成。 第二及第三接觸孔620及630可透過蝕刻保護膜500、以及閘 極絕緣膜2GG形成為此，可僅使用—習知技術中的乾侧步瓣。 此種情況下’在曝光及顯影製程之後，有機絕緣膜600保留於這 些接觸孔之内。這樣’由於保留有機絕緣膜600，每一接觸孔之内 表面變得粗趟。 另一方面’如上所示，在本實施例之方法中採用的第三光罩 製程透過使用不同氧含量的蝕刻氣體執行兩個蝕刻步驟。因此， 如此之一錐形内側表面缺陷不產生於接觸孔之内。 201123449 睛參閱「第8Αϋ」及「第8B圖」，一第三金屬膜形成於具 有接觸孔的底基板1〇〇之上，第三金屬膜由粗線表示，並且 然後-光阻膜77G塗覆於第三金_之上。隨後，對光阻膜77〇 及第三金屬膜執行具有曝光及顯影步第四料製程，以使得 第三金屬膜之圖案形成為-第一晝素電極24〇、第一共同電極 740、第二畫素電極73〇、-第二共同電極235、以及一閘極塾接 觸電極710。 第三金屬膜可自！目（M。）、鈦（11)、組㈤、鶴、銅 (Cu)鉻（Cr)、IS ( A1)、其合金或其組合物之一組中選擇之— 種材料形成。而且…例如氧化銦锡（IndiumTin〇xide,iT〇)或 氧化銦鋅（Indium Zine Oxide，IZO )的透明導電材料層可用作第三 金屬膜。而且，雑第三金屬膜如騎示形成-單射，但是當 需要時，第三金屬膜可透過堆疊至少兩個金屬層形成。 " 第-共同電極740、第三共同電極235、以及閘極墊接觸電極 710可由一不透明金屬形成，並且第一晝素電極24〇及第二畫素電 極730可由透明導電材料形成。此種情況下，該光罩製程執行兩 次0 為了自彩色濾光基板去除一黑矩陣或減少黑矩陣之寬度，本 實施例之液晶顯示裝置（LCD)之中的第二共同電極235較佳由 一不透明金屬形成。 相反，第一晝素電極240、第一共同電極740、第二晝素電極 730、第二共同電極235、以及閘極塾接觸電極71〇可由一透明導 電材料形成。此種情況下，一黑矩陣形成於與資料線315相對的 201123449 彩色濾光陣列基板之上。 第一畫素電極240通過第一接觸孔61〇與第二儲存電極26〇 相連接。第二畫素電極730及第-共㈣極在底基板励之 畫素區域中彼此相交替排列且與資料線315相平行。 第二共同電極235形成為覆蓋資料線315。換句話而言，第二 共同電極235形成於覆蓋資料線315的有機絕緣膜6⑻之表面上， 即，資料線315上方的有機絕緣膜6〇〇之水平表面及資料線315 之兩側面的保護膜500之傾斜側表面上。這是由於當去除保護膜 時在第二共同電極235之形成期間，資料線315之下存在的通道 層圖案320之侧表面可與第二共同電極235電氣短路之事實產生 的。本實施例之方法允許不去除晝素區域之上的保護膜5〇〇，以使 得防止第二共同電極235與資料線315及通道層圖案32〇之一之 間的短路缺陷。 而且，如此之一第二共同電極235屏蔽資料線315與第二晝 素Ί：極73G之間形成的-電場。同樣，可防止沿資料線315產生 的光線茂漏。 而且，由於有機絕緣膜600由相比較於保護膜5〇〇具有更低 介電常數的材料形纟，因此可減少第二共同電極235與資料線315 之間產生的寄生電容。因此，可減少透過耗合效應產生的訊號延 遲。 閘極墊接觸電極710通過第二接觸孔62〇與閘極墊21〇電連 接。雖細未示…資㈣區域之中的資料墊接觸電極也與一資 料墊電連接。 201123449 第9圖」至「第11圖」係分別為沿「第3圖」之w、 V-V及VI’IV線的液晶顯示裝置之橫截面結構之橫截面圖。 本實施例之液晶顯*裝置（LCD)可包含扣麵型之間隔 物種類型之間隔物係為間隙柱狀間隔物，用以維持一彩色滤 光陣列基板與一薄膜電晶體陣列基板之間的單元間隙，並且另一 種類型之間隔物係為接觸柱狀間隔物，用以防止間隙柱狀間隔物 透過外部按壓之損壞。間隙柱狀間隔物應用於習知技術之液晶顯 示裝置（LCD)。這樣，現在描述本實施例之與間隙柱狀間隔物一 起形成的接觸柱狀間隔物。 「第9圖」至「第11圖」表示一接觸柱狀間隔物4〇〇。因為 間隔物並不限制於其位置，因此間隙柱狀間隔物（圖未示）及接 觸柱狀間隔物之位置可自由改變。 當液晶顯示裝置（LCD)之顯示區域透過一外力按壓時，本 實施例之液晶顯示裝置（LCD)中採用的接觸柱狀間隔物400分 散間隙柱狀間隔物的可承受之力。如果液晶顯示裝置（LCD)僅 包含有間隙柱狀間隔物，則間隙柱狀間隔物被破壞或喪失其恢復 力。然而’當液晶顯示裝置（LCD)的顯示區域之一部份透過一 相比較於預定力更大的外力按壓時，接觸柱狀間隔物400與間隙 柱狀間隔物一起維持液晶顯示裝置（LCD)之單元間隙。 「第9圖」所示之接觸柱狀間隔物400配設為與儲存電容器 相對應。請參閱「第3圖」及「第9圖」，與第一共同線225形成 為一單一體的第一儲存電極225a形成於底基板100之上。而且， 一閘極絕緣膜200、一保護膜500、一有機絕緣膜600、以及一第 201123449 二儲存電極26〇順次形成於第一儲存電極现之上。 另方面’-黑矩陣35〇及一覆蓋層奶順次形成於一與底 基板励相對的彩色遽光陣列基板的頂基板3〇〇之上。而且，— 接觸柱狀間隔物400與底基板100之上的第二儲存電極260相對 應’形成於覆蓋層371之上。 此外’ -溝槽G與接觸柱狀間隔物4_對形成於有機絕緣 膜600之上。溝槽G可透過完全或部份去除第二儲存電極⑽之 上的有機絕緣膜6〇〇形成。 請參閱「第3圖」、「第10圖」及「第u圖」，另一接觸柱狀 間赌伽與閘極線215 (「第1〇圖」）相對形成於頂基板之 覆蓋件371之上’並且再一接觸柱狀間隔物4〇〇與 11圖」）相對形成於頂基板300之覆蓋件371之上。在;第1〇圖」 之中，另一溝槽G透過完全去除保護膜之上的有機絕緣膜」 _ ’與該另一接觸柱狀間隔物400相對形成於閘極線215之上。 這樣，保護膜500透過另-溝槽G暴露。或者，有機絕緣膜· 可保留於另一溝槽G之中，其中有機絕緣膜600在另一溝槽G之 中的厚度概較_近另-溝槽G的其舰域中之厚度更^、。 類似地，再-溝槽G與再-接觸柱狀間隔物400 ς對(、「第 11圖」）’透過去除保護膜500之上的有機絕緣膜_ %成於資料 j 315之上。隨後’第二共同電極235形成於有機絕緣膜_、再 一溝槽G之内侧表面、以及暴露的保護膜5〇〇之上。或者，有機 絕緣膜600可保留於再一溝槽G之中，該再一槽槽g之中的有機 絕緣膜㈣之厚度相比較於相鄰再一溝槽G的其他區域中有機絕 201123449 緣膜600之厚度更小。 如果按壓具有接觸柱狀間隔物彻及間隙柱狀間隔物的液晶 顯示裝置之顯示區域之—部份，_柱狀間隔物維持單元間隙直 至接觸柱狀間隔物400與溝槽G之底表面相接觸。當接觸柱狀間 隔物400與槽G之絲面相接觸時，間隙柱狀_物與接觸柱狀 間隔物400 -起維持單元間隙。換句話而言，本實施例之液晶顯 不裝置（LCD)根據顯示區域之一部份的按壓力之強度，允許僅 間隙柱狀間隔物或全部間隙柱狀間隔物及接觸柱狀間隔物維持單 元間隙。 「第12A圖」及「第12B圖」係為沿「第3圖」之νπΐ·νΐΙΓ 線的液晶顯示裝置的橫截面結構之橫截面圖。 請參閱「第12Α圖」及「第12Β圖」’圖中所示為資料線315 之區域中的本實施例之薄膜電晶體陣列基板及彩色濾光基板之結 構。 通道層圖案320及資料線315順次形成於底基板100之閘極 絕緣膜200之上。而且’保護膜5〇〇及有機絕緣膜6〇〇順次形成 於資料線315之上。而且，第二共同電極235形成於有機絕緣膜 600之上用以覆蓋資料線315。換句話而言，第二共同電極235形 成為包圍有機絕緣膜600且第二共同電極235之兩側邊緣之部份 到達保護膜500。 如此之一第二共同電極235由一不透明金屬形成，這樣，第 二共同電極235遮蔽自底基板1〇〇之後表面進入的光線。第二共 同電極235可自鉬（Mo)、鈦（Ti)、钽（Ta)、鎢（W)、銅（Cu)、 21 201123449 鉻（Cr) !呂（A。、其合金或其組合物之一組中選擇之一 形成。 寸 而且’與第二共同電極235相對，形成於彩色渡光陣列基板 的…、矩陣35〇還可減少為相比較於習知技術更小之寬度。專 矩陣350 ^成之寬度範圍位於第二共同電極故與資料線阳之 寬度之間。舉例而言，黑矩陣350可具有大約6〜16微米（μιη) 之範圍内的寬度。 此種方式下’上述黑矩陣35〇減少之寬度允許-紅色（R)滤 光層303a、-綠色⑹遽光層廳、以及—藍色⑻濾光層（圖 未不）形成為具有較大尺寸（即，一擴大之尺寸）。因此，可提高 液晶顯示裝置（LCD)之孔徑比。 第12B圖」係為已完全去除黑矩陣的一彩色濾光陣列基板 之示意圖。此種情況下，薄膜電晶體陣列基板之上的第二共同電 極235用作黑矩陣。由於黑矩陣自液晶顯示裝置（即，彩色滤光 陣歹J基板）上去除，因此，「第12B圖」所示之液晶顯示裝置 相比較於「第13A圖」之液晶顯稀置具有更大之孔徑比。 第13A圖」及「第13B圖」係為解釋將習知技術之餘刻方 法應用於本實關之接觸孔製造過程所產生問題之示意圖。 如第13A圖」及「第13B圖」所示，本實施例之薄膜電晶 體陣列基板包含有-閘極墊21〇，閘極墊洲形成於底基板1〇〇 之問極塾區域之巾。_電晶體_基板更包含有順次形成於閘 極墊210之上的閘極絕緣膜2〇〇、保護膜500、以及有機絕緣膜600。 為了暴露閘極墊210，可使用一習知技術之乾蝕刻製程。此種 22 201123449 情況之下，在曝光及顯影製程之後，有機絕緣膜6〇〇保留於該孔 之内。因此’由於保留的有機絕緣膜600，孔之内側表面變得粗糙。 如第13A圖」所示，保留於該孔之内的有機絕緣膜6〇〇迫 使在有機絕緣膜600之-底部份之内形成一根切結構。換句話而 吕，一台階覆蓋產生於有機絕緣膜6〇〇、保護膜5〇〇、以及閘極絕 緣膜200之中。 如第13B圖」所示，產生於孔内的台階覆蓋在一稍後形成 的金屬膜470之中產生斷開。實際上，在本實施例之中，透過在 接觸孔之_壁上形成的請覆蓋，形成於閘極整區之中的間極 塾接觸電極之中可產生一電氣斷開。金屬臈47G可具有一堆疊有 至少兩個金屬層之結構。 為了解決關題，當形成接觸孔時，本實施嫩變__侧氣 體之含量且執行兩次姓刻製程。 「第14A圖」至「第14C圖」係為解釋本實施例之一接觸孔 製造期間的-侧製程之示賴。該侧製程可完整顧於「第 6a圖」至「第7圖」所示之第三光罩製程。 如第14A圖」JL「第14C圖」所示，閘極塾21〇形成於底 基板100之上。其後，閘極絕緣膜2〇〇、保護膜，、以及有機絕 緣膜600順次形成於閘極塾21〇之上。 在執行第一姓刻製程之前，有機絕緣膜6〇〇透過一光罩製程 形成圖案’形成_的有機絕緣膜將在第―蝴製程之_用作一 光罩。第-侧製程中使用的六氣化硫：氧氣⑽:⑻_氣 •體的流纽可為大約咖〜㈣之範_。對於六氟化硫：氧氣 23 201123449 (SF6:02)敍刻氣體，較佳具有一大約1:2 5之流量比。舉例而言， 如果六氟化硫（SF6)對應於4000 ’則氧氣（〇2)可為大約 10000〜12000之範圍内。 隨後，八氟化硫.氧氣（SF6:02)飯刻氣體的流量比變化且 然後執行-第二侧製程。此時’六氟化硫：氧氣（SF6:〇2)钱 刻氣體的流量比可為大約1:2.4〜1:3.G之酬内。較佳地，六氣化 硫：氧氣（SF6:02)設置為大約1:2.5之流量比。 換句話而言’如果在第-及第二姓刻製程期間增加氧氣（〇2) 氣體之含置’接觸孔之中的内侧表面之粗縫度可改善。同樣，執 行第二姓刻的時間相比較於執行第一姓刻之時間相同或更短較 佳。 如「第14B圖」所示，閘極塾21〇的接觸孔之第一及第二傾 斜表面Si及S2形成為-平滑之表面。錢，台階覆蓋不產生於 有機絕緣膜600、保護膜500、以及閘極絕緣膜2〇〇之中。 此外’雖然金屬膜獨如「第14C圖」所示形成於底基板觸 之上’但是斷開並不產生於閘極塾21〇的接觸孔之内的金屬膜梢 之中。 這樣’本實關之第三光轉程麵财射執行姓刻製 程。結果，测孔之内絲面之上的台階覆蓋被消除。 「第15圖」至「第17圖」係為沿「第3圖」之IM，及耶仙 線的薄膜電晶體陣列基板之橫戴面圖，並且解釋根據本發明之第 二至第四實施例之液晶顯示裝置之製造方法。 雖然透過第二至第四實施例之方法製造的細電晶體陣列基 24 201123449 —貫施例之方法製造的薄膜電晶體陣列基板具有部份 寒,但是第二 5 势 ΓΤΠ 與 /S 丨丨々制•srXi* nr» A r~201123449 VI. Description of the Invention: [Technical Field of the Invention] The present invention relates to a liquid crystal display device (LCD). [Prior Art] Generally, the light transmittance of a liquid crystal display having a dielectric anisotropy is controlled by an electric field to display an image. The liquid crystal display device is usually formed by combining a - color filter, a photo-array substrate, and a fine-electrode-substrate, and including a liquid crystal layer therebetween. Recently, several new modes of liquid crystal display devices (LCDs) are being developed to solve the conventional technology of liquid crystal thinning (LCD). A wide-format liquid crystal display (LCD) can be classified into a "Phase-Phase Switching" (FFB) mode, a Fringe Field Switching (FFS) mode, Or other modes. In a liquid crystal display device (LCD) having a wide viewing angle, a planar switching (ips) mode liquid crystal display device allows a pixel electrode and a common electrode to be arranged on the same substrate such that a horizontal electric field is induced between the two electrodes . Also, the major axes of the liquid crystal molecules are arranged in a horizontal direction with respect to one of the substrates. Therefore, the liquid crystal display of the planar switching (IPS) mode has a wider viewing angle than the twisted nematic (TN) mode liquid crystal display device of the prior art. The "Fig. 1" is a schematic diagram of a syllabic structure among devices of the conventional art plane switching (IPS) mode. "Picture 2" is a cross-sectional view of the pixel structure along the U' line of "(10): 201123449: see "ϋ图" and "图图2" idle line] and a capital * see and read Ambiguity - 昼素 area. - Used as the opening of the TFT at the intersection of the gate line and the data line 5. (4) The electric raft body, above the pixel area, the first common line 3 ^ intersects with the gate line i, and the first-common electrode 3& extends from the first-common line 3 and is bound with the data line And the first common electrode 3a is formed on both sides of the halogen region. The gate line 1 includes a pole & having a widened width. 6 adjacent to the gate ia. The first storage electrode storage electrode and the first-common electrode 3a are formed as a single----------------------------------------------------------------------------------------------------- The second common electrode is oriented from the second common line 13 toward the halogen region. Further, a third common electrode overlapping the first common electrode 3a portion extends from the second common line 13. Check the second common electrode l3a and the halogen electrode? a alternately arranged in the pixel area. The denier electrode 7a extends from the second storage electrode 7 overlapping the first storage electrode 6. "Fig. 2" shows a cross-sectional view of w in a region along the data line 5, and in the "second circle", a gate insulating film 12 is formed on the base substrate 10. The material line 5 is formed on the gate insulating film 12. The first eight-electrode electrode 3a arranged on both sides of the data line 5 is formed on the base substrate 1A. The third common electrode 13b is formed over the protective film 19 (or passivation) film 19 and overlaps the portion of the first common electrode 3a. The color filter array substrate includes a black matrix 21 which is opposite to the data line. The black matrix 21 is formed on a top substrate 20. A red (R) filter, a light layer 25a 6 201123449 and a green (G) filter layer 25b are formed on both sides of the black matrix 21. "29〃 represents a cover layer. Such a conventional technique of planar switching (ips) mode liquid crystal display device forces the width L1 of the black matrix 21 to be wider to prevent light leakage generated by light generated by the backlight unit and transmitted around the edge of the pixel region. More specifically, the black matrix 21 is formed to reach one of the edges of the first common electrode % so as to interrupt the light between the data line 5 and the first common electrode 3a in a direction inclined by at least one predetermined angle with respect to a vertical line. by. For this reason, the aperture ratio of the pixel region is lowered. Further, since the first common electrode 3a is arranged on both side faces of the data line 5, it is difficult to increase the aperture ratio of the halogen region above the critical value for the thin film transistor array substrate of the prior art. SUMMARY OF THE INVENTION Accordingly, the present invention is directed to a thin film transistor array substrate in order to eliminate one or more problems due to limitations of the prior art and lack of riding. SUMMARY OF THE INVENTION An object of the present invention is to provide a hybrid electric crystal break plate and a method of manufacturing the same, which are disposed on the data line to form an aperture ratio suitable for increasing the aperture ratio of the pixel region. 'The other part of the invention is to provide a kind of secret crystal _ substrate and its manufacturing method' _ system - halftone fresh and "diffractive reticle", suitable for preventing the second common electrode and - under the data line A short defect between the formed channel layer patterns. The present invention is partially understood as follows or can be derived from the present invention. The object of the present invention and other aspects of the present invention can be realized and obtained by the structure specified in the specification and the scope of the claims. According to a general object of the present invention, a thin film transistor array substrate includes a substrate; a gate line and a data line; the gate line and the data line are intersected with each other and arranged to be a unitary region on the substrate; a switch An element, which is located at a intersection of the gate line and the data line; a plurality of second pixel electrodes and a plurality of first common electrodes, and a protection of the second pixel electrodes and the first common electrode alternately arranged on the substrate Among the halogen regions formed on the film; a second common electrode formed to overlap the data line, wherein the data line is located between a gate insulating film and a protective film, and a first storage electrode is formed Above the substrate; a second storage electrode formed to overlap with the first storage electrode and to be formed as a single body; and - organically, which has an affinity for the element, a second storage electrode, a data line, a gate pad, and a data pad, wherein the first common electrode of the ^τ forms a (four) line above the plate, the protective film, and has an arrival 昼Prime region The inclination of the surface protective film. /, the purpose of the package, - (4) the manufacturer of the crystal plate 3 & for the substrate, shouting - the first metal film on the substrate a first mask process will be the first metal smashed ^ 隹 - count ^ , Tilt gate, - Gate line, - Piggy bank and - Gate pad; Sequential layer, with > 5 flute, only mechanical gate insulating film, - Semiconductor first winter film on the substrate And, through the second mask process, the source material line, the one channel layer, and the data layer are formed from the semiconductor layer and the semiconductor layer; the material is stored on the substrate, and the substrate is deposited on the substrate and organically Forming the pattern of the organic insulating film by insulation and through the third mask process 8 201123449 for exposing the portion of the protective film; sequentially performing the first and second (four) steps, forming the first and second steps of the towel The organic insulating film is used as a mask and through the use of different oxygen content ratios to form a halogen region on the protective film, the first contact hole exposing the second storage electrode, and the exposed gate electrode a second contact hole ·' and a third metal film formed on the substrate, and then in the halogen region The third metal be offered a plurality of pixel electrodes and a plurality day electrodes. And other domains, methods, features, and advantages of the present invention will be apparent to those of ordinary skill in the art. It should be understood that other methods, methods, thieves, and advantages are included in the scope of the present invention and are covered by the following patent application. The contents of this section are considered to be restrictions on the application for patents. Further aspects and advantages will be discussed in conjunction with the following examples. It can be explained that the detailed descriptions of the __ and the subsequent _ of the present invention as described above are all inclusive, and are for the purpose of further revealing the __. [Embodiment] ▲The following is the actual salary of the face-to-face type (4). </ RTI> </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; When one or an electrode is said to be formed above or below another element 201123449, it may be located directly above another element, "below", or may be inserted (indirectly) from. - Above the tree β, or „ can be determined according to the drawings. In the drawings, the dimensions of the components are exaggerated for clarity, but do not represent the actual dimensions of the components. Figure 3 is the first in the present invention. A schematic diagram of a pixel region of a liquid crystal display device of an embodiment. According to the third embodiment of the present invention, the liquid crystal display device of the first embodiment of the present invention includes a -= prime region, and the halogen region is intersected with a data line through a gate line. The intersection of the gate line 215 and the data line 315. - The first common line 225 is parallel to the position adjacent to the gate line 215. The first-line 225 clock rides 315 peppers. The pole line 215 gate line 215 has a widened width compared to other areas in the area intersecting the data line 315. The widened width of the gate line is used as the gate 250 of a thin film transistor FT. Therefore, the gate 25 〇 and the gate line 215 are formed as a single body. The thin film transistor TFT includes a gate 25 〇, a 〇 44 〇, a 没 45 〇, and a channel layer (not shown). Moreover, a first storage electrode 225a is formed in the halogen region and is formed integrally with the first common line 225 (extending from the first common line 225). The first storage electrode 225a and the second storage electrode 26() are formed in the halogen region to form a storage capacitor. The second storage electrode 26A is opposite to the first storage_225a. The second storage electrode 260 and the dipole 450 are formed as a single body (or extended). In the halogen region, a first pixel electrode 240 is formed to overlap the first common line 225' and a plurality of second halogen electrodes 730 extend from the first halogen electrode 24〇201123449 toward the pixel region and Parallel to the data line 315. A plurality of second pixel electrodes 730 are arranged at regular intervals within the halogen region. Further, the second storage electrode 2 is electrically connected to the first pixel electrode 240 through the first contact hole 610. Moreover, a second common line 245 is formed opposite the first common line 225 and the first storage electrode 225a in the pixel region. A plurality of first common electrodes 74 are extended from the second common line 245 toward the halogen region and are parallel to the data line 315. Moreover, the first common electrode 740 is alternately arranged with the second pixel electrode 730 in the pixel region. A second common electrode 235 extends from both sides of the second common line 245 to overlap the data line 315. The second common electrode 235 prevents leakage caused by light from a light source of a backlight unit (not shown) and passing through an area of the data line 315. Further, the second common electrode 23s is electrically connected to the first storage electrode through a third contact hole (4). Therefore, a common voltage is supplied to the second common electrode 235, the first common electrode, and the second common line 245 through the first common line 225 and the first storage electrode 225a. And between. Although the figure is not shown, the organic insulating film 600 is located under the second common electrode 235 and the data line 315~-channel (see "5th eight-figure") under the capital /, ''. This is due to the fact that the pattern of the data line 315 and the semiconductor layer are simultaneously formed in the method of performing the four mask processes in the present embodiment. The second common (four) pole 235 of the pattern and the channel layer formed under the data line 315 protect the domains. The liquid crystal display device (LCD) in the field allows one method to use a halftone mask and a diffractive mask during the formation of the contact hole. 201123449 (The mouth J α 守, the deep (the secondary gate pad 21 之 ─ ─ ─ ─ 闸 转 接触 contact electrode 71G is formed on the gate 埶 4 _ 塾 contact electrode 710 through a second contact hole 620 and the gate The pads 210 are in contact. The 4A to 8B are a manufacturing method diagram of a liquid crystal display device and represent the IWI, line and surface, and line thin film electric B-body array substrates along the "Fig. 3". The cross-sectional structure. For the month, see Figure 4A and Figure 4B. A first metal film is deposited on the seam plate 1GG of the material through a spray method. The mask fabrication process 'performs the deposited metal film-side step. During the photomask process' - the photoresist with the photosensitive material is first formed on the metal build-up. The photomask with the non-transmissive area is exposed and developed, thereby forming a photoresist pattern Thereafter, a photoresist film is used as a photomask to deposit a metal film such that a gate 25A, a first storage electrode 225a, and a gate pad 210 are formed, and a gate line 215 is simultaneously formed. And a first common line 225. The gate line 215 and the gate 25 〇 form a single body. The first common line 225 and the first storage electrode 225a are formed as a single body. The first metal 臈 can be derived from molybdenum (Mo) Or a material selected from the group consisting of titanium (Ti), button (Ta), tungsten (w), copper (Cu), chromium (Cr), aluminum (A1), alloys thereof, or a combination thereof. It is shown that the metal film is formed in a single layer, but when necessary, the metal film can be formed by stacking at least two metal layers. After the gate electrode 250 and the like are formed on the substrate 1 , as in "5a" Figure 5 and Figure 5B show a gate insulating film 200, an amorphous germanium film, and a semiconductor layer doped with a non-12 201123449 B film (n+ or p+), and a second metal film in sequence. Formed on the base substrate 100 having the gate electrode 250 and the first storage electrode 225a and the gate pad 21A. The second metal It may be formed from a material selected from the group consisting of indium (M.), titanium (f), group (Ta), tungsten (Cu), chromium (Cr), Lu (A1), alloys thereof, or a combination thereof. , a transparent conductive material layer such as tin oxide (10) ium Tin 〇 x ide, IT 〇 can be used as the second metal film. Moreover, although the second metal film is formed as shown in the single layer, when needed, The two metal films may be formed by stacking at least two metal layers. Subsequently, the bottom substrate hall covered with the second metal film is subjected to a four-mask process using a halftone mask and a diffractive mask, for the second gold. Source/and electrodes 440 and 450, a second storage electrode 26A, and a data line 315 are formed, and a channel layer 340 is formed from the semiconductor layer. Although not shown, a material is also formed at the same time. 塾 0 is hidden under the data line 315 by using a halftone mask or a diffrance channel layer pattern. A storage capacitor as shown in Fig. 5B is formed between the first reservoir 1 and the second storage electrode 26A. Thereafter, a protective film is formed on the entire surface of the base substrate 100. For the month of the month, see Figure 6A to Figure 6C and Figure 7, an organic insulating film 00 is formed on the base substrate on which the protective film is formed, such as "T-th diagram": . Subsequent 'the base substrate on which the organic substrate 600 is formed. 〇〇 π -林process' third mask process 巾 朗 朗 朗 朗 朗 朗 朗 朗 朗 朗 朗 朗 朗 朗 朗 朗 朗 朗 朗 朗 朗 朗 朗 朗 朗 朗 朗 朗 朗. The total transmission area Ρ1 and 13 201123449 on the substrate to be shaped _ complement, and the semi-transparent line p2 on the board to form a pixel area. In other words, as shown in "Picture 6b", the third mask process completely removes the organic insulating film from the fresh 85G full permeable ρ ι _ 500 暴 暴 暴 暴 暴 , , , , , , , , The organic insulating layer 6_ corresponding to the semi-transmissive region P2 of the cover 85 is used to reduce the thickness of the protective film and to maintain (i.e., not remove) the organic insulating film 600 corresponding to the non-transmissive region p3 of the fresh (four) as it is. The organic insulating film 600 has a dielectric constant lower than that of the protective film 5?. The organic insulating film _ may have a dielectric constant of about 3 〇 to 4 。. Preferably, the second common electrode 235 (refer to the "figure map") located on the bead line 315 has a dielectric constant of about 3 4 to 38. The organic insulating film 600 located between the data line 315 and the second common electrode 23s formed later may have a thickness of about 3 to 6 μm (μπ〇. Alternatively, the organic insulating film may be according to a liquid crystal display device (LCD) The drive word has a different thickness. As the shaft frequency becomes higher, a light-synchronization effect between the data line 315 and the second common electrode ("235" of Figure 3) produces a signal delay, wherein the second 〇The same electric wire is formed on the basis of organic aging. However, the liquid crystal display device (LCD) of the present invention uses a low dielectric constant organic solitude _ to reduce the shell line 315 and the first common electrode 235. The parasitic capacitance generated between them. Therefore, the signal delay can be prevented. More specifically, the 'parasitic capacitance is inversely proportional to the distance between the data line 315 and the second common electrode 235. Therefore, the data line 315 and the second common electrode 235 The larger the thickness of the interlayer insulating film 600 is, the smaller the parasitic capacitance is. As a result, the signal delay caused by the depletion effect between the 201123449 k-feed line 15 and the first-common electrode 235 can be reduced. For example, if the liquid crystal display device The drive frequency of (LCD) is set to (9). The organic barrier 600 between the Hertz (five) data line 315 and the second common electrode 235 may have a thickness of about 25 to 35 micrometers. Alternatively, when the liquid crystal display device (LCD) has a driving frequency of 24 〇 (Hz), the thickness of the organic insulating film 600 may be in the range of about 55 to 65 μm. Thus, since the thickness is not set to a fixed value when the liquid crystal display device (LCD) is designed, it can be changed according to the specifications of the liquid crystal display device. Moreover, it is necessary to change the position of the second common electrode 235 to prevent light leakage and increase the aperture ratio of the halogen region. In this case, the organic insulating 臈_ may become thinner or thicker depending on the driving frequency. Further, the organic insulating 貘_ may be formed from an acrylic-based resin. The acrylic-based resin contains _ vehicle_' but is not limited thereto. In other words, if the material of the organic insulating film 600 has a low dielectric constant, the organic insulating film is not limited to photo propylene. The third mask process manufactured by the method of manufacturing a liquid crystal display device (LCD) of the present embodiment performs an exposure and development step on the base substrate 100. At this time, the organic insulating film 600 corresponding to the total transmission region P1 is removed for exposing the protective film on the second storage electrode 26, the electrode pad 210, and the material 塾 (not shown). Partially, the organic stagnation _ corresponding to the semi-transmissive region P2 is removed, that is, the thickness of the secret reliance 600 corresponding to the semi-transmissive region p2 is reduced and the appearance is 5 (8). The organic insulating film corresponding to the non-transmissive HP3 is not removed. In short, by using the method of manufacturing the liquid crystal display device (LCD) of the present embodiment in combination with the "FIG. 6B" as described above, the fourth mask process and the developing step are performed by the second mask process, 15 201123449 Complete and partial removal of organic _. In other words, the _ _ _ through the exposure and development steps to form a pattern. . (4), the organic film is used as the =2= shadowing step, and the etching process is performed by using the patterned organic insulating film. In the buttoning step, the protection _ exposed above the (10) shown in "Fig. 6C" is used to form a first contact hole 6; ^: the part that exposes the second storage electrode The gate insulating film _ located under the storm protection 500 and above the opening 21 is removed to open the second contact hole 620 of the pole 210. Similarly, the organic insulating film (4) whose thickness is gradually reduced in the exposure and development steps is removed to form a halogen region = more specifically, the third mask used in the method of the present invention uses different oxygen content ratios. Wei Guanxing made two side steps. Thus, the inner side surfaces of these contact holes are smoothly inclined. This ^ side step _ later described. Further, as shown in Fig. 7, a third contact hole 'exposing the first storage electrode 225 & is formed by a third mask process. The second and third contact holes 620 and 630 are formed by etching the protective film 500 and the gate insulating film 2GG, and only the dry side step flap in the prior art can be used. In this case, the organic insulating film 600 remains in these contact holes after the exposure and development processes. Thus, since the organic insulating film 600 is left, the inner surface of each contact hole becomes rough. On the other hand, as shown above, the third mask process employed in the method of the present embodiment performs two etching steps by using etching gases of different oxygen contents. Therefore, such a tapered inner side surface defect is not generated inside the contact hole. 201123449 For the eyes of "8th" and "8B", a third metal film is formed on the base substrate 1A having a contact hole, the third metal film is indicated by a thick line, and then - the photoresist film 77G is coated. Overlaid on the third gold _. Subsequently, the fourth process of the exposure and development steps is performed on the photoresist film 77 and the third metal film, so that the pattern of the third metal film is formed into a first halogen electrode 24, a first common electrode 740, and a first The two pixel electrodes 73A, the second common electrode 235, and a gate 塾 contact electrode 710. The third metal film is available! A material selected from the group consisting of (M.), titanium (11), group (five), crane, copper (Cu) chromium (Cr), IS (A1), alloys thereof, or combinations thereof. Further, a transparent conductive material layer such as indium tin oxide (iT) or indium zinc oxide (Indium Zine Oxide, IZO) can be used as the third metal film. Moreover, the third metal film is formed as a single shot, but when necessary, the third metal film can be formed by stacking at least two metal layers. " The first common electrode 740, the third common electrode 235, and the gate pad contact electrode 710 may be formed of an opaque metal, and the first halogen electrode 24 and the second pixel electrode 730 may be formed of a transparent conductive material. In this case, the mask process is performed twice. To remove a black matrix from the color filter substrate or reduce the width of the black matrix, the second common electrode 235 in the liquid crystal display device (LCD) of the present embodiment is preferably Formed from an opaque metal. In contrast, the first halogen electrode 240, the first common electrode 740, the second halogen electrode 730, the second common electrode 235, and the gate contact electrode 71 may be formed of a transparent conductive material. In this case, a black matrix is formed on the 201123449 color filter array substrate opposite to the data line 315. The first pixel electrode 240 is connected to the second storage electrode 26A through the first contact hole 61. The second pixel electrode 730 and the first-fourth (fourth) pole are alternately arranged in the pixel region of the base substrate and are parallel to the data line 315. The second common electrode 235 is formed to cover the data line 315. In other words, the second common electrode 235 is formed on the surface of the organic insulating film 6 (8) covering the data line 315, that is, the horizontal surface of the organic insulating film 6 above the data line 315 and the two sides of the data line 315 The inclined side surface of the protective film 500. This is due to the fact that the side surface of the channel layer pattern 320 existing under the data line 315 can be electrically shorted to the second common electrode 235 during the formation of the second common electrode 235 when the protective film is removed. The method of this embodiment allows the protective film 5 之上 over the halogen region to be removed so as to prevent short-circuit defects between the second common electrode 235 and one of the data line 315 and the channel layer pattern 32. Moreover, such a second common electrode 235 shields the - electric field formed between the data line 315 and the second pixel: pole 73G. Also, light rays generated along the data line 315 can be prevented from leaking. Moreover, since the organic insulating film 600 is formed of a material having a lower dielectric constant than the protective film 5, the parasitic capacitance generated between the second common electrode 235 and the data line 315 can be reduced. Therefore, the signal delay caused by the consuming effect can be reduced. The gate pad contact electrode 710 is electrically connected to the gate pad 21 via the second contact hole 62. Although not shown in detail, the data pad contact electrode in the (4) area is also electrically connected to a material pad. 201123449 Fig. 9 to Fig. 11 are cross-sectional views showing the cross-sectional structure of the liquid crystal display devices along the w, V-V and VI'IV lines of "Fig. 3", respectively. The liquid crystal display device (LCD) of the present embodiment may comprise a spacer type spacer type spacer as a gap column spacer for maintaining a color filter array substrate and a thin film transistor array substrate. The cell gap, and another type of spacer is a contact column spacer to prevent damage of the gap column spacer through external pressing. The gap column spacer is applied to a liquid crystal display (LCD) of the prior art. Thus, the contact column spacer formed in the present embodiment together with the gap column spacer will now be described. "9th to 11th" shows a contact column spacer 4〇〇. Since the spacer is not limited to its position, the position of the gap column spacer (not shown) and the contact column spacer can be freely changed. When the display region of the liquid crystal display device (LCD) is pressed by an external force, the contact column spacer 400 employed in the liquid crystal display device (LCD) of the present embodiment disperses the force with which the spacer column spacer can withstand. If the liquid crystal display device (LCD) contains only the gap column spacer, the gap column spacer is destroyed or its restoring force is lost. However, when a portion of the display area of the liquid crystal display device (LCD) is pressed by an external force greater than a predetermined force, the contact column spacer 400 maintains the liquid crystal display device (LCD) together with the gap column spacer. The cell gap. The contact column spacer 400 shown in Fig. 9 is arranged to correspond to the storage capacitor. Referring to "Fig. 3" and "Fig. 9", a first storage electrode 225a formed as a single body with the first common line 225 is formed on the base substrate 100. Further, a gate insulating film 200, a protective film 500, an organic insulating film 600, and a 201123449 second storage electrode 26 are sequentially formed on the first storage electrode. On the other hand, the black matrix 35 turns and a cover layer milk are sequentially formed on the top substrate 3A of the color light-emitting array substrate opposite to the base substrate. Moreover, the contact column spacer 400 is formed on the cover layer 371 corresponding to the second storage electrode 260 above the base substrate 100. Further, a pair of trenches G and contact column spacers 4_ are formed over the organic insulating film 600. The trench G can be formed by completely or partially removing the organic insulating film 6 上 on the second storage electrode (10). Please refer to "Fig. 3", "Fig. 10" and "Fig. u". Another contact column gamma and gate line 215 ("1") is formed on the top substrate. The upper and further contact column spacers 4 and 11 are formed on the cover 371 of the top substrate 300. In the first drawing, the other trench G is formed on the gate line 215 with respect to the other contact column spacer 400 through the organic insulating film _ ' completely removed from the protective film. Thus, the protective film 500 is exposed through the other-groove G. Alternatively, the organic insulating film may remain in the other trench G, wherein the thickness of the organic insulating film 600 in the other trench G is more than the thickness of the ship near the other trench G. ,. Similarly, the re-groove G and the re-contact column spacer 400 ς (""11")" are formed on the material j 315 by removing the organic insulating film _% over the protective film 500. Subsequently, the second common electrode 235 is formed on the inner surface of the organic insulating film _, the further trench G, and the exposed protective film 5A. Alternatively, the organic insulating film 600 may remain in the further trench G, and the thickness of the organic insulating film (4) in the further trench g is compared to the thickness of the other regions in the other regions of the adjacent trench G. The thickness of the film 600 is smaller. If the portion of the display region of the liquid crystal display device having the columnar spacer and the gap column spacer is pressed, the column spacer maintains the cell gap until the contact column spacer 400 and the bottom surface of the trench G are contact. When the contact columnar spacer 400 is in contact with the surface of the groove G, the gap columnar material and the contact column spacer 400 serve to maintain the cell gap. In other words, the liquid crystal display device (LCD) of the present embodiment allows only the gap column spacer or the entire gap column spacer and the contact column spacer according to the strength of the pressing force of a portion of the display region. Maintain cell gaps. "12A" and "12B" are cross-sectional views showing a cross-sectional structure of a liquid crystal display device along the line νπΐ·νΐΙΓ of "Fig. 3". Referring to the "Fig. 12" and "Fig. 12" diagrams, the structure of the thin film transistor array substrate and the color filter substrate of the present embodiment in the region of the data line 315 is shown. The channel layer pattern 320 and the data line 315 are sequentially formed over the gate insulating film 200 of the base substrate 100. Further, the 'protective film 5' and the organic insulating film 6' are sequentially formed on the data line 315. Moreover, a second common electrode 235 is formed over the organic insulating film 600 to cover the data line 315. In other words, the second common electrode 235 is formed to surround the organic insulating film 600 and a portion of both side edges of the second common electrode 235 reaches the protective film 500. Such a second common electrode 235 is formed of an opaque metal such that the second common electrode 235 shields light entering from the surface behind the base substrate 1 . The second common electrode 235 may be derived from molybdenum (Mo), titanium (Ti), tantalum (Ta), tungsten (W), copper (Cu), 21 201123449 chromium (Cr), and its alloy or combination thereof. One of the selected ones is formed and is 'opposited with the second common electrode 235, and the matrix 35〇 formed on the color light-emitting array substrate can be reduced to a smaller width than the conventional technique. The width of the 350^ is located between the width of the second common electrode and the width of the data line. For example, the black matrix 350 may have a width in the range of about 6 to 16 micrometers (μιη). The reduced width of the black matrix 35〇 allows the red (R) filter layer 303a, the green (6) phosphor layer hall, and the blue (8) filter layer (not shown) to be formed to have a larger size (ie, an enlargement) Therefore, the aperture ratio of the liquid crystal display device (LCD) can be improved. Fig. 12B is a schematic diagram of a color filter array substrate in which the black matrix has been completely removed. In this case, the thin film transistor array substrate The second common electrode 235 is used as a black matrix. Due to the black matrix The liquid crystal display device (i.e., the color filter array J substrate) is removed. Therefore, the liquid crystal display device shown in Fig. 12B has a larger aperture ratio than the liquid crystal display of the "Fig. 13A". Figure 13A and Figure 13B are diagrams for explaining the problems arising from the application of the remaining techniques of the prior art to the contact hole manufacturing process of the actual application. As shown in Figure 13A and Figure 13B. The thin film transistor array substrate of the embodiment comprises a gate pad 21 〇, and the gate pad is formed on the substrate of the bottom substrate 1 . The transistor _ substrate further includes a gate formed in sequence. The gate insulating film 2, the protective film 500, and the organic insulating film 600 over the pad 210. To expose the gate pad 210, a conventional dry etching process can be used. In the case of 22 201123449, After the exposure and development process, the organic insulating film 6 is retained in the hole. Therefore, 'the inner surface of the hole becomes rough due to the remaining organic insulating film 600. As shown in Fig. 13A, the hole remains in the hole. The organic insulating film 6〇〇 is forced to have A cut structure is formed in the bottom portion of the machine insulating film 600. In other words, a step cover is formed in the organic insulating film 6A, the protective film 5A, and the gate insulating film 200. As shown in Fig. 13B", the step formed in the hole covers the opening of a metal film 470 which is formed later. Actually, in the present embodiment, the through hole is formed on the wall of the contact hole. Please cover, an electrical disconnection may be generated in the inter-pole contact electrode formed in the gate region. The metal crucible 47G may have a structure in which at least two metal layers are stacked. In the case of the hole, the present embodiment changes the content of the gas on the side of the __ and performs the two-step process. "Fig. 14A" to "Fig. 14C" are diagrams for explaining the -side process during the manufacture of the contact hole of one embodiment. This side process can fully take into account the third mask process shown in Figures 6a to 7. As shown in Fig. 14A, "JL", Fig. 14C, the gate electrode 21 is formed on the base substrate 100. Thereafter, the gate insulating film 2, the protective film, and the organic insulating film 600 are sequentially formed over the gate electrode 21''. The organic insulating film 6 is formed through a photomask process to form a patterned organic film which is to be used as a photomask in the first butterfly process before the first surrogate process is performed. Six gasification sulphur used in the first-side process: oxygen (10): (8) _ gas • The flow of the body can be about ～~4. For sulfur hexafluoride: oxygen 23 201123449 (SF6:02), it is preferred to have a flow ratio of about 1:25. For example, if sulfur hexafluoride (SF6) corresponds to 4000', the oxygen (?2) may be in the range of about 10,000 to 12,000. Subsequently, sulfur sulphate. The flow ratio of oxygen (SF6:02) cooking gas is varied and then the -second side process is performed. At this time, the flow ratio of sulfur hexafluoride: oxygen (SF6: 〇2) can be about 1:2. 4~1:3. G within the reward. Preferably, six gasified sulfur: oxygen (SF6: 02) is set to about 1:2. 5 flow ratio. In other words, if the increase in the oxygen (〇2) gas during the first and second surrogate processes, the roughness of the inner side surface among the contact holes can be improved. Similarly, the time to execute the second surname is the same or shorter than the time to execute the first surname. As shown in Fig. 14B, the first and second inclined surfaces Si and S2 of the contact hole of the gate electrode 21 are formed as a smooth surface. The money, step coverage is not generated in the organic insulating film 600, the protective film 500, and the gate insulating film 2〇〇. Further, although the metal film is formed on the bottom substrate as shown in Fig. 14C, the opening is not generated in the metal film tip in the contact hole of the gate electrode 21〇. In this way, the third light-transfer plane of this reality is executed by the surname engraving process. As a result, the step coverage above the inner surface of the hole is eliminated. "15th" to "17th" is a cross-sectional view of the thin film transistor array substrate along the IM of "Fig. 3" and the yin line, and explains the second to fourth embodiments according to the present invention. A method of manufacturing a liquid crystal display device. Although the thin film transistor array substrate manufactured by the method of the second embodiment of the present invention has a partial cold, but the second 5 potential / and /S 丨丨々 System•srXi* nr» A r~
第8B圖 板與透過第一實施 不相同之結構，但 4A圖」至「笛s 如° ϋ此’將解釋第二至第四實施例之方法中與「第8b圖」^ =結構她別的部份。而且，第二至第四實施例之方法的相同 ^虎表不與「第4A圖」至「第8B圖」所示相同之元件。 第四實知例之方法允許修改非顯示區域之中的結構， 其中該非顯示區域之上形成有根據第—實施例之方法形成的資料 塾及閘極塾。 *請參閱「第3圖」及「第關」，第二實施例之方法允許一 覆蓋有閘極塾210的區域中形成的有機絕緣膜6術，具有與資料 線315之上形成的有機絕緣膜6〇〇不同之厚度。 ^ 1丨 1穴口j 5石mj吕, 覆蓋有資料墊及閘極墊21〇_顯示區域中之有機絕緣膜_a之 圖案相比較於與資料線315相重疊的有機絕賴_具有更小之 厚度。具有較小厚度的有機絕緣膜600a之圖案可透過第三光罩製 程實現，第三料製財使財色調光罩及繞射光罩之—用以形 雖然圖未示，有機絕緣麵案按照與_塾21G及薄膜電晶 體之區域中相同之方式還形成於資料塾之區域中。換句話而十， 纽種方式下，塾區中的有機絕緣膜㈣a之圖案降低之高度 來自於有機絕賴600她較於保護膜5〇〇及閑極絕緣膜更 厚之事實。如果有機絕緣膜_a之_在顯示及非顯示區形成且 有均勻之厚度，會產生外部驅動積體電路的終端之接觸缺陷。 25 201123449 ，、月降低百機絕緣臈的液晶顯示裝置 (LCD)使得料與外部轉频電路轉端電接觸。 第三實施例之方法獲得—_電晶断列基板之結構，如「第 ^圖」所示’該結構中有機絕緣膜_a之圖案完全自_塾區域 及貝科墊區域去除。這樣，當間極藝接觸電極710形成於保護膜 500之上時，閘·接戦極71〇與間極塾21〇電連接。類似地， 當-資料墊接觸電極（圖未示）形成於保護膜·之上時，資料 墊接觸電極（圖未示）與資料墊（圖未示）電連接。 第四實施例之方法獲得—薄膜電晶斜列基板之結構，該結 構中有機絕緣膜_a之圖案、保護膜5〇〇、以及開極絕緣膜· 自閘極墊區域完全絲。類似地，有機絕緣膜_a之圖案及保護 膜500自資料墊區域完全去除。此種情況下，保留資料塾之下的 閘極絕緣膜2GG。而且’閘極墊之間與資料塾之間的所有有機絕緣 膜600a之圖案、保護膜500、以及閘極絕緣膜2〇〇被去除，以使 得底基板100之表面暴露於資料墊之間與閘極墊之間。 結果，閘極墊接觸電極710直接形成於閘極墊21〇及底基板 1〇〇之上。而且，閘極墊接觸電極71〇完全覆蓋閘極墊21〇。 此種方式下，本發明之實施例之方法可在液晶顯示裝置 (LCD)之墊區中形成不同之結構，而不需要一另外的光罩製程。 如上所述，雖然共同及畫素電極主要描述為形成於保護膜之 上，但畫素電極可配設於保護膜與閘極絕緣膜之間或基板之上。 而且，晝素電極形成為一條形，但是並不限制於此。換句話而言， 畫素電極可形成為一面板形。此種情況下，具有面板形的晝素電 26 201123449 極由一透明導電材料形成。 、軸本發明之實施例財例性之實施俯f露如上，然而本領 域之技術人貞應當意、識到在不脫離本發明所附之巾請專利範圍所 揭示之本發明之精神和範圍的情況下，所作之更動與潤飾，均屬 本發明之專娜護細之内。特別是可在本制書、圖式部份及 所附之申請專利範針進行構成部份與/或組合方式的不同變化 及修改除了構成部份與/或組合方式的變化及修改外，本領域 之技術人員也應當意識到構成部份與/或組合方式的交替使用。 【圖式簡單說明】 第1圖係為習知技術之平面切換（IPS)模式之液晶顯示裝置 之中的一晝素結構之示意圖； 第2圖係為沿第1圖之w’線之晝素結構之橫截面圖； 第3圖係為本發明第一實施例之液晶顯示裝置之一畫素區域 之示意圖； 第4A圖、第认圖、第6A圖至第6C圖、第8八圖、以及第 8B圖係為沿第3圖之IM，線及麵，線之薄膜電晶體陣列基板之 橫戴面圖，並且用以解釋本發明第一實施例之液晶顯示裝置之製 造方法； 意圖； 第4B圖蝴4A _之___敵平面結構之示 意圖； 第5B圖係為第5A圖之薄膜電晶断列基板 之平面結構之 不 27 201123449 第7圖係為第6C圖之笼脫 園之涛獏電晶體陣列基板之平面結構之示 意圖， 第圖至第11圖係分別為沿第3圖之IV-IV，、V-V，及VI-IV， 線的液晶顯示裝置之翻^轉之橫截面圖； 第12A圖及帛12B圖係為沿第3圖之vm-viir線的液晶顯 示裝置之橫戴面結構之橫截面圖； 第13Α圖及第13Β圖係為解釋將習知技術之蝕刻方法應用柃 本實施例之接觸孔製造過程所產生問題之示意圖； 第14Α圖至第14C圖係為在本實施例之一接觸孔製造期間， 解釋一蝕刻製程之示意圖；以及 第15圖至第π圖係為沿第3圖之ΙΙ-ΙΓ及ΙΙΙ-ΙΙΙ，線的薄膜電 晶體陣列基板之橫截面圖，並且解釋根據本發明之第二至第四實 施例之液晶顯示裝置之製造方法。 【主要元件符號說明】 1 閘極線 la 閘極 3 第一共同線 3a 第一共同電極 5 資料線 6 第一儲存電極 7 第二儲存電極 28 201123449 7a 畫素電極 10 底基板 12 閘極絕緣膜 13 第二共同線 13a 第二共同電極 13b 第三共同電極 19 保護膜 20 頂基板 21 黑矩陣 25a 紅色濾、光層 25b 綠色遽光層 29 覆蓋層 100 底基板 200 閘極絕緣膜 210 閘極塾 215 閘極線 225 第一共同線 225a 第一儲存電極 235 第二共同電極 240 第一晝素電極 245 第二共同線 29 201123449 250 閘極 260 第二儲存電極 300 頂基板 303a 紅色濾光層 303b 綠色濾光層 315 資料線 320 通道層圖案 340 通道層 350 黑矩陣 371 覆蓋層 400 接觸柱狀間隔物 440 源極 450 汲極 470 金屬膜 500 保護膜 600 、 600a 有機絕緣膜 610 第一接觸孔 620 第二接觸孔 630 第三接觸孔 700 第三金屬膜 710 閘極墊接觸電極 30 201123449 730 第二晝素電極 740 第一共同電極 770 光阻膜 850 光罩 TFT 薄膜電晶體 G 溝槽 R 頂基板 P 路徑 PI 全透射區 P2 半透射區 P3 非透射區 LI 寬度 SI 第一傾斜表面 S2 第二傾斜表面 31Figure 8B is different from the structure of the first embodiment, but 4A" to "Fei s such as °" will explain the method of the second to fourth embodiments and "8b" ^ = structure she Part of it. Further, the same method of the second to fourth embodiments is not the same as the components shown in "Ath 4A" to "8B". The method of the fourth practical example allows modification of the structure in the non-display area on which the data 塾 and the gate 形成 formed by the method of the first embodiment are formed. *Please refer to "3" and "OFF". The method of the second embodiment allows an organic insulating film 6 formed in a region covered with the gate electrode 210 to have an organic insulation formed over the data line 315. The film 6 has a different thickness. ^ 1丨1 hole j 5 stone mj Lu, covered with data pad and gate pad 21〇_The pattern of the organic insulating film _a in the display area is compared with the organic stagnation overlapping with the data line 315 _ has a smaller The thickness. The pattern of the organic insulating film 600a having a small thickness can be realized through the third mask process, and the third material is used to make the color mask and the diffractive mask - although the figure is not shown, the organic insulating surface is in accordance with The same manner as in the area of _塾21G and the thin film transistor is also formed in the area of the data 塾. In other words, in the New Zealand mode, the height of the pattern of the organic insulating film (4)a in the crotch region is reduced from the fact that the organic film is more thick than the protective film 5〇〇 and the idler insulating film. If the organic insulating film _a is formed in the display and non-display areas and has a uniform thickness, a contact defect of the terminal of the external driving integrated circuit is generated. 25 201123449 , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , The method of the third embodiment obtains the structure of the - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - Thus, when the inter-electrode contact electrode 710 is formed over the protective film 500, the gate and drain electrodes 71 are electrically connected to the inter-pole 21?. Similarly, when a data pad contact electrode (not shown) is formed over the protective film, the data pad contact electrode (not shown) is electrically connected to a data pad (not shown). The method of the fourth embodiment obtains the structure of a thin film electro-crystal oblique column substrate in which the pattern of the organic insulating film _a, the protective film 5 〇〇, and the opening insulating film are completely filaments from the gate pad region. Similarly, the pattern of the organic insulating film_a and the protective film 500 are completely removed from the area of the data pad. In this case, the gate insulating film 2GG under the data 保留 is retained. Further, the pattern of all the organic insulating films 600a between the gate pads and the data sheets, the protective film 500, and the gate insulating film 2 are removed, so that the surface of the base substrate 100 is exposed between the data pads and Between the gate pads. As a result, the gate pad contact electrode 710 is formed directly on the gate pad 21 and the base substrate 1A. Moreover, the gate pad contact electrode 71 〇 completely covers the gate pad 21 〇. In this manner, the method of the embodiments of the present invention can form different structures in the pad region of a liquid crystal display device (LCD) without requiring an additional mask process. As described above, although the common and pixel electrodes are mainly described as being formed on the protective film, the pixel electrodes may be disposed between or between the protective film and the gate insulating film. Moreover, the halogen electrode is formed in a strip shape, but is not limited thereto. In other words, the pixel electrodes can be formed in a panel shape. In this case, the panel-shaped halogen battery 26 201123449 is formed of a transparent conductive material. The embodiments of the present invention have been described above, but the spirit and scope of the present invention disclosed in the patent scope of the present invention is not to be understood by those skilled in the art. In the case of the invention, the changes and retouchings are all within the scope of the invention. In particular, the changes and modifications of the components and/or combinations of the patents, drawings and accompanying patent applications may be made in addition to changes and modifications in the components and/or combinations. Those skilled in the art should also be aware of the alternate use of the components and/or combinations. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic diagram showing a monolithic structure in a liquid crystal display device of a planar switching (IPS) mode of the prior art; Fig. 2 is a line along the w' line of Fig. 1 A cross-sectional view of a prime structure; FIG. 3 is a schematic view showing a pixel region of a liquid crystal display device according to a first embodiment of the present invention; FIG. 4A, the first drawing, the sixth drawing to the sixth drawing, and the eighth eight-eighth drawing And FIG. 8B is a cross-sectional view of the thin film transistor array substrate along the line IM, line and surface of FIG. 3, and is used to explain the manufacturing method of the liquid crystal display device of the first embodiment of the present invention; 4B is a schematic diagram of the plane structure of the 4A ___ enemy plane; the 5B is the plane structure of the thin film electro-crystalline broken substrate of the 5A diagram. 201123449 Fig. 7 is the cage of the 6C Schematic diagram of the planar structure of the ceramic crystal array substrate, the first to the eleventh diagrams are the liquid crystal display devices along the IV-IV, VV, and VI-IV lines of FIG. 3, respectively. Cross-sectional view; Fig. 12A and Fig. 12B are the transverse wear knots of the liquid crystal display device along the vm-viir line of Fig. 3. Cross-sectional view of the structure; Fig. 13 and Fig. 13 are diagrams for explaining the problem of applying the etching method of the prior art to the contact hole manufacturing process of the present embodiment; Figs. 14 to 14C are A schematic diagram of an etching process is explained during the manufacture of a contact hole; and a cross-sectional view of the thin film transistor array substrate along the line ΙΙ-ΙΓ and ΙΙΙ-ΙΙΙ of FIG. 3 is illustrated. And a method of manufacturing the liquid crystal display device according to the second to fourth embodiments of the present invention is explained. [Main component symbol description] 1 gate line la gate 3 first common line 3a first common electrode 5 data line 6 first storage electrode 7 second storage electrode 28 201123449 7a pixel electrode 10 base substrate 12 gate insulating film 13 second common line 13a second common electrode 13b third common electrode 19 protective film 20 top substrate 21 black matrix 25a red filter, light layer 25b green light layer 29 cover layer 100 base substrate 200 gate insulating film 210 gate 塾215 gate line 225 first common line 225a first storage electrode 235 second common electrode 240 first halogen electrode 245 second common line 29 201123449 250 gate 260 second storage electrode 300 top substrate 303a red filter layer 303b green Filter layer 315 data line 320 channel layer pattern 340 channel layer 350 black matrix 371 cover layer 400 contact column spacer 440 source 450 drain 470 metal film 500 protective film 600, 600a organic insulating film 610 first contact hole 620 Two contact holes 630 third contact holes 700 third metal film 710 gate pad contact electrodes 30 201123449 730 second Prime electrode 740 first common electrode 770 photoresist film 850 photomask TFT thin film transistor G trench R top substrate P path PI full transmission region P2 semi-transmissive region P3 non-transmissive region LI width SI first inclined surface S2 second inclined surface 31