201108467 六、發明說明： 【發明所屬之技術領域】 本發明係關於一種發光二極體（Light Emitting Diode; LED)組件之製造方法，特別是指一種特殊之 LED組件之製造方法，其係將LED晶片封裝體直接 電性連結於電路基板所製成。201108467 VI. Description of the Invention: [Technical Field] The present invention relates to a method of manufacturing a Light Emitting Diode (LED) component, and more particularly to a method of manufacturing a special LED component, which is to be an LED The chip package is directly electrically connected to the circuit substrate.
【先前技術】 在曰常生活中，為了能夠在黑暗或陰暗的環境中 辨識物體與方位，通常會需要使用發光組件來提供照 明。在這些發光組件中，由於發光二極體具備使用壽 命長、低功率消耗等優點，故在全球一片節能減碳的 風潮中，逐漸獨領風騷，成為主流的照明組件。 然而，除了在大範圍的照明用途之外，由於發光 $極體具備使用壽命長、低功率消耗等優點，所^亦 苇被組裝成發光^極體組件而運用於為電子聲置 提供背光或其他相關用途。在眾多發光二極體^件 中，由於在透過覆晶技術製作覆晶發光二極體（u Emitting Diode; LED)封裝結構時，可使 LED 士 g直接連結於載體基板而不必打線，因此廣為大 -------------------圖式針對習 用覆晶LED封裝結構製作LED組件之製程加 明。請參閱第-A圖至第―E圖，其係顯矛^ ° 組件之一系列製造過程。如第一 A圖所示， 覆晶LED封裝結構1〇〇 (標示於第一 E圖）時, 201108467 先製作出一 LED覆晶結構1，此時，必須先製備一透 光基材層11。 接著，必須形成一緩衝層（buffer layer) 12、一 N 型電極包覆子層（N type electrode cladding sub-layer) 13、一多重量子井（multiple quantum well) 14、一 p型電極包覆子層（p type electrode cladding sub-layer) 15、一透光導電膜16與一反射層17。 緩衝層12係疊合於透光基材層11 ; N型電極包 覆子層13係疊合於緩衝層12;多重量子井14係局部 疊合於N型電極包覆子層13;P型電極包覆子層15 係疊合於多重量子井14 ;透光導電膜16係疊合於P 型電極包覆子層15;反射層17係包覆多重量子井 14、P型電極包覆子層15與透光導電膜16。然後， 必須自透光導電膜16延伸出一 P型電極18,並自N 型電極包覆子層13延伸出一 N型電極19。同時，可 在P型電極18與N型電極19分別鍍上金（Gold; Au)、錫（Tin;Sn)或金-錫（Gold-Tin;Au-Sn)合金 (未繪製），至此則可製作出上述之LED覆晶結構1。 如第一 B圖所示，接著，必須製備一載體基板2, 載體基板2包含一基板本體21、一 P型電極層22與 一 N型電極層23。基板本體21具有一上表面211、 一下表面212、一第一側邊213與一第二側邊214。P 型電極層22與N型電極層23係分別設置並包覆第一 側邊213與第二側邊214。 如第一 C圖所示，在製備載體基板2後，必須在 載體基板2之P型電極層22與N型電極層23分別設 置一導電元件3與3a，較佳者，導電元件3與3a可 為載體基板2上的鍍金或鍍銀焊點。 201108467 板Λΐ:2;Γ，ΐ導電元件3與3&為載體基 板2上鍍金或鍍銀焊點時，必須牌 置使if:共晶製程’將壤境溫度提升 共日日 >皿度，使鍍金或鍍銀焊點中的合 P型電極18與N型電極19上所鍍d,☆透到 錫（Tin;Sn)或金-錫（Gold_Tin; A 1 〇 ’ I)、 製）中，藉以使LED覆晶結構金^緣[Prior Art] In normal life, in order to be able to recognize objects and orientations in dark or dark environments, it is often necessary to use illumination components to provide illumination. Among these light-emitting components, since the light-emitting diode has advantages such as long service life and low power consumption, it has gradually become the mainstream lighting component in the global energy-saving and carbon-reducing trend. However, in addition to a wide range of lighting applications, since the illuminating $ pole body has the advantages of long service life, low power consumption, etc., it is also assembled into a illuminating body assembly and is used to provide backlighting for electronic sounding or Other related uses. In many light-emitting diodes, when a flip-chip diode (u Emitting Diode (LED) package structure is fabricated by flip chip technology, the LEDs can be directly connected to the carrier substrate without having to be wired. For the large------------------- pattern for the custom flip-chip LED package structure to make LED components process. Refer to Figure-A through Figure-E, which is a series of manufacturing processes for the spear assembly. As shown in FIG. A, when the flip-chip LED package structure 1〇〇 (labeled in the first E diagram), 201108467 first produces an LED flip chip structure 1. At this time, a transparent substrate layer 11 must be prepared first. . Next, a buffer layer 12, an N-type electrode cladding sub-layer 13, a multiple quantum well 14, and a p-type electrode coating must be formed. A p type electrode cladding sub-layer 15 , a light-transmitting conductive film 16 and a reflective layer 17 . The buffer layer 12 is laminated on the light-transmitting substrate layer 11; the N-type electrode coating sub-layer 13 is superposed on the buffer layer 12; the multiple quantum well 14 is partially superposed on the N-type electrode coating sub-layer 13; The electrode coating sub-layer 15 is superposed on the multiple quantum well 14; the transparent conductive film 16 is laminated on the P-type electrode coating sub-layer 15; the reflective layer 17 is coated with the multiple quantum well 14 and the P-type electrode coated The layer 15 and the light-transmitting conductive film 16. Then, a P-type electrode 18 must be extended from the light-transmitting conductive film 16, and an N-type electrode 19 is extended from the N-type electrode covering sub-layer 13. At the same time, gold (Gold; Au), tin (Tin; Sn) or gold-tin (Gold-Tin; Au-Sn) alloy (not drawn) may be plated on the P-type electrode 18 and the N-type electrode 19, respectively. The LED flip chip structure 1 described above can be fabricated. As shown in Fig. B, next, a carrier substrate 2 having a substrate body 21, a P-type electrode layer 22 and an N-type electrode layer 23 must be prepared. The substrate body 21 has an upper surface 211, a lower surface 212, a first side 213 and a second side 214. The P-type electrode layer 22 and the N-type electrode layer 23 are respectively provided and covered with the first side 213 and the second side 214. As shown in FIG. C, after the carrier substrate 2 is prepared, a conductive member 3 and 3a must be respectively disposed on the P-type electrode layer 22 and the N-type electrode layer 23 of the carrier substrate 2. Preferably, the conductive members 3 and 3a are provided. It may be a gold plated or silver plated solder joint on the carrier substrate 2. 201108467 Λΐ Λΐ: 2; Γ, ΐ conductive elements 3 and 3 & for gold plating or silver plating solder joints on the carrier substrate 2, must be set to make if: eutectic process 'to raise the temperature of the soil a total day > For plating of the P-type electrode 18 and the N-type electrode 19 in the gold-plated or silver-plated solder joint, ☆ is penetrated to tin (Tin; Sn) or gold-tin (Gold_Tin; A 1 〇 'I), system) In order to make the LED flip-chip structure
型電極19經由導電元件3與3a而P =極18與N 體基板2之P型電極層22與N型爲'連接於載 應用上，導電元件…亦可 置的金（Gold; Au)、錫（Tin; Sn)或令=上所叹 ，Sn)合金；且P型電極18與以型電G〇ld-Ti^; 置鍍金或鍍銀焊點，藉以進行上 电曰°上可设 之外，當導電元件3與％為錫球J錫：：程:除此 回焊製程，亦可使P型電極18盥N刑胃τ，透過一 由導電元件3與3a而分別電性連極19亦可經 與Ν型電極層23。 妾於Ρ型電極層22 ^分別^性連/電^型^ 18與Ν型電極 J :必須將-透光封裝材料4 ^裝fE]^曰電極層” $電兀件3與3a，待透光封裝^ 覆晶結構j、 出上述之覆晶led封裝結^ λλ固化後，便製作 LeD封裝結構1〇〇 谭接後，再將；晶 上件dW输製） 舉凡在所屬技術領域 易理解，在以上所揭露的習有通常知識者皆能輕 覆晶結構！之p型電I f，中，由於必需先將 ，性連接於載體基板2之p /、N型電極19分別 s 23 ’然後再灌人透光封極層22與N型電極 襄材料4封裝咖覆晶結 201108467 ? m電广件3與3a;因此，必須同時進行將led 合於載體基板2的焊接製程，封裝 !屬_焊接出覆件封 實在非常不便。 ㈢< F出LED組件， 此外’由於在灌人透光封襄材料4日寺，必 — =内施加填充壓力；因此，又二 料4溢漏至载體基板2的問題; = 加導= 【發明内容】 本發明所欲解決之技術問題與目的： 有鑒於習知技術所提供之LED組件之製造方、' ίΪί在必須接續進行共晶製程與封裝製程才能S 乍设晶LED封裝結構等繁瑣製程所帶來的不便， 封裝時容易造成透光封裝材料溢漏至載體基板的氏 題，以及增加導電元件的電性連接不良率等問題。續 此，本發明之主要目的在於提供一種LED組件之 作方法，其係藉由一封裝製程製作出LED晶片封 體，使LED晶片封裝體具有外露之一 p型電極與一 N，電極，藉以使所製作出LED日日日#封裝體可^接 T厂d苎繁續之覆晶LED封裝結構而設置於一電路 土板。藉此，可有效同時解決上述之種種問題。 201108467 本發明解決問題之技術手段： 明為解決f知技術之問題，所採用之技術手 種發光二極體（Light Emitting Diode; )封襄組件之製造方法，該製造方法係先在一基 材^上被覆一反射層，在該反射層上被覆一發光層， 並自發光層穿過反射層而朝向基材層延伸出一 p型 電極與一 N型電極，藉以形成一 LED晶片結構；然 後’利用一透光封裝材料包覆LED晶片結構，使P 鲁 型電極與N型電極外露於透光封裝材料，藉以形成 LED晶片封裝體；最後，將led晶片封裝體之p型 電極與N型電極電性連結於一電路基板，藉以製作出 LED組件。 在本發明較佳實施例中，LED晶片結構包含一基 材層、一反射層、一透光導電子層（light-transmissible conductive sub-layer )、一 P 型電極包覆子層（p type electrode cladding sub-layer )、一透光多重量子井 (light-transmissible multiple quantum well)與一 N 型電 φ 極包覆子層（Ν type electrode cladding sub-layer )。反 射層係被覆於基材層’透光導電子層係被覆於反射 層，P型電極包覆子層係被覆於透光導電子層，透光 多重量子井係被覆於p型電極包覆子層’N型電極包 覆子層係被覆於透光多重量子井。其中’透光導電子 層、P型電極包覆子層、透光多重量子井與N型電極 包覆子層可視為上述之發光層。 本發明對照先前技術之功效： 相較於習知利用覆晶LED封裝結構製作LED組 201108467 件之製造方法，由於在本發明例所揭露之LED組件 之製造方法中，係直接進行封裝製程而製作出lED 晶片封裝體，並使LED晶片封裝體具有外露之一 p 型電極與一 N型電極；因此，所製作出之LED晶片 封裝體可直接取代製程繁瑣之覆晶LED封裝結構而 設置於二電路基板，藉以製作出LED組件。顯而易 見地，藉由上述LED組件之製造方法，可以大幅提 升製作LED組件的便利性。The electrode 19 is connected to the P-type electrode layer 22 of the N-body substrate 2 via the conductive elements 3 and 3a, and the N-type is connected to the carrier, and the conductive element can also be placed in gold (Gold; Au). Tin (Tin; Sn) or ring = sigh, Sn) alloy; and P-type electrode 18 and the type of electricity G〇ld-Ti ^; placed gold or silver plated solder joints, for power-on 曰 ° can be set In addition, when the conductive elements 3 and % are tin balls J::: In addition to the reflow process, the P-type electrodes can also be made to pass through a conductive element 3 and 3a, respectively. The pole 19 can also pass through the Ν-type electrode layer 23.妾 Ρ 电极 电极 ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ Light-transmissive package ^ flip-chip structure j, after the above-mentioned flip-chip LED package junction ^ λ λ solidified, then the LeD package structure is fabricated, and then the crystal upper part dW is transferred. It is understood that in the above-mentioned p-type electrical I f, which is generally known to those skilled in the art, it is necessary to first connect the p/ and N-type electrodes 19 of the carrier substrate 2 to s 23 respectively. 'Then then refilling the light-transmissive encapsulation layer 22 and the N-type electrode 襄 material 4 encapsulating the crystal-clad crystals 201108467 ? m electro-convex components 3 and 3a; therefore, the soldering process of bonding the LED to the carrier substrate 2 must be performed simultaneously, and packaging _ _ welding out of the cover is very inconvenient. (c) < F out of the LED component, in addition, 'during the filling of the light-transparent sealing material on the 4th temple, must-fill the filling pressure; therefore, two materials and 4 spills Problems to the carrier substrate 2; = Introduction = [Disclosure] Technical problems and objects to be solved by the present invention: In view of the prior art The manufacturer of the provided LED component, ' Ϊ 在 在 必须 必须 必须 必须 必须 必须 必须 共 共 共 共 共 共 共 共 共 共 共 共 必须 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 繁 繁 繁 繁 繁 繁 繁 繁 繁 繁 繁 繁 繁 繁 繁 繁The problem of the substrate, and the problem of increasing the electrical connection failure rate of the conductive element. The main object of the present invention is to provide a method for manufacturing an LED module by using a packaging process to fabricate an LED chip package. The LED chip package has an exposed p-type electrode and an N-electrode, so that the fabricated LED day-to-day package can be connected to the T-factory and the flip-chip LED package structure. Therefore, the above-mentioned various problems can be effectively solved at the same time. 201108467 The technical means for solving the problem of the present invention: In order to solve the problem of the known technology, the technical hand-held light emitting diode (Light Emitting Diode) is used for sealing a manufacturing method of a module, which first coats a reflective layer on a substrate, and coats a light-emitting layer on the reflective layer, and passes the reflective layer toward the substrate layer Extending a p-type electrode and an N-type electrode to form an LED wafer structure; then, using a light-transmissive encapsulating material to encapsulate the LED wafer structure, the P-type electrode and the N-type electrode are exposed to the transparent encapsulating material, thereby Forming an LED chip package; finally, electrically connecting the p-type electrode and the N-type electrode of the LED chip package to a circuit substrate, thereby fabricating the LED assembly. In a preferred embodiment of the invention, the LED chip structure comprises a base a material layer, a reflective layer, a light-transmissible conductive sub-layer, a p-type electrode cladding sub-layer, and a light-transmissive multiple quantum well (light- Transmissible multiple quantum well) and an N-type electric electrode cladding sub-layer. The reflective layer is coated on the substrate layer, the light-transmissive conductive layer is coated on the reflective layer, the P-type electrode coating sub-layer is coated on the light-transmitting conductive sub-layer, and the light-transmitting multiple quantum well system is coated on the p-type electrode coated The layer 'N-type electrode coating sub-layer is coated on the light transmissive multiple quantum well. The light-transmitting conductive sub-layer, the P-type electrode coated sub-layer, the light-transmitting multiple quantum well and the N-type electrode coated sub-layer may be regarded as the above-mentioned light-emitting layer. The present invention compares the effects of the prior art: Compared with the conventional manufacturing method for fabricating the LED group 201108467 by using the flip-chip LED package structure, since the manufacturing method of the LED module disclosed in the example of the present invention is directly performed by the packaging process The lED chip package is provided, and the LED chip package has one of the exposed p-type electrodes and an N-type electrode; therefore, the fabricated LED chip package can directly replace the cumbersome flip-chip LED package structure and is disposed on the second The circuit substrate is used to fabricate the LED assembly. Obviously, with the above-described manufacturing method of the LED module, the convenience of fabricating the LED assembly can be greatly improved.
由於在本發明所揭露之LED組件之製造方法 中，係直接進行封裝製程而製作出LED晶片封裝體， 在製作LED晶片封裝體的過程中，完全不會使用到 載體基板；因此，可以在進行封裝製程中，不僅不存 在透光封裝材料溢漏至載體基板的問題，而且也不存 f因承受灌入透光封裝材料時所施加的填充壓力所 造成之電性連接不良的問題，更可使LED晶片封裝 體的體積與LED晶片結構相近，亦即使LED晶片封 ，體=體積遠小於習知覆晶LED封裝結構的體積， 藉以提升電路基板配置LED晶片封裝體的空間利用 〇 =正以上所述，藉由本發明所揭露之led組件 之製造方法，不僅可以提升製作LED組件的便利性， ίΪϋ升製作LED組件品#，更可提升電路基板 配置LED晶片封裝體之空間利用率。 本發明所採用的具體實施例，將藉由以下之實施 例及圖式作進一步之說明。 、 【實施方式] 本發明所提供之發光二極體（Light Emhting 201108467In the manufacturing method of the LED module disclosed in the present invention, the LED chip package is directly formed by the packaging process, and the carrier substrate is not used at all in the process of fabricating the LED chip package; therefore, it can be performed In the packaging process, there is no problem that the transparent packaging material overflows to the carrier substrate, and the problem of poor electrical connection caused by the filling pressure applied when filling the transparent packaging material is not present, and The volume of the LED chip package is similar to that of the LED chip structure, and even if the LED chip is sealed, the volume = volume is much smaller than the volume of the conventional flip chip LED package structure, thereby improving the space utilization of the circuit chip package for the LED chip package. According to the manufacturing method of the LED component disclosed in the present invention, not only the convenience of fabricating the LED component can be improved, but also the LED component product can be improved, and the space utilization ratio of the LED chip package of the circuit substrate can be improved. The specific embodiments of the present invention will be further described by the following embodiments and drawings. [Embodiment] The light emitting diode provided by the present invention (Light Emhting 201108467)
Diode; LED)組件之製造方法可廣泛運用於製作各種 LED組件，而且相關之組合實施方式更是不勝枚舉， 故在此不再--贅述，僅列舉其中一個較佳實施例加 以具體說明。 請參閱第二A圖至第二D圖，其係顯示本發明 較佳實施例所建議之LED組件之一系列製程。在本 實施例所揭露之重點在於先製作出一 LED晶片封裝 體200(標示於第二b圖），然候再製作LED組件300 (標示於第二D圖）。如第二A圖所示，其係顯示在 本發明較佳實施例中，製作LED晶片結構之製程。 在製作LED晶片封裝體200時，必須先製作出一 LED 晶片結構5，此時，必須先製備一基材層51。 接著’必須依序形成一反光層52、一透光導電子 層（light-transmissible conductive sub-layer ) 53、一 P 型電極包覆子層（p type electrode cladding sub-layer ) 54、一透光多重量子井（light-transmissible multiple quantum well) 55與一 N型電極包覆子層（N type electrode cladding sub-layer ) 56。反射層 52 係被覆於 基材層51，透光導電子層53係被覆於反射層52，P 型電極包覆子層54係被覆於透光導電子層53，透光 多重量子井55係被覆於p型電極包覆子層54，N型 電極包覆子層56係被覆於透光多重量子井55。其 中，透光導電子層53、P型電極包覆子層54、透光 多重量子井55與N型電極包覆子層56可視為一發光 層50。 基材層51可由含有碳化石夕（siiiC(m carbide;基 材層51可由含有碳化石夕（以以⑽以作此；沉）、氮化 紹（aluminum oxide; ai2o3 )、砷化鎵（gaiu画 arseni(ie;Diode; LED) component manufacturing methods can be widely used to fabricate various LED components, and the related combinations of implementations are numerous, and thus will not be repeated here, only one of the preferred embodiments will be specifically described. Referring to Figures 2A through 2D, which are a series of processes for LED assemblies as suggested by the preferred embodiment of the present invention. The focus of the present disclosure is to first fabricate an LED chip package 200 (labeled in Figure 2b), and then fabricate the LED assembly 300 (labeled in Figure 2D). As shown in Figure 2A, it is shown in a preferred embodiment of the invention to fabricate an LED wafer structure. When the LED chip package 200 is fabricated, an LED wafer structure 5 must be fabricated. In this case, a substrate layer 51 must be prepared. Then, a light-transmissible conductive sub-layer 53 , a p-type electrode cladding sub-layer 54 , and a light-transmitting layer must be sequentially formed. A light-transmissible multiple quantum well 55 and an N-type electrode cladding sub-layer 56. The reflective layer 52 is coated on the base material layer 51, the light-transmitting conductive sub-layer 53 is coated on the reflective layer 52, the P-type electrode coating sub-layer 54 is coated on the transparent conductive sub-layer 53, and the light-transmitting multiple quantum well 55 is coated. The p-type electrode coating sub-layer 54 is coated with a light-transmissive multi-quantum well 55. The light-transmitting conductive sub-layer 53, the P-type electrode covering sub-layer 54, the light-transmitting multiple quantum well 55 and the N-type electrode covering sub-layer 56 can be regarded as a light-emitting layer 50. The base material layer 51 may contain carbon carbide (siiiC (m carbide; the base material layer 51 may contain carbon carbide (for (10) for this; sink), aluminum oxide (ai2o3), gallium arsenide (gaiu) Painting arseni(ie;
GaAs )、矽（silicon; Si )、藍寶石（sapphire )、銅（c〇pper; 201108467 cu)、鎢銅合金（copper-umgsten alloy; cu_w alloy) 與填化鎵（gallium phosphide; Gap)中之至少一種材 料之基板所組成。反射層52可由二氧化鈦與二氧化 石夕（TicvSi〇2 )混合物、三氧化二鋁與二氧化石夕 (AiA/sioJ混合物、或氮化矽與二氧化矽（siN/Si 混合物所組成。透光導電子層53可使用鎳_金（3：^_1= 金屬薄膜’並經高溫（約500至550。〇退火而製成。 然後’必須利用蝕刻或鑽孔等技術，自基材層51 朝向發光層50分別開設一 P型電極延伸槽^ \At least one of GaAs), silicon (Si), sapphire, copper (c〇pper; 201108467 cu), copper-umgsten alloy (cu_w alloy), and gallium phosphide (Gap) A substrate composed of a material. The reflective layer 52 may be composed of a mixture of titanium dioxide and sulphur dioxide (TicvSi〇2), a mixture of aluminum oxide and sulphur dioxide (AiA/sioJ mixture, or a mixture of tantalum nitride and cerium oxide (siN/Si). The electron-conducting layer 53 can be made of nickel-gold (3:^_1=metal thin film' and subjected to high temperature (about 500 to 550. 〇 annealing. Then 'must be etched or drilled, from the substrate layer 51 The luminescent layer 50 respectively defines a P-type electrode extending slot.
與一 Ν型電極延伸槽（未標號型電&延伸 開設至接觸於Ρ型電極包覆子層54,型電極延 則開6又至接觸於Ν型電極包覆子層5 6，並以奶目 膜5 7加以隔絕。接著，必須使一 p型電極$ 8 ='、彖 電極包覆子層54經由P型電極延伸样， * 型 光導電子層53、反射層52與基材層而“二牙， 使一 N型電極59自電極包覆子層56細^各； 電極延伸槽，依序穿過透光多重量子井55|1^型 $覆子層54、透*導電子層53、反射層52、^2 51而延伸外露，並且利用絕緣瞑57盥透y ς材層 井55以及Ρ型電極包覆子層54、透i 量子 反射層52以及基材層51保持絕緣。至，層53、 出上述之LED晶月結構5。 可製作 如第二B圖所示，其係顯示在本發明較 中，封裝LED晶片結構以製作出lEd曰1土只知例 製程。在製作出LED晶片結構5後，;/裝體之 製程。在進行封裝製程時，必須利用封襞 2覆LED晶片結構5，使P型電極58鱼n ^料 9 =持外露於透光封|材料6，待透光封袈=極 卹固化後，則完成了 LED晶片封裝體2〇〇之萝作冷 11 201108467 如第二c圖所示’其係顯示在本發明較佳實施例 中，製備一電路基板之製程。另外，在製作出' led 組件300之前，還必須製備一電路基板7，電路基板 7包含一基材層71、一第一電路配置層72與一第二 電路配置層73。第一電路配置層72與第二電路配置 層73係分別設置於基材層71的兩侧。第—電路配置 層72與第一電路配置層73中之至少一者係佈設一 LED驅動（或控制）電路’在本實施例中，係在第一 電路配置層72佈設LED驅動（或控制）電路。較佳And a Ν-type electrode extending groove (the unlabeled type electric & extends to contact the Ρ-type electrode coating sub-layer 54, the type electrode extends 6 and contacts the Ν-type electrode coating sub-layer 5 6 and The milk film 5 7 is isolated. Next, a p-type electrode $ 8 = ', the 彖 electrode coating sub-layer 54 must be extended via the P-type electrode, the *-type photoconductive sub-layer 53, the reflective layer 52 and the substrate layer. "Embedded teeth, an N-type electrode 59 is thinned from the electrode coating sub-layer 56; the electrode extending groove, sequentially passes through the light-transmitting multiple quantum well 55|1^ type of the sub-layer 54, the transparent conductive sub-layer 53. The reflective layer 52, ^2 51 is extended and exposed, and the insulating layer 57 is used to penetrate the y-clay layer well 55 and the 电极-type electrode covering sub-layer 54, the transparent quantum reflective layer 52, and the substrate layer 51 to maintain insulation. To, the layer 53 and the above-mentioned LED crystal structure 5 can be fabricated as shown in FIG. 2B, which is shown in the present invention, and the LED wafer structure is packaged to produce the lEd曰1 soil only known process. After the LED chip structure 5 is fabricated, the process of the package is performed. When the package process is performed, the LED chip structure 5 must be covered with the package 2 so that the P-type electrode 58 is n ^ 9 = exposed to the light-transmissive seal | material 6, to be light-transparent seal = after the polar-shirt is cured, the LED chip package 2 is completed as a cold for the cold 11 201108467 as shown in the second c- In the preferred embodiment of the present invention, a circuit substrate process is prepared. In addition, before the 'led component 300 is fabricated, a circuit substrate 7 must be prepared. The circuit substrate 7 includes a substrate layer 71 and a first circuit configuration. The layer 72 and a second circuit arrangement layer 73. The first circuit arrangement layer 72 and the second circuit arrangement layer 73 are respectively disposed on both sides of the substrate layer 71. The first circuit arrangement layer 72 and the first circuit arrangement layer 73 At least one of them is provided with an LED driving (or control) circuit. In this embodiment, an LED driving (or control) circuit is disposed in the first circuit configuration layer 72. Preferably,
者，電路基板 7 可為 FR4 (abbreviati(m f〇r Flame, the circuit board 7 can be FR4 (abbreviati(m f〇r Flame
Retardant 4 )銅箔基板、印刷電路板或其他佈設lEd 驅動（或控制）電路之電路基板。 ° 如第一 D圖所示，其係頭示在本發明較佳實施 中，將LED晶片封裝體設置並焊接於電路基板之 程。在製備電路基板7後，可將LED晶片封裝體2〇〇 設置於基板7’使LED晶片封裝體2〇〇中之p 58與N型電極59電性連接於第—電路配置層72 佈設LED驅動（或控制）電路。較佳者，θ 一焊接製程使Ρ型電極58與>^型電極59電性連 路酉己，層7 2所較L E D驅動（或控制）電路: 在元成焊接製程後，即可製作出上述之led 3 0 0。較佳者，接製程係利$融熔或半融熔之 錫球（圖未繪製）或錫膏黏合於 極58與N型電極59，或點合於第一電路配置 細，並進行回焊 == 電吻 巧讀以上所揭露之技術後’相信舉凡在所 術領域^具有通常知識者皆能輕易理解，由“ ^ 明車父佳貫施例所揭露之LED組件3〇〇之穿造方^ 12 201108467 中，係直接進行封裝製程而製作出LED晶片封裝體 200，並使LED晶片封裝體2〇〇具有外露之p型電極 58與N型電極59 ;因此，所製作出之LED晶片封裝 體200可直接取代習知製程繁瑣之覆晶LED封裝^ 構100而電性連結於電路基板7，U以使製作出 組件300。顯而易見地，藉由本發明所揭露之lED組 件300之製造方法，可以大幅提升製作LED組件300 的便利性。 由於在本發明所揭露之LED組件300之製造方 φ 法中，係直接進行封裝製程而製作出LED晶片封裝 體200’在製作LED晶片封裝體200的過程申，完^ 不會使用到習知技術中的載體基板2 ;因此，可以在 進行封裝製程中，不僅不存在透光封裝材料6溢漏至 載體基板2的問題，而且也不存在因承受灌入透光封 裝材料6時所施加的填充壓力所造成之電性連接不良 的問題’更可使LED晶片封裝體200的體積與LED 晶片結構5相近，亦即使LED晶片封裝體2〇〇的體 積遠小於習知覆晶LED封裝結構1 〇〇的體積，藉以 提升電路基板7配置LED晶片封裝體200的空^利 用率。 綜整以上所述，藉由本發明所揭露之led組件 300之製造方法，不僅可以提升製作LED組件300 的便利性，還可以提升製作LED組件300品質，更 可提升電路基板7配置LED晶片封裝體200之空間 利用率。 藉由上述之本發明實施例可知，本發明確具產業 上之利用價值。惟以上之實施例說明，僅為本發明之 較佳實施例說明，舉凡所屬技術領域中具有通常知識 者當可依據本發明之上述實施例說明而作其它種種 13 201108467 之改良及變化。然而這些依據本發明實施例所作的種 種改良及變化，當仍屬於本發明之發明精神及界定之 專利範圍内。 【圖式簡單說明】 第一 A圖至第一 E圖係顯示習知之LED組件之一系 列製造過程； 第二A圖係顯示在本發明較佳實施例中，製作LED I 晶片結構之製程， 第二B圖係顯示在本發明較佳實施例中，封裝LED 晶片結構以製作出LED晶片封裝體之製程； 第二C圖係顯示在本發明較佳實施例中，製備電路基 板之製程；以及 第二D圖係顯示在本發明較佳實施例中，將LED晶 片封裝體設置並焊接於電路基板之製程。 • 【主要元件符號說明】 100 覆晶LED封裝結構 1 LED覆晶結構 11 透光基材層 12 緩衝層 13 N型電極包覆子層 14 多重量子井 15 P型電極包覆子層 14 201108467Retardant 4) Copper foil substrate, printed circuit board or other circuit board on which the lEd drive (or control) circuit is placed. As shown in the first D, the head is shown in the preferred embodiment of the present invention, and the LED chip package is placed and soldered to the circuit substrate. After the circuit board 7 is prepared, the LED chip package 2 can be disposed on the substrate 7 ′ to electrically connect the p 58 and the N-type electrode 59 in the LED chip package 2 to the first circuit arrangement layer 72. Drive (or control) the circuit. Preferably, the θ-welding process electrically connects the Ρ-type electrode 58 and the ^-type electrode 59, and the layer 7 2 is compared to the LED driving (or control) circuit: after the Yuancheng soldering process, the device can be fabricated. Out of the above led 3 0 0. Preferably, the solder ball or the semi-fused solder ball (not shown) or the solder paste is bonded to the pole 58 and the N-type electrode 59, or the first circuit configuration is fine, and reflow is performed. == After the electric kiss has read the above-mentioned techniques, I believe that anyone who has the usual knowledge in the field of surgery can easily understand, and the LED components disclosed by the "Mr. In the case of 2011-0467, the LED chip package 200 is fabricated by directly performing a packaging process, and the LED chip package 2 has an exposed p-type electrode 58 and an N-type electrode 59; therefore, the fabricated LED chip The package body 200 can be directly electrically connected to the circuit substrate 7 and U to replace the conventional flip-chip LED package structure 100 to make the assembly 300. Obviously, the manufacturing method of the lED assembly 300 disclosed by the present invention is apparent. The convenience of fabricating the LED assembly 300 can be greatly improved. In the manufacturing method of the LED module 300 disclosed in the present invention, the LED chip package 200' is fabricated by directly performing a packaging process to fabricate the LED chip package 200. Process application, finish ^ no The carrier substrate 2 in the prior art is used; therefore, in the packaging process, not only the problem that the light-transmissive encapsulating material 6 overflows to the carrier substrate 2 but also the intrusion of the light-transmitting encapsulating material 6 is not present. The problem of poor electrical connection caused by the applied filling pressure can make the volume of the LED chip package 200 similar to that of the LED chip structure 5, even if the volume of the LED chip package 2 is much smaller than that of the conventional flip chip. The volume of the LED package structure 1 is used to improve the space utilization of the LED chip package 200 in the circuit substrate 7. As described above, the manufacturing method of the LED assembly 300 disclosed by the present invention can not only improve the LED manufacturing. The convenience of the component 300 can also improve the quality of the LED component 300, and can improve the space utilization ratio of the LED chip package 200 disposed on the circuit substrate 7. As can be seen from the above embodiments of the present invention, the present invention is industrially utilized. The above description of the embodiments is merely illustrative of the preferred embodiments of the present invention, and those of ordinary skill in the art may be in accordance with the present invention. The above embodiments are intended to be illustrative of other modifications and variations of the various embodiments of the present invention. However, various modifications and changes made in accordance with the embodiments of the present invention remain within the scope of the inventive concept and the scope of the invention. 1A through 1D show a series of manufacturing processes of a conventional LED assembly; FIG. 2A shows a process for fabricating an LED I wafer structure in a preferred embodiment of the present invention, and a second B diagram shows In a preferred embodiment of the present invention, a process for packaging an LED chip structure to fabricate an LED chip package; a second C diagram showing a process for preparing a circuit substrate in a preferred embodiment of the present invention; and a second D pattern In a preferred embodiment of the invention, a process for mounting and soldering an LED chip package to a circuit substrate is shown. • [Main component symbol description] 100 Flip-chip LED package structure 1 LED flip-chip structure 11 Transmissive substrate layer 12 Buffer layer 13 N-type electrode coating sub-layer 14 Multiple quantum well 15 P-type electrode coating sub-layer 14 201108467
16 透光導電膜 17 反射層 18 P型電極 19 N型電極 12 緩衝層 2 載體基板 21 基板本體 211 上表面 212 下表面 213 第一侧邊 214 第二側邊 22 P型電極層 23 N型電極層 3 ' 3a 導電元件 4 透光封裝材料 200 LED晶片封裝體 300 LED組件 5 LED晶片結構 51 基材層 52 反射層 53 透光導電子層 54 P型電極包覆子層 15 201108467 55 透光多重量子井 56 N型電極包覆子層 57 絕緣膜 58 P型電極 59 N型電極 6 透光封裝材料 7 電路基板 71 基材層 72 第一電路配置層 73 第二電路配置層 1616 Light-transmissive conductive film 17 Reflective layer 18 P-type electrode 19 N-type electrode 12 Buffer layer 2 Carrier substrate 21 Substrate body 211 Upper surface 212 Lower surface 213 First side 214 Second side 22 P-type electrode layer 23 N-type electrode Layer 3 ' 3a Conductive Element 4 Light Transmissive Encapsulant 200 LED Chip Package 300 LED Assembly 5 LED Wafer Structure 51 Substrate Layer 52 Reflective Layer 53 Light Transmissive Conductor Layer 54 P-Type Electrode Cover Sublayer 15 201108467 55 Transmitted Multiple Quantum well 56 N-type electrode coating sub-layer 57 Insulating film 58 P-type electrode 59 N-type electrode 6 Light-transmissive encapsulating material 7 Circuit substrate 71 Substrate layer 72 First circuit arrangement layer 73 Second circuit arrangement layer 16