TW201105027A - An improved power amplifier and a method for retraining power of the improved power amplifier - Google Patents

Abstract

The present invention is related to an improved power amplifier and a method for retraining power of the improved power amplifier, an improved power amplifier having an output power restraint unit, the output power restraint unit is capable of restraining output power of the improved power amplifier while having exceeding output power thereof. A method for restraining power of a power amplifier, the method comprises the steps of: determining whether power of an output power signal is exceeding through a power signal transformation unit, if yes, adjusting two variable resistor of a input amplifier unit for adjusting power of power signal, and outputting a power signal for driving a load via output terminal of power amplifier.

Description

201105027 VI. Description of the Invention: [Technical Field] The present invention relates to a power amplifier, and more particularly to a power amplifier having a power limiting function and a method of limiting the power of the power amplifier. [Prior Art]

The power amplifier of the prior art can be classified into a class D power amplifier and a class AB power amplifier, a class D power amplifier outputs a pulse modulation signal, and an ab power amplifier outputs a linear signal, wherein the class D power amplifier has higher efficiency. Advantages - Therefore, Class D power amplifiers have become synonymous with power amplifiers. Referring to the first figure, the circuit structure diagram of a class D power amplifier of the prior art is a power amplifier composed of a positive output terminal and a negative output terminal, and has the advantage of using a double-ended output to drive a power amplifier. The speaker 3〇7 can increase the power of the drive, so that the speaker 7 can play audio more efficiently. The above-mentioned double-ended output class D power amplifier describes its working mode in a single-ended manner, which is: an audio input from the Vin terminal is an operational amplifier 3〇1, and the operation is performed by the operational amplifier 30, the resistor R16 and the capacitor Cinl. Forming a triangular wave signal of self-oscillation, and inputting a square wave signal Vsquare1 to the operational amplifier 301 through RllU, synchronizing the frequency of the angular wave signal, and then outputting through a comparator 302 Pulse modulation signal to a pre-driver 3〇5, the pre-driver 3〇5 201105027 is based on the pulse modulation signal, can control one of the output power CMOS circuit 306 switch, and output the signal to drive the speaker 3 〇7. The above has explained the circuit structure of the class D power amplifier of the prior art and its working mode. The advantage of the D-class power amplifier of the prior art is that the input of the square wave signal is used to control the carrier frequency of the output signal, and the square wave circuit The design is much simpler and easier than the traditional triangular wave circuit design, which saves the circuit space in the 1C design, thus reducing the cost of the circuit layout. 'However, the signal is output from the positive and negative outputs of the class D amplifier. The design of the double-ended output can increase the power of the driving load (speaker). However, if the circuit device without power amplification is limited, the load terminal may be damaged due to the inability to withstand excessive output power.

Therefore, the inventors of the present invention have invented the implied defects of the class D power amplifiers of the prior art, and therefore strive to improve and innovate, and finally complete an improved power amplifier of the present invention and limit the power amplification. An improved power amplifying circuit device is provided to prevent damage to the load due to an excessively high primary target rate of the output power of the present invention.

The device has a limit output power rate that is too high, and 瘴56 & _ provides a voltage value that limits the power amplifier signal of the power amplifier to charge the capacitor for charging the capacitor, and then compares the result with the 201105027 through the output of the flip-flop to achieve Limit the output power. In order to achieve the primary object as described above, the inventors of the present invention have developed an improved power amplifier comprising: - input: amplifying unit; at least - a pulse modulation unit, - at least one pre-driver ° to / 胄 output transistor group '· a power amplifier positive output; a power amplifier negative output; and - output power limiting unit, including: a vibration wave conversion unit; and - power signal conversion unit, the power The signal conversion h system converts a power signal into a logic capacitor terminal, and compares the charging capacitor terminal outputted by the oscillation wave conversion unit, when the (four) capacitor terminal voltage is higher than the charging capacitor terminal voltage , indicating that the output power exceeds the 2 signal rate conversion unit, that is, the feedback signal to the input amplification unit to reduce the gain 'to achieve the effect of limiting the power. 1 and, in order to achieve the other object as described above, the inventor of the present invention developed a method for limiting the power of the power amplifier. Method 1 (step) (1) - the positive output of the power amplifier is discharged with a power amplifier, signal; step (7) The output power limiting unit is connected to a "Yangxun said, step (3) one-disk disk conversion unit outputs a charging circuit step (4) a power signal conversion unit output - logic capacitor terminal rate is = (5) two-rate signal conversion unit Judging the power of the output power signal:: Big right 疋Μ binding step (6) 'If no, perform the step, step (4) modulate the power of the two variable resistance variable power signals of the input amplification unit; and step (7) The positive output of the power amplifier and the 201105027 negative output of the power amplifier obscures the 5|丨&,,. % knife output power signal to drive a load. [Embodiment] For the sake of the recipe, a modified power amplifier and a method for limiting the power of the power amplifier and the half-amplification 1 § power of the knives are described more succinctly. It. Please refer to the second figure, which is a circuit diagram of an improved power amplifier of the present invention. The improved power amplifier 1 includes: an input amplification unit (inPUt amplifier unit) 2 coupled to the input source 101. After receiving an input signal and performing signal amplification on the input signal, the m number is output, and then the third figure is a circuit structure diagram of the input amplifying unit, and the input amplifying unit 2 includes: a fully differential amplifier ( fUUy differential ainpHfier) η, has a differential amplifier positive input terminal Vin+, a differential amplifier negative input terminal Μ., a differential amplifier positive output terminal V〇ut+, and a differential amplifier negative output terminal Vout- ' The differential amplifier positive input terminal + is coupled to the differential amplifier negative input terminal Vin-system to the input source 1〇1, and the differential amplifier positive output terminal Vout+ and the differential amplifier negative output terminal v〇ut_ Each of the next stage is coupled to a pulse modulation unit 3 (pulse modulation unit), and the fully differential amplifier 21 can perform signal amplification of the input signal to respectively output the amplified signal to the pulse. And a variable resistor RV1 coupled between the positive input terminal of the differential amplifier and the negative output terminal of the differential amplifier, and wherein the variable resistor RV1 is coupled between the positive input terminal of the differential amplifier and the negative output terminal of the differential amplifier, and Another variable power 201105027 resistor RV2 is connected between the negative input terminal of the differential amplifier and the positive output terminal of the differential amplifier. By adjusting the resistance value of the variable electric BRV1 and RV2, the fully variable amplifier 21 can be adjusted. a size of the output gain; a set of s-pse modulation unit (pUise modulation unit) 3, the system is connected to the input amplifying unit 2 to receive the amplified signal, and after performing the pulse modulation of the amplified signal, 'output a pulse The variable signal, then please refer to the fourth circuit diagram of the circuit configuration diagram of the pulse modulation unit. The pulse modulation unit 2 includes: an integrator 31 ' can convert the amplified signal into a triangular wave signal, the integrator 31 includes: an integrator capacitor Cint coupled to an input resistor R2〇, the charge and discharge characteristic of the integrator capacitor Cint is used to integrate the amplified signal; and an operational amplifier (0PA) 311, having an operational amplifier positive input terminal 3112, an operational amplifier negative input terminal 3111, and an operational amplifier output terminal 3113, the operator amplifier positive input terminal 3112 is lightly connected to an additional reference voltage voltage VREF 'and The negative input terminal 3111 of the operational amplifier is lightly connected to the input resistor R20 and the integrator capacitor Cint. When the integrator capacitor Cint repeatedly performs charging and discharging, the operational amplifier 311 outputs the triangular wave signal having periodicity to one of the next stage. a pre-drive unit 4; and a first comparator 32 having a first comparator positive input terminal 321, a first comparator negative input terminal 322, and a first comparison The output terminal 323 of the first comparator is coupled to the operational amplifier output 3113 to receive the triangular wave signal, and the first comparator negative input 201105027 is connected to the reference voltage VREF. - Comparator output

The comparator 32 outputs the pulse modulation signal to the pre-drive unit 4; and the pre-drive unit 4 is coupled to the pulse modulation unit 7G 3 to receive the pulse tone. Variable signal and based on pulse modulation signal

And the output transistor group 5 is coupled to the pre-drive unit 4, and the pre-drive unit 4 receives the pulse modulation signal output by the pulse modulation unit 3 Based on the pulse modulation signal, the pre-drive unit 4 can control the on and off of the output transistor group 5, so that the output transistor group 5 outputs a power signal; the power amplifier positive output terminal Out is coupled to the output. The transistor group 5 receives the power signal and drives a load 102. The power amplifier negative output terminal 〇utb is coupled to the output transistor group 5 to receive the power signal and drive the load 102. An output power limiting unit ( The output p〇wer restraint unh ) is coupled between the positive output terminal Out of the power amplifier, the negative output terminal Out of the power amplifier, and the input amplification unit 2 to receive the power signal and limit the improved power amplifier. The power includes: - vibration wave conversion unit (oscillatl〇nwavetransf〇rmati〇nunit), which can generate an oscillating wave signal and output a charging capacitor terminal voltage Vcg, see 201105027 The fifth figure is a circuit structure diagram of the oscillating wave converting unit. The oscillating wave converting unit 61 includes an oscillating wave generator 611, which can generate and output an oscillating wave signal; a first current The current switch 612' is coupled to the oscillating wave generator 61 to receive the oscillating wave signal and converted into a first current signal; a charging capacitor Ccg, the charging capacitor Ccg is coupled to the first current When the first current signal is input to the charging capacitor cCg, the converter 612' performs charging on the charging capacitor Ccg, and generates the charging capacitor terminal voltage Vcg; and a charging resistor Reg' is connected in parallel with the charging capacitor Ccg. When a current converter 012 outputs a first current signal to charge the charging capacitor Ccg, the charging resistor Reg and the ground terminal will have a charging capacitor terminal voltage vcg; and a power signal transf〇rmati〇n unit 62, the consumption of the vibration wave conversion unit 61, the power amplifier positive output terminal hunger, and the power amplifier negative output terminal 〇utb, the power signal conversion unit 62 _ The 1 force rate signal can be converted to a logic capacitor terminal 1 Vg, and the charging capacitor terminal voltage Vcg output by the oscillating wave conversion unit 61 is compared, when the logic voltage terminal voltage vg is higher than the charging capacitor terminal voltage Vcg When the output power is over, the power signal conversion unit 62 returns the signal to the input amplification unit 2 to reduce the gain to achieve the effect of limiting the power. Please refer to the sixth figure, the circuit structure diagram of the power signal conversion unit. The power signal conversion unit 62 includes a logic gate input terminal 6211 and a logic gate output terminal 6212, and the logic signal conversion unit 62 has a logic gate input terminal 6211 and a logic gate output terminal 6212. The second logic 201105027 gate input terminal 6211 The power amplifier positive output terminal Out and the power amplifier negative output terminal 〇utb are respectively coupled to receive the power signal, and the anti-mutation or logic gate 621 is rotated by the logic gate output terminal 6212 after performing the logic processing of the power signal. a logic signal; a second current converter 622 is coupled to the output of the logic gate to receive the logic signal, and after the logic signal is electrically converted, the second current signal is output; The logic capacitor is connected to the first current converter 622. When the second current signal is input to the logic capacitor Cg, the logic capacitor Cg is charged, and the logic capacitor terminal voltage Vg and a logic resistor Rg are generated. The logic capacitors are connected in parallel. When the second current converter 622 outputs the second current signal to charge the logic capacitor Cg, the logic resistor Rg and the ground terminal will have a logic capacitor terminal voltage Vg; the second comparator 623 has a a second comparator positive input terminal 6231, a first comparator negative input terminal 6232, and a second comparator output terminal 6233. The second comparator positive input terminal 6231 is coupled to the second current converter 622. The comparator negative input 6232 is coupled to the applied reference voltage VREF '. When the logic capacitor terminal voltage vg is input to the second comparator 623 through the logic resistor, the second comparator 623 performs the logic capacitor terminal voltage Vg. Comparing the reference voltage VREF and outputting a comparison signal; and a d-type flip-flop (D flip-fl〇p) 624 having a D terminal 6241, a CK terminal 6243, a Q terminal 6242, and a Qb terminal 6245 And a r end 6244, The D end 6241 is coupled to the rounding end of the second comparator 623. The ck end 6243 is coupled to a clock signal. The Q end 6242 is coupled to the 201105027 input amplifying unit 2, and the Qb end 6245 In the floating state, the ruler 6244 is coupled to the applied-high-level voltage VCC. When the second comparator 623 outputs the comparison signal to the D-type flip-flop 624 through the D-end 6241, the d-type is positive. * Its characteristic response and output a flip-flop signal back to the input put-to-2 to reduce the signal gain, and achieve the effect of limiting the output power; the current c〇ntr〇l unit 7, The current control unit 7G 7 is coupled to the pulse modulation unit 3, and the current control unit generates a current control signal to mix the amplified signal to form a current modulation signal; a feedback resistor RFB, wherein a feedback resistor RFB is coupled between the positive output terminal (10) and the input amplification unit 2, and another feedback resistor RFB is coupled to the negative output terminal 〇utb and the input amplification unit 2 Between the two feedback resistors, the positive output terminal Out can be The signal of the output terminal 〇utb is fed back to the input amplification unit 2; and an input resistor (R2) is coupled between the input amplification unit 2 and the pulse modulation unit 3 to serve as The amplification signal is input to the buffer interface of the pulse modulation unit 3. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT OF THE IMPROVED POWER AMPLIFIER CIRCUIT COMPONENTS Next, please refer to the seventh figure, which is a flow chart of a method for limiting the power of a power amplifier. The method for limiting the power of a power amplifier 12 201105027 includes the following steps: blind First, perform the steps (601 and - power amplification · 1 force rate amplifier positive output Oui step (602), "out of a power signal; then, the next step, the turn-off power limiting unit 6 receives the power fresh. H亍 step (called a vibration wide) Capacitor terminal pressure VCS. Fiber ^ Change soap 61 output a charge g, continue to perform steps (6 〇, yuan 62 output 〇 4) ' A power signal conversion single and out of the logic capacitor terminal pressure

, ^ Money 'execution step (605), a power signal conversion unit 62 is large,] the power of the output power signal is too large, the power vortex of the power signal is turned on, and the step is performed (606), the modulation An input amplifying unit 2 has a variable resistor RV1, RV2 to modulate the power of the power signal. If the cylinder is tuned, the step (607) is performed, and the power amplifier is outputting out and the power is off. The negative output terminal Outb outputs a power signal to drive a load of 1〇2. As described above, the method of limiting power to cry I*, Xuan-half-discharging power, wherein, please refer to the eighth figure, step (603), and the flow chart of the steps of step (603) (6〇3) further includes the following detailed steps: First, step (6031) is performed, an oscillation wave generator 6 is generated to generate a vibration wave signal; then, step (_) is performed, and the first current converter 612 receives the oscillation. Wave signal, and converted into - the first current signal; and, the execution of the v (6033) 'the first - current signal pair - charging capacitor and generate the charging capacitor terminal voltage Vcg, and continue to perform the step (6 〇 4) Please refer to the ninth figure, the detailed steps of the step (6〇4). Flow chart 13 201105027 Figure, step (6(4) further includes the following detailed steps: 'Execution step (6 called-reverse mutual exclusion logic to receive the power in Shi Wu D ] the output 〇ut and the power amplifier negative input

The power signal rotated by Ut; then, the step (6042) is performed, the reverse: the logic gate (2) reacts according to its characteristic, and the output-logic signal to a second current conversion 3|699. # a , D , ..., After performing step (6043), the second electricity

The stream converter 622 converts the logic signal into a second current signal; and, performing a step (6044), the second current signal charges a logic capacitor and generates the logic capacitor terminal M%, and then, performs steps (605) Please refer to the tenth figure again, the detailed steps of the step (6G5). The flow chart step (605) further includes the following detailed steps: First, the execution step (6051), the second comparison of the power signal conversion unit The 623 receives the logic capacitor (four) and the charging capacitor terminal f; then, performing step (6052), the second comparator (3) determines whether the logic capacitor terminal voltage Vg is higher than the charging capacitor terminal voltage Veg, if it is a logic capacitor terminal If the voltage vg is higher than the charging capacitor terminal voltage Vcg, the step (6〇53) is performed; if not, the step (607) is performed; then, the step (6〇53) is performed, and the second comparator 623 outputs the high level signal to a D-type flip-flop 624; then, performing a step (6054), the D-type flip-flop 624 receiving the high-level signal output by the second comparator 623; and performing the step (6〇55), the d-type positive and negative 624 responds according to its characteristics, output Amplifying the input signal to the flip-flop means 2011050272 'gain to cut, and then step (6〇6). The improved power amplifier and the method for limiting the power of the power amplifier have been clearly described. In summary, the present invention has the following advantages over other conventional power amplifications n: 1. By - The circuit device of the group output power limiting unit can be amplified by power. When the output power rate is too large, the force b of suppressing the output power of the power amplifier can be prevented from causing damage to the load end (motor or speaker). 2. By the method of the present invention, the method for limiting the power of the power amplifier can be performed by comparing a charging capacitor terminal voltage with a logic capacitor terminal voltage by a second comparison 5 § | The type of flip-flops, the group of flip-flops respond to their characteristics and feedback signals to an input amplifying unit to adjust the output gain, which automatically monitors and limits the output power of the power amplifier. The detailed description of the present invention is not intended to limit the scope of the invention, and is not intended to limit the scope of the invention. Both should be included in the scope of the patent in this case. 201105027 [Simple description of the diagram] The first diagram is a circuit diagram of a power amplifier of the prior art; the second diagram is an improved power amplifier circuit structure ISI · _ of the present invention, and the second diagram is a circuit of the input amplification unit The fourth diagram is a circuit structure diagram of the pulse modulation unit;

The fifth diagram is a circuit structure diagram of the oscillation-wave conversion unit; the circuit diagram of the power signal conversion unit of the first and second diagrams; and the seventh diagram is a flowchart of the method for limiting the power of the power amplifier, the eighth diagram is the step (603) Detailed step flow chart; detailed step flow chart of the flute chart step (604); and detailed step flow chart of the step (605). [Main component symbol description] Improved power amplifier 101 Input source 1〇2 Load 2 Input amplifier unit (input ampliHer unit) 21 fully differential amplifier 3 pulse modulation unit 3〇1 operation Amplifier 16 201105027 302 303 304 305 306 307 31 φ 311 3111 3112 3113 32 321 322 # 323 4 5 6 601~607 6031~6033 Operational Amplifier Operational Amplifier Operational Amplifier Pre-Driver Power CMOS Circuitry Speaker Integrator (Integrator) Operational Amplifier ( OPA ) Operational amplifier Negative input Operational amplifier Positive input Operational amplifier output First comparator (comparator) First comparator positive input First comparator negative input First comparator output Set drive unit (pre- Drive unit ) output transistor set output power restraint unit method step method step 17 201105027

6041~6044 Method Steps 6051~6055 Method Step 61 Oscillation Wave Transformation Unit 611 Oscillation Wave Generator 612 First Current Converter 62 Power Signal Conversion Unit (power signal transformation unit) Unit) 621 XNOR logic gate 6211 Logic gate input 6212 Logic gate output 622 Second current converter 623 Second comparator 6231 First comparator positive input 6232 First comparator negative input 6233 First comparator output 624 D flip-flop 6241 D end 6242 Q end 6243 CK end 6244 R end 18 201105027

6245 Qb terminal 7 current control unit Ccg charging capacitor Cg logic capacitor Cint integrator capacitor Cinl capacitor Cin2 capacitor Cout 1 filter capacitor Cout2 filter capacitor Lout 1 chopper inductor Lout2 filter inductor Out Power amplifier positive output Outb power amplifier negative output QN N-type power field effect transistor QP P-type power field effect transistor Rinl input resistance Rin2 input resistance R16 input resistance R17 input resistance R18 input resistance R19 input resistance R20 input resistance 19 201105027

Reg charging resistor RFB feedback resistor Rg logic resistor RV1, RV2 variable resistor Vin + differential amplifier positive input Vin- differential amplifier negative input Vout+ differential amplifier positive output Vout- difference Negative output of the dynamic amplifier Vsquare 1, Vsquare2 Square wave signal Vcg Charging capacitor terminal voltage Vg Logic capacitor terminal voltage VREF Reference voltage VCC High level voltage

] 20

Claims (1)

201105027 VII. Patent application scope: 1. An improved power amplifier includes: an input amplification unit coupled to an input source to receive an input signal, and performing signal amplification on the input signal to output an amplified signal; The at least one pulse modulation unit is coupled to the input amplifying unit to receive the amplified signal, and after performing the pulse modulation of the amplified signal, a pulse modulation signal is rotated; at least one front driving unit is coupled The pulse modulation unit receives the pulse modulation signal 'based on the pulse modulation signal to control the circuit unit of the next stage; to; an output transistor group coupled to the front drive unit, the front drive unit 7〇 Receiving a pulse modulation signal output by the pulse modulation unit, and based on the pulse modulation signal, the pre-drive unit can control the turn-on and turn-off of the output transistor group, so that the output transistor group outputs a power signal; The positive output of the amplifier is lightly connected to the output transistor group to receive the power signal and drive a load; Receiving a negative output terminal of the power amplifier, being lightly connected to the output power signal and driving the load; and - an output power limiting unit coupled to the positive output of the power wind turbine, the negative output of the U power amplifier, and the input amplification Single open > Eight early, to receive the power signal and limit the power of the improved power amplifier, including: [ 21 201105027 A vibration output conversion a, can generate an oscillation wave signal, and output a charging capacitor terminal voltage; and a power signal conversion unit coupled to the oscillating wave converting unit, the power amplifier positive output terminal, and the power amplifier negative output terminal, wherein the power signal converting unit converts the power signal into a logic Capacitor terminal voltage is compared with the capacitor terminal 输出 outputted by the amplitude wave conversion unit. 'When the logic capacitor terminal voltage is higher than the charging capacitor terminal voltage, the output power is too high. 'The power signal conversion unit is the feedback signal to Input the amplification unit to reduce the gain to achieve the effect of limiting power. 2. The improved (four) amplifier as described in the patent specification (4), further comprising: - a current control unit coupled to the pulse modulation unit, the current control generating a current control signal early, Forming a current modulation signal by mixing the amplification signal; a plurality of feedback resistors are connected to the power amplifier positive output terminal, the power amplifier negative output terminal, and the input amplification unit to signal back The input amplification unit is provided; and the plurality of input resistors are used between the input amplification unit and the pulse modulation unit for the purpose of accessing, and the u amplification signal is input into the buffer of the pulse modulation unit. interface. 3. If you apply for a patent range! The improved power amplification device includes the following: 22 201105027 A full differential amplifier having a differential amplifier positive input terminal, a differential amplifier negative input terminal, and a differential amplifier a positive output terminal and a negative output terminal of the differential amplifier, the positive input terminal of the differential amplifier is coupled to the negative input terminal of the differential amplifier, and the differential amplifier positive output is negative with the differential amplifier The output terminals are respectively coupled to the pulse modulation unit, the fully differential amplifier can perform signal amplification of the input signal to respectively output the amplified signal to the pulse modulation unit; and two variable resistors, wherein a variable resistance system The variable resistor is coupled between the positive input terminal of the differential amplifier and the negative output terminal of the differential amplifier, and the other variable resistor is coupled between the negative input terminal of the differential amplifier and the positive output terminal of the differential amplifier. The resistance value of the variable resistor can be adjusted to the magnitude of the output gain of the fully differential amplifier. 4. The improved power amplifier according to claim 2, wherein the pulse modulation unit further comprises: an integrator that converts the amplified signal into a triangular wave signal, the integrator comprising: an integral The capacitor is coupled to the input resistor, and the amplification signal is integrated by the charge and discharge characteristics of the integrator capacitor; and an operational amplifier having an operational amplifier positive input terminal, an operational amplifier negative input terminal, And an operational amplifier output end, the positive input terminal of the operational amplifier is coupled to one of the external reference voltages, and the negative input end of the operational amplifier is coupled to the input resistance and the integrator capacitance, and the integrator 23 201105027 capacitor is repeatedly executed During charging and discharging, the operational amplifier outputs the triangular driving signal with periodicity to the pre-drive unit of the next stage; and a first comparator has a first comparator positive input terminal and a first comparator negative terminal An input terminal and a first comparator output, the first comparator positive input is coupled to the operational amplifier output for receiving An angular wave signal, wherein the first comparator negative input is coupled to the applied reference voltage, the first comparator output is coupled to the pre-drive unit, and the first comparator performs a reference voltage and a triangular wave After the signal is compared, the pulse modulation signal is output to the front drive unit. 5. The improved power amplifier of claim 1, wherein the oscillating wave converting unit further comprises: an oscillating wave generator for generating and outputting the oscillating wave signal; a first current converter The oscillating wave generator is coupled to receive the oscillating wave signal and convert it into a first current signal; 镛 a charging capacitor coupled to the first current converter, the first current § Ι When the charging capacitor is input, the charging capacitor is charged, and the charging capacitor terminal voltage is generated; and a charging resistor is connected in parallel with the charging capacitor. When the first current converter rotates the first current signal to charge the charging capacitor, There will be a charging capacitor terminal voltage between the charging resistor and the ground. 6. An improved power amplifier according to claim 1, wherein the power signal conversion unit further comprises: 24 201105027 an anti-mutation or logic gate having two logic gate inputs and a logic gate An output end, the two logic gate input ends are respectively coupled to the positive output end of the power amplifier and the negative output end of the power amplifier to receive the power signal, and the anti-mutation or logic gate is processed by logic processing the power signal. A logic signal is output through the logic gate output; a second current converter is coupled to the logic gate output to receive the logic signal and convert the logic signal to perform a current conversion, and output a second current signal; a logic capacitor, the system is coupled to the second current converter, when the second current signal is input to the logic capacitor, the logic capacitor is charged, and the logic capacitor terminal voltage is generated; a logic resistor, a logic capacitor Parallel, when the second current converter outputs a second current signal to charge the logic capacitor, the logic resistor and the ground terminal will have a logic capacitor end a second comparator having a second comparator positive input terminal, a second comparator negative input terminal, and a second comparator output terminal, the second comparator positive input terminal coupled to the logic resistor, The second comparator negative input terminal is coupled to one of the additional reference voltages. 'When the logic capacitor terminal voltage is input to the second comparator through the logic resistor, the second comparator performs the comparison between the logic capacitor terminal voltage and the reference voltage. And a D-type flip-flop has a D-end, a ck-end, a Q-end, a Qb-end, and an R-end, and the D-end is coupled to the second comparator output End, 25 201105027 7. 8. The CK end is coupled to a clock signal (a〇ck), which is connected to the input amplifying unit, and the Qb end is connected to the floating state and the high-level one. After the comparison signal is sent to the D-type flip-flop, a positive and negative signal is outputted to the input gain, and the output power is limited to be as large as the Q-end of the patent application. The R terminal is coupled to the second comparator through the D terminal to output therein, the load is a horse A method or a speaker of a power amplifier limits, (1) - and the positive output terminal of the power amplifier - a terminal output power signal; anti-D type flip-flop according to their properties into the amplification unit, to reduce the small effect of the inquiry. The improved power amplifier comprises the following steps: a power amplifier negative output (7) - an output power limiting unit receives the power signal; (3) - an oscillating wave converting unit outputs a charging capacitor terminal voltage; (4) - the power signal conversion unit outputs a logic capacitor terminal voltage; [5) 7 the power signal conversion unit determines whether the power of the output power signal is too large, and if so, performs step (6), and if not, performs step (7); 6) Modulation - wheel into bubble / on - input amplification of the second variable resistor to adjust the power of the power signal; and (7): the power amplifier positive output and the power amplifier negative output respectively output power signal Drive - load. For example, the method of limiting the power amplifier 26 9 201105027 described in the first application of the patent application scope, wherein the step (3) further comprises the following steps: (31) - the oscillation wave generator generates an oscillation wave a signal (32) - the first current converter receives the oscillating wave signal and converts it into a first current signal; and (33) the first current signal charges a charging capacitor and generates the charging capacitor terminal voltage. A method for limiting the power of a power amplifier as described in the eighth application of Patent Application Fan Park, wherein the step (4) further comprises the following steps: (41) an anti-mutual multiplex gate receives the positive output of the power amplifier and The power signal outputted by the negative output of the power amplifier; (42) the anti-mutual logic gate outputs a logic signal to a second current converter according to its characteristic; (43) the second current converter The logic signal is converted into a first current signal; and (44) the second current signal charges a logic capacitor and generates the logic capacitor terminal voltage. A method for limiting the power of a power amplifier according to the eighth aspect of the patent application, wherein the step (5) further comprises the following steps: (51) one of the power signal conversion units receives the second comparator simultaneously The logic capacitor terminal voltage and the charging capacitor terminal voltage; (52) the first comparator determines whether the logic capacitor terminal voltage is higher than the charging capacitor terminal voltage, and if yes, performs step (53), and if not, 27 201105027 performs steps (7); (53) (54) The second comparator wheel magazine j „ π m m muscle muscle-D-type flip-flop; the D-type flip-flop receives the high-level number of the second comparator; And Micro Motion (55) D-type flip-flops respond to their characteristics and output a flip-flop signal to the input amplification unit to reduce the gain. 12. The method of claim 1, wherein the limiting power amplifier power of the item 8 is a motor or a speaker. 28