.201033682 六、發明說明： 【發明所屬之技術領域】 本發明係有關一種顯示面板，特別是關於一種高畫面品質之液晶 顯示面板。 【先前技術】 請參閱第1圖，在傳統主動矩陣式的液晶顯示器（LCD)中，其 單閘極電路架構之每個畫素電極10具有一薄膜電晶體（TFT),其閘 極連接至水平方向的掃瞄線12，源極連接至垂直方向的資料線14 ,没 極則連接至畫素電極，鄰行的薄膜電晶體有各自連接的資料線14。 ® 以下介紹此傳統電路架構的基本操作方式，在水平方向上的同一 條掃瞄線12上，所有薄膜電晶體的閘極都連接在一起，所以施加電壓 是連動的，若在某一條掃瞄線12上施加足夠大的正電壓，則此條椅瞄 線上所有的薄膜電晶體都會被打開，此時該條掃瞄線12上的畫素電 極，會與垂直方向的資料線14連接，而經由垂直資料線14送入對應 的視訊信號’以將畫素電極充電至適當的電壓，以控制畫素電極之 灰階亮度。接著施加足夠大的負電壓，關閉薄膜電晶體，直到下次再 重新寫入信號’其間使得電荷保存在液晶電容上；此時再啟動下一條 Q 水平掃猫線12，送入其對應的視訊信號。如此依序將整個畫面的視訊 資料寫入，再重新自第一條重新寫入信號。 上述之單閘極電路架構由於資料線14的數量過多，因此其消耗在 源極晶片上的成本相當高，而為了減少此成本的消耗 ，後來的技術提 出了-種雙閘極電路架構，也就是如第2圖所示，相鄰兩行的畫素電 極16共用同一條資料線2〇，這樣一來就可以減少資料線2〇的使用 數量，進而降低源極晶片的製造成本。 以下順便介紹此單、雙閘極電路架構所使用的彩色遽光片之彩色 ’如第3圏所其中，每_個畫素電極的面積、雜、寬 長皆分別與每-個彩色畫素的面積、形狀、寬長相同，且每一個畫素 .201033682 電極係與每一個彩色畫素的排列位置相互對應。彩色畫素19旁設有黑 色矩陣17，每一個彩色畫素19的長邊與寬邊比例係為3比1，其三 原色’即紅（R)、綠（G)、藍（B)色皆位於同一列的位置，且彼此 相鄰，若以同一列的六个彩色畫素為一個點光源單元，則每個點光源 單元的形狀為一長邊與宽邊比例係為2比1之矩形。 請繼續參閱第2圖，在雙閘極電路架構中，當掃瞄線18由上往下 掃時’對同一條資料線20兩旁的畫素電極16而言，資料線20係會 充靠左的畫素電極16，再充靠右的畫素電極16，但這樣的設計對於畫 素驅動與耦合效應導致的畫面品質較難掌握，容易會有奇偶線與串音 〇 (crosstalk)現象的畫面品質問題。 因此，本發明係在針對土述之困擾，提出一種高畫面品質之液晶 顯示面板，以解決習知所產生的問題。 【發明内容】 本發明之主要目的，在於提供一種高畫面品質之液晶顯示面板， 其係利用畫素電極與彩色畫素之長寬比例的特殊設計，不但能減少面 板之資料線的使用數量，進而降低源極晶片的製造成本，且減輕在顯 示畫面中產生串音(crosstalk)現象，同時又讓開口率有所提升，保持良 好畫面的運作。 ® 為達上述目的，本發明提供一種高畫面品質之液晶顯示面板，包 含一第一透明基板，其上设置有複數條平行之掃描線與複數條平行之 資料線，資料線係與掃描線互相垂直，且掃瞄線與資料線之間更設有 複數畫素電極單元，每一個畫素電極單元包含六個畫素電極，每一個 畫素電極連接一條資料線與一條掃瞄線，且每一個畫素電極具有二分 別平行掃瞄線、資料線之長邊、寬邊，又長邊需大於寬邊；一第二透 明基板，其上設置有複數彩色畫素單元與複數黑色矩陣，每一個彩色 畫素單元包含六個彩色畫素，且彩色畫素之左右两边對應所述第一透 明基板之畫素電極之寬邊，其上下兩邊對應第一透明基板之畫素電極 4 201033682 之長邊；一液晶層，設置於第一透明基板與第二透明基板之間。 茲為使貴審查委員對本發明之結構特徵及所達成之功效更有進 一步之瞭解舆認識，謹佐以較佳之實施例圊及配合詳細之說明，說明 如後： 【實施方式】 雖然第2圖之雙閘極電路比起第1圖之單閘極電路架構，可以減 少資料線數量，進而降低源極晶片的製造成本，但取而代之的缺點卻 是奇偶線與串音(crosstalk)現象的畫面品質問題。因此，為了在保有上 述之優勢’又能解決上述之缺點，本發明提出一種液晶顯示面板，茲 G 說明如下。 請參閱第4圖，本發明之第一基板即阵列基板，包含複數條平行 之掃描線22與資料線24，且資料線24與掃描線22互相垂直，另還 有複數畫素電極單元26，每一個畫素電極單元26包含六個畫素電極 28 ’每一個畫素電極28連接一條資料線24與一條掃瞄線22，且每一 個畫素電極28具有二分別平行掃瞄線22、資料線24之長邊、宽邊， 又長邊係大於寬邊。 請同時參閲第5圖，每一個畫素電極28包含一薄膜電晶體52與 一畫素電容54，且此兩圖的位置是互相對應的，薄膜電晶體52之源 ® 極連接一資料線24 ’其閘極連接一掃瞄線22，其没極連接一畫素電容 54 ,此畫素電容54係接收一共同訊號，24資料線係傳輸一資料訊號 至對應連接之薄膜電晶體52中，且掃瞄線22可控制薄膜電晶體52 的開關狀態，使該電晶體52根據資料訊號控制畫素電容54之充放電， 進而使其極性反轉，同時控制子畫素28所呈現的灰階亮度。 請比較先前技術之第1圖的單閘極電路架構與第4圖，其中畫素 電極10的長邊與寬邊係分別平行資料線14與掃瞄線12，而在第4 圏中畫素電極28之長邊、寬邊係分別平行掃瞄線22、資料線24,所 以在同一顯示畫面的區域下，本發明之第4圖的資料線24分佈密度會 .201033682 較第1圓的單閘極電路架構低，因此可以降低源極晶片的製造成本， 除此之外，本發明之電路架構係為單閘極，並非如第2圊在相鄰兩行 的畫素有共用的資料線，因此本發明減輕了奇偶線與串音現象的畫面 品質問題。 請同時參閱第4圖與第6圓，以下介紹畫素電極28的長寬邊比例 與位置分佈，每-個畫素電極單元26包含六個畫素_ 28，且位於 同-行或同-顺畫素電極單元26會共㈣—條資料線24或同一條 掃晦線22，因此僅以-個畫素電極單元26為例來介紹其中的畫素電 極28。 ® 複數條掃瞄線22包含一第一掃描線30與一第二掃描線32,且資 料線24中包含-第-資料線34、一第二資料線36與一第三資料線 38 ’又第-、第三資料線34、38係位於第二資料線36之相異兩側。 每一個畫素電極單元26包含-第一、第二、第三、第四、第五、第六 畫素電極4G、42、44、46、48、5G。第-畫素電極4G係連接第-掃 瞄線30與第一資料線34，第二畫素電極42係連接第二掃瞄線32與 第一資料線34’並與第一畫素電極4〇位於第一資料線34之同一側， 即左側；第三畫素電極係連接第一掃瞄線30與第二資料線36,第一、 第二畫素電極4〇、44分別位於第一資料線34之相異兩側，即左右兩 ，，第四畫素電極46係連接第二掃瞄線32與第二資料線36,並與第 一畫素電極44位於第二資料線36之同一側，即左側；第五畫素電極 48係連接第一掃瞄線3〇與第三資料線38，第三、第五畫素電極私、 48刀別位於第二資料線36之相異兩側，即左右兩侧；第六畫素電極 50係連接第二掃瞄線32與第三資料線38，並與第五畫素電極48位 於第三資料線38之同一侧，即左側。 請再同時參閱第7圖，每一個畫素電極28皆呈矩形，且其長邊a 與寬邊b的最佳比例為4比3，與先前技術中之第2圖的雙閘極電路 架構相比較，由於雙閘極電路架構中每個畫素電極16的開口率會受到 兩條掃描線18以及兩條掃描線18間的間隔與一條資料線20的影響， 6 201033682 開口率較單閘極電路架構有所降低β而在本發明中，利用畫素電極特 殊的長寬比使每個畫素電極28的開口率僅受到一條掃描線22與一條 資料線24的影響，所以本發明之開口率較第2圖之雙閘極電路架構相 比較更提升了 3〜4%。 以下介紹本發明之顯示面板的立艘結構分解圖，以下以一畫素電 極單元與一彩色畫素單元為例，請參閲第8圖。本發明包含第一基板 200、第二基板400與設置在二基板200、400之間的液晶層500。第 一基板200即阵列基板，其包含一第一玻璃基板，其上設置有第 一畫素電極40、第二畫素電極42、第三畫素電極44、第四畫素電極 ◎ 46、第五畫素電極48、第六畫素電極50 ’第二基板400即彩色渡光 片基板’其包含一第一玻璃基板300，其上設置有第一彩色畫素、 第二彩色畫素43、第三彩色畫素45、第四彩色畫素47、第五彩色畫 素49、第六彩色畫素51，其中，第一畫素電極4〇、第二畫素電極42、 第三畫素電極44、第四畫素電極46、第五畫素電極48、第六畫素電 極50分別與第一彩色畫素41、第二彩色畫素43、第三彩色畫素45、 第四彩色畫素47、第五彩色畫素49、第六彩色畫素51呈相互對應位 置之關係’彩色畫素的左右兩邊對應畫素電極之與資料線24平行之短 邊，彩色畫素的上下兩邊對應畫素電極之與掃描線22平行之長邊。 〇 先前技術之彩色濾光片基板上的彩色畫素排列如第3圓所示，其 彩色畫素19的長邊與寬邊比例係為3比1，其三原色，即紅（R)、綠 (G)、藍（Β)色皆位於同一列的位置，且彼此相鄰，若以同一列的 六个彩色畫素為一個點光源單元，則每個點光源單元的形狀為一長邊 與宽邊比例係為2比1之矩形。但本發明之三原色分佈卻不同，如第 9圖與第10囷所示’第9圖與第1〇圖分別為彩色遽光片基板之彩色 畫素的面積與顏色分佈示意圖，彩色濾光片基板設有複數彩色畫素 41、43、45、47、49、51及其旁邊的複數黑色矩陣31。現以一彩色 畫素單元25而言’第一、第二、第三彩色畫素41、43、45分別為紅、 藍、綠色畫素，且三者的形狀呈” r”字型，而第四、第五、第六彩色畫 201033682 . =、藍、綠色畫素，且三者的形狀呈”』”字型， 由於每-錄色畫素的面積、形狀、寬長皆分別與每一個畫素電極之 面積、雜、寬長相同，因此若將彩色畫素單元2 來看’則其長邊A舆寬邊b的比例亦為爲$個點光源單70 m w姐 亦為為2比1。在這樣的設計下， 因為人類視衫法察覺’所叫師板所顯㈣來的畫面和先前技 ^之點光源單το的形狀為矩形所顯示出來的畫面相差不大並不會有 畫面毛邊的問題。 如第色I素顏色分佈係為第-實施例，料有第二實施例， =二不，t一、第二、第三彩色畫素41、43、45分別為藍、 紅绦色書音’ i-第五第六彩色畫素47、49、51分別為藍、 ί二49 51分麟綠、藍、紅色4素，且第四、第五、第六: 一 77別為綠、藍、紅色畫素。第四實施例如第13圖所 第三彩色畫素41、43、45分別為紅、綠、藍色畫 書音且笛四眘第五第六彩色畫素47、49、51分別為紅、綠、藍色 4Λ°Λ^例如第14圖所示，第…第二、第三彩色畫素41、 ❿ 49 ” ？ f藍、綠、紅色畫素，且第四、第五、第六彩色畫素47、 49、51力別為藍、綠、紅色畫素。第六實施例如第15圓所示第一、 : Ϊί彩色畫素41、43、45分別為綠、紅、藍色畫素，且第四、 八彩色畫素47、49、51分別為綠、紅、藍色畫素。 請同 =參閱第4圖與第16圖，以下以步驟方式說明每一個畫素電 資料22、資料線24之作動過程，在第4圊中，每二相鄰之 笛1R Si」为別傳輸一極性相反之第一、第二資料訊號，其波形圓如 的雪級?!不當第一資料訊號的電壓為高準位輸出時，第二資料訊號 笛-咨貝1低準位輸出，但當第一資料訊號的電壓為低準位輸出時， 二資料訊號的電_為高準位輸心換言之，第―、第二資料線34、 二別傳輪第―、第二資料訊號’而第三f料線38及其右旁之資 係分別傳輸第一、第二資料訊號，而尚未述及之資料線24所 8 201033682 ， 傳輸的訊號則以上述方式類‘。 首先每一條掃瞄線22係分別控制對應連接之畫素電極28接收第 一資料訊號或第二資料訊號，接著每一個畫素電極28即可根據第一資 料訊號或第二資料訊號控制所顯示的灰階亮度。然，這樣的訊號傳輸 方式可使顯示面板之極性轉換方式呈現點反轉，由於掃瞄線22的啟動 方式係由上依序往下啟動，因此如第17(a)圖所示，當第一掃瞄線30 啟動時，第一掃瞄線30所連接的畫素電極28由左往右的極性依序為 正、負、…、正、負、正。而當第二掃瞄線32啟動時，第一掃瞄線 30會關閉，此時如第17(b)圖所示，第二掃瞄線32所連接的畫素電極 0 28由左往右的極性依序為負、正、…、負、正、負。因此本發明之液 晶顯示面板的極性轉換方式為點反轉❶ 綜上所述，本發明不但可以減少資料線的使用數量，進而降低源 極晶片的製造成本，又減低在顯示畫面中產生串音現象。 以上所述者，僅為本發明一較佳實施例而已，並非用來限定本發 明實施之範圍，故舉凡依本發明申請專利範圍所述之形狀、構造、特 徵及精神所為之均等變化與修飾，均應包括於本發明之申請專利範圍 内0 【圖式簡單說明】 ® 第1囷為先前技術之單閘極架構的陣列基板示意圖。 第2圖為先前技術之雙閘極架構的陣列基板示意圖。 第3圖為先前技術之彩色濾光片彩色畫素排列示意圖。 第4圖為本發明之陣列基板示意圖。 第5圖為本發明之陣列基板之電路示意囷。 第6圖為本發明之畫素電極單元示意圖。 第7圖為本發明之畫素電極單元面積示意圖。 第8圖為本發明之液晶顯示面板的立體結構分解圓。 第9圏為本發明之彩色畫素單元面積示意圊。 201033682 第10圖為本發明之彩色畫素單元顏色分佈之第一實施例示意圈。 第11圖為本發明之彩色畫素單元顏色分佈之第二實施例示意圖。 第12圖為本發明之彩色畫素單元顏色分佈之第三實施例示意圖。 第13圖為本發明之彩色畫素單元顏色分佈之第四實施例示意圈。 第14圖為本發明之彩色畫素單元顏色分佈之第五實施例示意圖。 第15圖為本發明之彩色畫素單元顏色分佈之第六實施例示意圖。 第16圖為本發明之第一、第二資料訊號之波形圖。 第17⑻圖至第17(b)圖為本發明之液晶顯示面板的極性轉換示意圖。 【主要元件符號說明】 ❹ 1〇〇第一玻璃基板 200第一基板 400第二基板 12掃瞄線 16畫素電極 18掃瞄線 20資料線 24資料線 26畫素單元 30第一掃瞄線 32第二掃瞄線 36第二資料線 40第一畫素電極 42第二晝素電極 44第三畫素電極 46第四畫素電極 300第二玻璃基板 500液晶層 10晝素電極 14資料線 17黑色矩陣 19彩色畫素 22掃瞄線 〇 25彩色畫素單元 28畫素電極 31黑色矩陣 34第一資料線 38第三資料線 41第一彩色畫素 43第二彩色畫素 45第三彩色畫素 10 201033682 47第四彩色畫素 49第五彩色畫素 51第六彩色畫素 54畫素電容 48第五畫素電極 50第六畫素電極 52薄膜電晶艎.201033682 VI. Description of the Invention: [Technical Field] The present invention relates to a display panel, and more particularly to a liquid crystal display panel of high picture quality. [Prior Art] Referring to FIG. 1, in a conventional active matrix liquid crystal display (LCD), each of the pixel electrodes 10 of the single gate circuit structure has a thin film transistor (TFT) whose gate is connected to The scanning line 12 in the horizontal direction has a source connected to the data line 14 in the vertical direction, a pole connected to the pixel electrode, and a thin film transistor in the adjacent row having the data line 14 connected thereto. ® The basic operation of this conventional circuit architecture is described below. On the same scan line 12 in the horizontal direction, the gates of all the thin film transistors are connected together, so the applied voltage is interlocked if it is on a certain scan. When a sufficiently large positive voltage is applied to the line 12, all of the thin film transistors on the line of the chair are opened, and the pixel electrodes on the scanning line 12 are connected to the data line 14 in the vertical direction. The corresponding video signal 'is sent via the vertical data line 14 to charge the pixel electrode to an appropriate voltage to control the gray scale brightness of the pixel electrode. Then apply a large enough negative voltage to turn off the thin film transistor until the next time the signal is rewritten, during which the charge is stored on the liquid crystal capacitor; then the next Q horizontal sweeping cat line 12 is activated and the corresponding video is sent. signal. In this way, the video data of the entire picture is sequentially written, and the signal is rewritten from the first line. The single gate circuit architecture described above has a relatively high cost of the data line 14 because of the excessive number of data lines 14, and in order to reduce the cost, the latter technology proposes a double gate circuit architecture. As shown in Fig. 2, the adjacent two rows of pixel electrodes 16 share the same data line 2〇, which can reduce the number of data lines 2〇 used, thereby reducing the manufacturing cost of the source wafer. The following is a description of the color of the color slab used in the single- and double-gate circuit architecture. As shown in the third section, the area, the width, the width and the length of each _ pixel pixel are respectively associated with each color pixel. The area, shape, width and length are the same, and each pixel. 201033682 electrode system and each color pixel arrangement position correspond to each other. A black matrix 17 is arranged beside the color pixel 19, and the ratio of the long side to the wide side of each color pixel 19 is 3 to 1, and the three primary colors 'i' are red (R), green (G), and blue (B) colors. The positions of the same column are adjacent to each other. If the six color pixels of the same column are a point source unit, the shape of each point source unit is a rectangle with a ratio of long sides to wide sides of 2 to 1. . Please continue to refer to FIG. 2. In the dual gate circuit architecture, when the scan line 18 is swept from top to bottom, 'for the pixel electrode 16 on both sides of the same data line 20, the data line 20 will be left to the left. The pixel electrode 16 is recharged to the right pixel electrode 16, but such a design is difficult to grasp for picture quality caused by pixel driving and coupling effects, and it is easy to have a picture of parity and crosstalk. quality problem. Therefore, the present invention proposes a liquid crystal display panel of high picture quality in order to solve the problems caused by the conventional problems. SUMMARY OF THE INVENTION The main object of the present invention is to provide a high-quality liquid crystal display panel, which utilizes a special design of a pixel electrode and a color pixel aspect ratio, which can reduce the number of data lines of the panel. Further, the manufacturing cost of the source wafer is reduced, and the crosstalk phenomenon is reduced in the display screen, and at the same time, the aperture ratio is improved, and the operation of the good picture is maintained. In order to achieve the above object, the present invention provides a high-quality liquid crystal display panel comprising a first transparent substrate on which a plurality of parallel scan lines and a plurality of parallel data lines are disposed, and the data lines and the scan lines are mutually Vertical, and a plurality of pixel units are further arranged between the scan line and the data line. Each pixel unit comprises six pixel electrodes, and each pixel electrode is connected with a data line and a scan line, and each A pixel electrode has two parallel scan lines, a long side and a wide side of the data line, and a long side needs to be larger than a wide side; and a second transparent substrate on which a plurality of color pixel units and a plurality of black matrices are disposed, each A color pixel unit includes six color pixels, and the left and right sides of the color pixel correspond to the wide sides of the pixel electrodes of the first transparent substrate, and the upper and lower sides thereof correspond to the length of the pixel electrode 4 201033682 of the first transparent substrate. a liquid crystal layer disposed between the first transparent substrate and the second transparent substrate. In order to provide a better understanding of the structural features and efficacies of the present invention, the preferred embodiments and the detailed description are as follows: [Embodiment] Although Figure 2 The dual gate circuit can reduce the number of data lines and reduce the manufacturing cost of the source wafer compared to the single gate circuit structure of FIG. 1, but the disadvantage is that the picture quality of the parity line and crosstalk phenomenon is replaced. problem. Therefore, in order to solve the above disadvantages while maintaining the above advantages, the present invention proposes a liquid crystal display panel, which is explained below. Referring to FIG. 4, the first substrate of the present invention, that is, the array substrate, includes a plurality of parallel scan lines 22 and data lines 24, and the data lines 24 and the scan lines 22 are perpendicular to each other, and a plurality of pixel electrodes 26 are further disposed. Each pixel electrode unit 26 includes six pixel electrodes 28'. Each pixel electrode 28 is connected to a data line 24 and a scan line 22, and each pixel electrode 28 has two parallel scan lines 22 and data. The long side and the wide side of the line 24 are longer than the wide side. Referring to FIG. 5, each of the pixel electrodes 28 includes a thin film transistor 52 and a pixel capacitor 54. The positions of the two figures correspond to each other, and the source electrode of the thin film transistor 52 is connected to a data line. 24' is connected to a scan line 22, which is connected to a pixel capacitor 54. The pixel capacitor 54 receives a common signal, and the data line transmits a data signal to the corresponding connected film transistor 52. The scan line 22 can control the switching state of the thin film transistor 52, so that the transistor 52 controls the charging and discharging of the pixel capacitor 54 according to the data signal, thereby inverting the polarity, and controlling the gray scale represented by the sub-pixel 28. brightness. Please compare the single-gate circuit structure of FIG. 1 with the first picture, in which the long side and the wide side of the pixel electrode 10 are parallel to the data line 14 and the scan line 12, respectively, and in the fourth layer, the pixel is The long side and the wide side of the electrode 28 are parallel to the scan line 22 and the data line 24, respectively. Therefore, under the same display screen area, the data line 24 of the fourth drawing of the present invention has a density of distribution. 201033682 is smaller than the first round. The gate circuit structure is low, so that the manufacturing cost of the source wafer can be reduced. In addition, the circuit structure of the present invention is a single gate, and is not a shared data line in the pixels of the adjacent two rows. Therefore, the present invention alleviates the picture quality problem of the parity line and the crosstalk phenomenon. Please refer to FIG. 4 and the sixth circle at the same time. The length and width ratio and position distribution of the pixel electrode 28 are described below. Each pixel element unit 26 includes six pixels _ 28 and is located in the same line or the same - The smooth pixel unit 26 will have a total of (four) data lines 24 or the same broom line 22, so the pixel electrodes 28 are only described by taking the pixel elements 26 as an example. The plurality of scan lines 22 include a first scan line 30 and a second scan line 32, and the data line 24 includes a -th data line 34, a second data line 36 and a third data line 38' The first and third data lines 34, 38 are located on opposite sides of the second data line 36. Each of the pixel electrode units 26 includes - first, second, third, fourth, fifth, and sixth pixel electrodes 4G, 42, 44, 46, 48, 5G. The first pixel electrode 4G is connected to the first scan line 30 and the first data line 34, and the second pixel electrode 42 is connected to the second scan line 32 and the first data line 34' and to the first pixel electrode 4 The first pixel is connected to the first scan line 30 and the second data line 36, and the first and second pixel electrodes 4 and 44 are respectively located at the first side. The opposite sides of the data line 34, that is, the left and right sides, the fourth pixel electrode 46 is connected to the second scan line 32 and the second data line 36, and is located at the second data line 36 with the first pixel electrode 44. The same side, that is, the left side; the fifth pixel electrode 48 is connected to the first scan line 3 〇 and the third data line 38, and the third and fifth pixel electrodes are private, and the 48 knives are different from the second data line 36. The two sides, that is, the left and right sides, the sixth pixel electrode 50 is connected to the second scan line 32 and the third data line 38, and is located on the same side of the third data line 38 as the fifth pixel electrode 38, that is, on the left side. Please refer to FIG. 7 at the same time, each of the pixel electrodes 28 is rectangular, and the optimal ratio of the long side a to the wide side b is 4 to 3. The double gate circuit structure of the second figure in the prior art. In comparison, since the aperture ratio of each pixel electrode 16 in the dual gate circuit structure is affected by the interval between the two scan lines 18 and the two scan lines 18 and one data line 20, 6 201033682 has a lower aperture ratio than a single gate. The pole circuit architecture has a decrease in β. In the present invention, the aperture ratio of each pixel electrode 28 is affected by only one scanning line 22 and one data line 24 by using a specific aspect ratio of the pixel electrode, so the present invention The aperture ratio is 3 to 4% higher than that of the dual gate circuit architecture of Figure 2. Hereinafter, an exploded view of the stand structure of the display panel of the present invention will be described. Hereinafter, a pixel element unit and a color pixel unit are taken as an example, see Fig. 8. The present invention includes a first substrate 200, a second substrate 400, and a liquid crystal layer 500 disposed between the two substrates 200, 400. The first substrate 200, that is, the array substrate, includes a first glass substrate on which the first pixel electrode 40, the second pixel electrode 42, the third pixel electrode 44, and the fourth pixel electrode ◎ 46, The fifth pixel electrode 48 and the sixth pixel electrode 50 ′, the second substrate 400, that is, the color light-receiving substrate, includes a first glass substrate 300 on which the first color pixel and the second color pixel 43 are disposed. a third color pixel 45, a fourth color pixel 47, a fifth color pixel 49, and a sixth color pixel 51, wherein the first pixel electrode 4, the second pixel electrode 42, and the third pixel electrode 44. The fourth pixel electrode 46, the fifth pixel electrode 48, and the sixth pixel electrode 50 are respectively associated with the first color pixel 41, the second color pixel 43, the third color pixel 45, and the fourth color pixel. 47. The fifth color pixel 49 and the sixth color pixel 51 are in a relationship with each other. The left and right sides of the color pixel correspond to the short side of the pixel electrode parallel to the data line 24, and the upper and lower sides of the color pixel correspond to the picture. The long side of the element electrode parallel to the scanning line 22. The color pixel arrangement on the color filter substrate of the prior art is shown as the third circle, and the ratio of the long side to the wide side of the color pixel 19 is 3 to 1, and the three primary colors, namely, red (R) and green. (G) and blue (Β) colors are located in the same column and adjacent to each other. If the six color pixels in the same column are a point source unit, the shape of each point source unit is a long side and The wide-side ratio is a rectangle of 2 to 1. However, the three primary color distributions of the present invention are different, as shown in FIG. 9 and FIG. 10'. FIG. 9 and FIG. 1 are respectively a schematic diagram showing the area and color distribution of the color pixels of the color light-emitting substrate, and the color filter. The substrate is provided with a plurality of color pixels 41, 43, 45, 47, 49, 51 and a plurality of black matrices 31 adjacent thereto. Now, in the case of a color pixel unit 25, the first, second, and third color pixels 41, 43, and 45 are red, blue, and green pixels, respectively, and the shapes of the three are "r" shaped, and The fourth, fifth, and sixth color paintings 201033682 . =, blue, green pixels, and the shape of the three is """, because the area, shape, width and length of each-recording pixel are respectively and The area, the width, the width and the length of one pixel electrode are the same. Therefore, if the color pixel unit 2 is viewed, the ratio of the long side A舆 wide side b is also $ a point light source, 70 mw, and the sister is also 2 Than 1. Under such a design, because the human-vision method detects that the picture displayed by the teacher's board (four) and the shape of the previous technique, the shape of the light source το is not much different from the picture displayed by the rectangle, and there is no picture burr. The problem. For example, the color distribution of the first color I is the first embodiment, and there is a second embodiment, = two, t, second, and third color pixels 41, 43, and 45 are respectively blue and red book sounds. ' i - the fifth and sixth color pixels 47, 49, 51 are blue, ί 2 49 51 points, green, blue, red 4, and the fourth, fifth, sixth: one 77 is green, blue , red pixels. In the fourth embodiment, for example, the third color pixels 41, 43, and 45 in Fig. 13 are red, green, and blue book sounds, respectively, and the fourth and sixth color pixels 47, 49, and 51 are red and green, respectively. , blue 4Λ°Λ^, for example, as shown in Fig. 14, the second, third color pixels 41, ❿ 49 ” f f blue, green, red pixels, and the fourth, fifth, sixth color painting The elements 47, 49, and 51 are blue, green, and red. The sixth embodiment is shown in the 15th circle, first: Ϊί color pixels 41, 43, and 45 are green, red, and blue pixels, respectively. The fourth and eighth color pixels 47, 49, and 51 are green, red, and blue pixels, respectively. Please refer to Fig. 4 and Fig. 16, and the following steps are used to describe each pixel data 22. In the operation of line 24, in the fourth ,, every second adjacent flute 1R Si" is to transmit the first and second data signals of opposite polarity, and the waveform is round like snow level!! Improper first data signal When the voltage is high level output, the second data signal flute- consultancy 1 low level output, but when the voltage of the first data signal is low level output, the data signal of the second data signal is In other words, the first and second data signals are transmitted by the first and second data lines, respectively, and the third f feed line 38 and its right side are respectively transmitted by the first and second data lines. The data line 24, 201033682, which has not yet been mentioned, transmits the signal in the above-mentioned manner. First, each scan line 22 controls the corresponding connected pixel electrode 28 to receive the first data signal or the second data signal, and then each pixel electrode 28 can be displayed according to the first data signal or the second data signal. Grayscale brightness. However, such a signal transmission method can cause the polarity conversion mode of the display panel to be reversed, and since the startup mode of the scanning line 22 is sequentially started from the top, as shown in FIG. 17(a), when When the scan line 30 is activated, the polarity of the pixel electrodes 28 connected to the first scan line 30 from left to right is positive, negative, ..., positive, negative, and positive. When the second scan line 32 is activated, the first scan line 30 is turned off. At this time, as shown in FIG. 17(b), the pixel electrode 28 connected to the second scan line 32 is turned from left to right. The polarity is negative, positive, ..., negative, positive, negative. Therefore, the polarity conversion mode of the liquid crystal display panel of the present invention is dot inversion. As described above, the present invention can reduce the number of data lines used, thereby reducing the manufacturing cost of the source wafer and reducing crosstalk in the display screen. phenomenon. The above is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention, so that the shapes, structures, features, and spirits described in the claims of the present invention are equally varied and modified. All should be included in the scope of the patent application of the present invention. [Simple Description of the Drawings] ® Section 1 is a schematic diagram of an array substrate of a single gate structure of the prior art. 2 is a schematic diagram of an array substrate of a prior art dual gate structure. Fig. 3 is a schematic view showing the arrangement of color pixels of the prior art color filter. Figure 4 is a schematic view of the array substrate of the present invention. Figure 5 is a schematic diagram of the circuit of the array substrate of the present invention. Figure 6 is a schematic view of a pixel unit of the present invention. Figure 7 is a schematic view showing the area of a pixel unit of the present invention. Fig. 8 is a perspective exploded view of the liquid crystal display panel of the present invention. The ninth aspect is the area of the color pixel unit of the present invention. 201033682 FIG. 10 is a schematic circle of the first embodiment of the color distribution of the color pixel unit of the present invention. Figure 11 is a schematic view showing a second embodiment of the color distribution of the color pixel unit of the present invention. Figure 12 is a schematic view showing a third embodiment of the color distribution of the color pixel unit of the present invention. Figure 13 is a schematic view of a fourth embodiment of the color distribution of the color pixel unit of the present invention. Figure 14 is a schematic view showing a fifth embodiment of the color distribution of the color pixel unit of the present invention. Figure 15 is a schematic view showing a sixth embodiment of the color distribution of the color pixel unit of the present invention. Figure 16 is a waveform diagram of the first and second data signals of the present invention. 17(8) to 17(b) are schematic diagrams showing the polarity conversion of the liquid crystal display panel of the present invention. [Main component symbol description] ❹ 1〇〇 first glass substrate 200 first substrate 400 second substrate 12 scan line 16 pixel electrode 18 scan line 20 data line 24 data line 26 pixel unit 30 first scan line 32 second scan line 36 second data line 40 first pixel electrode 42 second halogen electrode 44 third pixel electrode 46 fourth pixel electrode 300 second glass substrate 500 liquid crystal layer 10 halogen electrode 14 data line 17 black matrix 19 color pixel 22 scan line 〇 25 color pixel unit 28 pixel electrode 31 black matrix 34 first data line 38 third data line 41 first color pixel 43 second color pixel 45 third color Pixel 10 201033682 47 fourth color pixel 49 fifth color pixel 51 sixth color pixel 54 pixel capacitor 48 fifth pixel electrode 50 sixth pixel electrode 52 thin film transistor