TW201020747A - Control circuit with frequency modulation for power supply - Google Patents

Abstract

This invention relates to a control circuit with frequency modulation for a power supply, including an adjustable charging circuit, an oscillation signal generating circuit, and a switching circuit. The adjustable charging circuit generates a plurality of charging signals according to a first oscillation signal and transmits the charging signals to the oscillation signal generating circuit; thus the oscillation signal generating circuit generates a second oscillation signal based on the charging signals. The oscillation signal generating circuit modulates the second oscillation signal according to the charging signals to perform frequency modulation. The switching circuit generates a maximum conduction control signal according to the second oscillation signal. The maximum conduction control signal is used for determining a switching period of a switching signal.

Description

201020747 IX. Description of the Invention: [Technical Field] The present invention relates to a power supply, and more particularly to a control circuit for frequency modulation of a power supply. [Previous technology] +, according to the progress of today's technology, and then develop a number of electronic products, in order to respond to the public's participation in the pursuit of these electronic products, the power is becoming more and more powerful, and bring to the present people life A lot of convenience. Most of today's electronic devices require a power supply to provide the power required by the electronic device.凊 Refer to the figure, which is a circuit diagram of a conventional power supply. As shown in the figure, the source supply includes a transformer τ. The transformer T1 has a secondary winding Np and one of the secondary windings Np is connected to an input voltage V丨n '-the secondary side. Winding Np Q1 叙二^Power off Q1 'Battery WQ1 series- Sense; Miscellaneous and Rs, one end of the power switch, the other of the sense resistor Rs - still at the ground, the sense device T1 -1 '(4) Q1 - Switch Current 1P' is generated - current signal Vs. Transformer terminal -1 M - cooked - rectifier - terminal, rectifier D. The other is ^^^;^- _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ Also secret = 输出 the output of the power supply is used to provide the output voltage V. . - Switching signal VG and controlling power m iUlG'w is used to generate the chip _ connected with - resistor (10) ^ and / T1 for switching operation, control cT is connected to the ground and the resistor is connected to the resistor - reference voltage VRI, capacitor Charge it. Control chip test · Vri through the resistor R "for the capacitor CT off SD - _ connected to the capacitor discharge and discharge - discharge current source 1_, discharge open

The - terminal, discharge H original Id T is placed separately ^ 阙 Sd another - _ connected to the discharge power supply IDCH electricity. The above-mentioned diligent reference surface is connected to the grounding terminal for discharging and discharging the capacitor CT, and discharging the current source IDCH to charge and discharge the capacitor CT, that is, generating a shock signal vosc. Referring to the first figure, the control wafer 10 further includes a first comparator 11, a second comparator 12 and a flip-flop, and the flip-flop includes the anti-gates 13 and 14. The first comparator u compares the oscillation signal vosc with a high threshold signal Vh to generate a first comparison signal. The second comparator 12 compares the jitter signal Vosc with a low threshold signal ¥]^ to generate a second comparison signal. The first comparison signal and the second comparison signal are transmitted to the flip-flop to generate the pulse signal PLS. The first input end of the first anti-gate 13 receives the first comparison signal, and the first input end of the second anti-gate 14 receives the second comparison signal. The output end of the second anti-gate I4 is coupled to the first anti- The second input of the gate 13, the first counter

The output of the gate 13 is coupled to the second input of the second anti-gate 14 and generates a pulse signal PLS ' and is used to control the discharge switch %. Referring to the first figure, the negative input terminal of the comparator 15 receives the oscillation signal v〇sc, and the positive input terminal of the comparator 15 receives a reference signal Vr2' and the first input terminal of the free 16 is coupled to the comparator 15. The output terminal, and the second input terminal of (5) 16 receives the pulse wave signal μ through an inverter 17, and the output terminal of the gate 16 generates a maximum conduction control signal 8 and is reduced to the first input terminal of the first and the first, and the maximum conduction is performed. The control signal W is used to control one of the maximum on-times of the switching signal T Qing λ χ 'that is, (4) turn _ Q1, the maximum guide power, the maximum output power of the power supply. A comparator 19 receives a feedback signal VFB and a current signal Vs to compare the feedback signal vFB with the current signal Vs. The output of the comparator 19 and the second input of the terminal 18 are used to cut the signal Vg to The on-time T〇N of the power switch Q1 is determined. The test ΐ v倂: Figure ’ is the waveform diagram of the conventional power supply. As shown in the figure, R2 is a fixed-level signal. When the shock signal signal PLS is low-level skin energy, the signal is "Whu VR2 and the pulse level (9)1 turns on the control signal W. The state of energy, that is, high V, long time, right-swinging signal v〇sc generous ^ number w (four) check state, that is, the fresh bit to take the big paste air to make a sudden 丨 仏 仏 * * * * * 。 。 。 。 。 。 。 。 。 The output of the wave signal PLS 轫 轫 益 益 15 is transmitted through (4) 16 _ secret maximum guide. Comparison degree. When the current signal VSA is in v 2. 唬 Smax pulse width over and gate, = 19 output low level state, through the war The knife is replaced by VG, the mountain power · Ql conduction time 7 201020747 T〇N, and the maximum on time of the switching signal % D (10), should be transmitted through and M 18 is determined by the maximum conduction control signal SMAX. The remote signal v〇sc determines the switching period of the signal %, that is, the maximum conduction time of the switching signal Vg is controlled, and the operation of the control power supply is fresh. Since the oscillating tank vGSG_ is unchanged, the lion frequency of the power supply is fixed drunk, so that it produces a higher t magnetic interference, and the effect of the (four) source supply. In order to reduce the electromagnetic interference of the power supply, the present invention proposes a control circuit for the fresh machine, which can improve the above disadvantages, thereby reducing the electromagnetic interference of the power supply to solve the problem. The above question. ® [ SUMMARY OF THE INVENTION] The main object of the present invention is to provide a control circuit for viewing a power supply, which generates a plurality of charging signals by an adjustable charging circuit to modulate the vibration signal and thereby modulate Used to control the switching of the source supply, the electromagnetic interference of the power supply is low. The invention relates to a frequency modulation control circuit for a power supply, which comprises an adjustable charging circuit, an oscillating signal generating circuit and a switching circuit. The adjustable charging circuit generates a plurality of charging ports according to a first-new signal, and the oscillation generating circuit generates a first oscillation Sfl according to the charging signals, and the oscillation signal generating circuit is modulated according to the charging signals. The second oscillating signal, the switching circuit generates a maximum conduction control signal according to the second oscillating signal, and the maximum conduction control signal is used to determine a switching period of the switching signal. The present invention modulates the second oscillating signal by using the charging signals. In this way, the frequency of the switching signal can be modulated, and the electromagnetic interference of the power supply can be reduced. [Embodiment] In order to give the reviewer a better understanding and understanding of the technical features of the present invention and the efficacies achieved, the following is a description of the preferred embodiment and the detailed description, as follows: 8 201020747 See also The third figure is a circuit diagram of a preferred embodiment of the invention applied to a power supply. As shown, the power supply includes a transformer τ transformer τι from the secondary side to the secondary side to provide an adjusted - output voltage v. . The transformer τι__sub-side and the second-two= side respectively have a primary side winding called a secondary side winding & the primary side winding is called the two-end consumption-input voltage VlN, and the secondary side winding is called another- End touch _ power _ qi, power switch

The Qi series-sensing element 'sense element is a sense resistor in this embodiment, the end of the power switch Φ-end sense resistor Rs, the other end of the sense resistor & , the sense resistor & is used to sense the power switch Q1 - switching current Ip, and generate - current signal ... =, switch Φ is used to switch the transformer , to control the power supply, A preferred embodiment can be a transistor. One end of the secondary winding Ns of the transformer T1 is switched-rectifier D. - end, rectification (four). The other end and the other end of the secondary winding Ns are t C° 'output capacitance C. Miscellaneously connected to the output of the power supply, the power supply output is used to provide the output voltage. Referring to the third figure, the control unit of the present invention generates a switching signal VG and controls 3 20 :!! The ship T1 performs a switching operation. The control circuit of the present invention comprises a control electric resistance R _ 电阻 resistance & and - capacitance CT 'resistance Rt and capacitance ° in series, = Rt_ - reference La Vri, capacitor (10) connected to the ground, reference plane %, with : Electricity & charging. The control chip 2 includes a discharge switch 31, the - terminal is coupled to the power, and the other end of the 3^off 31 is lightly connected to the ground terminal for use in the production of the capacitor Ct. The five figures are shown. This clearing signal is generally used to control the internal circuit of the wafer 20, which is -; this is no longer _. In the above, the resistor Rt, the capacitor Cl' and the discharge switch 31 are discharged, the second voltage is generated according to the reference voltage, and the discharge switch 31 is charged to the capacitor & the shocked money VQSG1 'the shock ship number VGsa is -igt . Charging iiH, the control chip 2 of the present invention further comprises a sampling circuit 3, - the adjustable sampling gate is closed 34 and the signal generating circuit 5 is. The sampling circuit 30 includes a buffer 32, -, · 34 and a _ holding capacitor 36' to sample the first - oscillating signal V coffee 9 201020747 signal ^ ip ° _ 32 the positive input wheel capacitor & to receive the -, The output of the buffer 32 is connected to the negative input of the buffer 32, and the sampling ... mountain 0SC1 to the buffer & 羡 switch 34 one end consumes the usual & ^ ^ chip 2 〇 internal circuit generated, it is commonly used The technology is not described in detail here. Buffer 32 is used to buffer the first

For sampling switch 34 and taking 槐 π spine v push only μ / ^ δί1 # υ V 〇 SCI SMP. Sampling subtraction, sampling, and holding capacitor 36 to generate a hold signal β

A — , the hold signal is transmitted to the conversion circuit to convert the short message number SMP = the second test power > 4 'the conversion circuit is a voltage current conversion circuit in this embodiment. Switching power, the positive comparator of the two-comparator 60 and the resistor 62' comparator 6 receives the hold signal, and the negative input end of the comparator 6 is connected to the wheel of the comparator 60, and the surface of the resistor 62 is compared. Between the output of the device 60 and the ground. ° Referring to the third figure, the adjustable charging power (4) includes a complex current mirror, a plurality of ι.·.χη" clock generators 3GG, the current mirrors comprising a plurality of transistors % Wn, the transistors w丨...wn The source is coupled to a voltage source Vdd, and the gates of the transistors π·; and the transistor W1U poles are connected to the 'transistor W, and the drains receive the reference button Ir for the currents f to be generated. Multiple charging f峨ia...Ien 'The charging signal Igi.·'s small charging power, ., crystal W3...Wn is not connected to the switch Χι_.·Χη. Clock generator 3 (8) For generating complex clock control, Μη, to control the turn-on and turn-off of the ι···Χη, that is, the current mirrors generate the charging signals Ic2 according to the clock control signals Μι · Μη The first signal is generated according to the charging signals, and the first oscillation signal V〇scy includes an oscillation capacitor Cosc, a discharge switch sD, and a discharge current source IDCH. a first comparator 52, a second comparator 54 and a flip-flop, the flip-flop includes a first anti-gate 56 and a The second anti-gate 58. The oscillating capacitor Cosc is coupled between the adjustable charging circuit 40 and the ground, and the charging signals Ic].. Icn charges the oscillating capacitor c 〇sc. 10 201020747 Discharge switch SD is coupled to Between the oscillating capacitor Cosc and the discharge current source IDCH, the discharge current source Idch is coupled to the ground terminal for generating a discharge current for discharging the oscillating capacitor c0SC. The present invention uses the charging signals Ια...Icn and the discharge current source. The IDCH charges and discharges the oscillating capacitor c0sc to generate a first shock afl number V 〇 sc2, and the first oscillating signal V 〇 sC2 is a spur wave signal. Since the charging signals Ια...Icn are controlled by the clock control The signal Μ〗..·Μη, so that the charge amount for charging the shock capacitor Cosc can be modulated. Thus, the second oscillation signal v〇sc2 can be modulated. According to the above, the positive input terminal of the first comparator 52 receives a high threshold signal vH, the negative input of the first comparator 52 receives the second oscillating signal v 〇 sc2, and the first comparator 52 compares the second oscillating

The signal VOSC2 and the high threshold signal VH generate a first comparison signal at the output. The second comparator 54 is connected to the human body and the singularity of the human body, and the second oscillating signal v 〇 SC2 and the low threshold signal are compared, and a second is generated at the output. Second comparison signal. The first comparison signal and the second comparison signal are transmitted to the flip-flop to generate a pulse signal PLS. The output of the first comparator 52 touches the first-inverted and the open-opening-input terminal, that is, the first-input terminal of the first-reverse gate 56 receives the first comparison signal, and the output of the second comparator is engaged. Connected to the second input terminal of the second anti-gate-58 to transmit the second comparison signal to the second input terminal of the second anti-gate %, the output of the second anti-gate 58 is reduced to the first-reverse gate The second input terminal of %, the output terminal of the first-reverse gate 56 is responsive to the second input terminal of the second repulsion, and generates a pulse wave sfl number PLS' and is used to control the discharge switch Sd. Referring to the first figure, the control chip further includes a switching circuit for controlling switching according to the second amplitude to control the power switch Q1, i.e., controlling the output of the power supply. There are - comparator 70, an inverter 72 and ask 74, 76, the comparator 7 负 negative 峨 V (10), _ 7Q of the positive input _ one of the standard position "two comparison reference signal Vr2 and the first: The cover signal ν_ is used to generate the output of the cut-off inverter 72 (four) and ^ = mPLS, _ the output end is connected to the output of the terminal * - and the brother of the gate 74 - the input and the second input The output of the end, and the 74 is known to produce a large guideline S_. 201020747. In accordance with the above, the Lai 76 U terminal receives the maximum pilot system 峨 sMAX, and the maximum conduction control signal sMAX is used to control the voltage reduction Vg - the maximum conduction _ 7. 辕, that is, controlling the maximum on-time of the power switch Q1 to control the maximum output power of the power supply. The switching circuit of the present invention is based on the second seismic number U. Circuit 5G will adjust the second news signal ~2 according to the charging message #bIa".Ien, so the switch 遽 VG ^ city job will also change the lake, so that _ power supply for the frequency of the charm, so you can lower The power supply weaves the electric power of H, and calls the performance of the high power supply. The present invention further includes a power supply for further protection. - Protection circuit, potted with φ :: comparator 8G, positive (10) positive input terminal receiving - shouting signal VFB, continuation 80; negative input receiving current signal Vs 'comparator 8 〇 comparison feedback signal I and the current signal %, to generate a -protection signal at the output, and to the second input of the gate 76 for periodically turning off the switching signal VG to determine the conduction time τ(10) of the power switch Q1. The time TON is determined by the comparator 80, and the maximum on-time τ 〇 of the switching signal Vg is transmitted by the maximum illuminating age, and the mosquitoes are known. The above-mentioned 峨 signal, borrowable, optical consumable or - feedback The circuit is woven at the output end of the power supply to detect the output voltage v〇 of the power supply. Therefore, the feedback signal Vfb is related to the output voltage %. Please refer to the fourth figure, which is a preferred embodiment of the present invention. For example, the clock generator 300 includes an input clock generation circuit and a linear shift register 330. The input clock generation circuit 3 generates an input clock. Signal ck, input clock generation circuit is completely included - The electric current source IcB is absent from the supply voltage Vcc. A capacitor G is lightly connected between the charging terminal IeB and the ground, and the charging current source 1 (3) is used to charge the capacitor & a discharge switch SDB is connected in parallel to the capacitor Cb, For discharging the capacitor q, the discharge switch is controlled by the input pulse signal oc... the input end of the hysteresis inverter 311 is the capacitance a, and the input of the inverter 312 is reversed according to the hysteresis At the output of the device 311, the inverter generates an input clock signal CK. Μ Refer to the fourth figure, 'the linear shift register 330 is used to generate the 12 201020747 clock control signals according to the input clock signal CKΜ |.·.Μη. The linear shift register 33A includes a plurality of flip-flops 33i, 332. 』5 and - mutually exclusive or gate 339, the flip-flops 33i, mu are connected in series with each other, and the counters 33 332...335 The pulse input terminal CK receives the input clock signal CK, and the output terminals Q of the flip-flops 331 332...335 are connected to the input terminal ,, and the output terminals Q of the flip-flops 332...335 are generated. The clock control signals are grounded and transmitted to the input end of the mutex or gate 339, and the output end of the (5) 339 is connected to the input terminal D of the flip-flop device %, and the positive resistors 331, The reset terminal R of the 332 335 receives a reset signal RST for resetting the flip-flops 331 332...335 '. The reset signal RST is generated in a manner that is very large. Another embodiment may be the control chip 20 It is produced by the internals, which is the technology of the general phase and will not be described in detail here. . Referring to the fifth figure, it is the waveform of the first shock signal, the clear 峨, the sampling squeak, the scale 峨 and the reference current of the frequency modulation control circuit of the present invention. If the resistance value and the capacitance value of the resistor & and the capacitor Ct (see the third figure) are used to ride, the first seismic signal ν_ of the mine tooth waveform with the same slope value can be obtained, and the sampling circuit is transmitted through the sampling circuit. % (refer to the third figure) of the sampling and scale, can be made of different size of the hold signal SMp and the reference current IR ° In other words, the larger slope of the first waveform of the oscillating signal v_ can be sampled to a larger, holding Shouting SMP 'step-by step to get a larger reference current Ir, the larger reference current ^ through the current map of the current mirror of the second figure, and according to the clock control signal 10 Ml.' The larger charging signals Icl...ICn generate the charging capacitor C〇sc, so that it can be called = smaller_changing period and higher __ rate H smaller slope riding tooth waveform The swash signal v〇sci can be sampled to the smaller hold signal SMp to further obtain a smaller: ^ current IR 'this smaller reference current Ir through the current map of the current mirror, and according to the -day control minus |·..Μη produces smaller of these charging signals Ια...Ι&ι to shock capacitance C sc charging, it is possible to obtain a large switching cycle with a lower switching frequency. In summary, the present invention is applied to a frequency modulation control circuit for a power supply, comprising: an adjustable charging circuit, a neon generating circuit and a switching circuit, wherein the woven charging circuit generates a plurality of charging signals according to the first seismic signal. The shock signal generating circuit generates a second seismic signal according to the charging signals and adjusts the second shaking signal according to the charging signals, and the switching circuit 13 201020747 generates the maximum conduction signal, because the second The shock city can be modulated by the switching cycle of the maximum conduction control signal, and the modulation power supply is beneficial, and the electromagnetic interference of the low-voltage electrical detector. Therefore, the present invention is practically novel, progressive, and;:;:~f隹, as described above, only the present invention is a 敕 眚 眚 眚 丨 φ φ 实 实 实 实 实 实 实 实 实 实 实 实 实 实 实 实 实:=== God is doing her fine, tender material to restore and fine [schematic description] The first picture is the circuit diagram of the conventional power supply; the second picture is the waveform of the conventional power supply; The second embodiment of the present invention includes a circuit diagram with a frequency modulator; the fourth diagram is a circuit diagram of a clock generator of the preferred embodiment of the present invention; and a fifth diagram The waveform of the oscillation signal, the clear signal, the sampling signal, the hold signal and the reference current of the frequency modulation control circuit of the present invention. [Main component symbol description] 10 Control chip 17 Inverter 11 First comparator 18 and gate 12 Second comparator 19 Comparator 13 First reverse gate 20 Control wafer 14 Second reverse gate 30 Sampling circuit 15 Comparator 31 discharge switch 16 and brake 32 buffer 14 201020747

34 sampling switch C〇sc oscillating capacitor 36 holding capacitor CT capacitor 40 adjustable charging circuit D 〇 rectifier 50 oscillating signal generating circuit Ici charging signal 52 first comparator I 〇 2 charging signal 54 second comparator I 〇 3 charging signal 56 First reverse gate Ic4 charge signal 58 second reverse gate Icn charge signal 60 comparator I 〇 B charge current source 62 resistor Idch discharge current source 70 comparator Ip switching current 72 inverter Ir reference current 74 and gate M, Clock Control Signal 76 and Gate Mn Clock Control Signal 80 Comparator NP Primary Side Winding 300 Clock Generator Ns Secondary Side Winding 310 Input Clock Generation Circuit PLS Pulse Signal 311 Hysteresis Inverter Qi Power Switch 312 Phaser Rs sense resistor 330 linear shift register Rf resistor 331 flip-flop SMP hold signal 332 flip-flop CLR clear signal 335 flip-flop Vsp sample signal 339 mutex or gate Sd discharge switch CK input clock signal Sdb Discharge switch CB Capacitance Smax Maximum conduction control signal Co Output capacitance T1 Transformer 15 201020747

VCc supply voltage Vdd voltage source Vfb feedback signal V〇 switching signal VH south critical signal ViN input voltage Vl low critical signal V〇 output voltage V〇sc oscillating signal V〇sci first oscillating signal V〇sC2 second oscillating signal VRI reference Voltage VR2 Reference signal Vs Current signal Xi Switch X2 Switch X3 Switch Xn Switch W, transistor w2 transistor w3 transistor w4 transistor w5 transistor Wn transistor

Claims (1)

201020747 X. Patent application scope: 1. A control circuit with frequency modulation for a power supply, comprising: a sampling circuit for sampling a first oscillation signal to generate a hold signal; an adjustable charging circuit, The holding signal generates a plurality of charging signals; a oscillating signal generating circuit generates a second oscillating signal according to the charging signals, the oscillating signal generating circuit modulates the second oscillating signal according to the charging signals; and a switching circuit, The second oscillating signal generates a maximum conduction control signal, and the maximum conduction control λ number is used to determine a switching period of a switching signal, and controls the maximum output power of the power supply; The second news signal is a slit wave signal. 2_如巾, please specialize in the frequency control circuit of the lion supply described in the first item, the control circuit of the frequency modulation is further included, the conversion circuit converts the hold signal to a reference current, and provides the reference power /, IL to the S charge circuit to generate the charging signals. 3. For a control circuit with a freshly modulated power supply as described in item 2 of the general application, the conversion circuit is a voltage-current conversion circuit. 4. The control circuit for fresh-tuning of the power supply device as described in the scope of the application of the patent application further includes a charge-discharge circuit that generates the first signal according to a reference voltage. ❹ 5. The application circuit of the power supply wire with the fresh machine described in the above-mentioned item, wherein the sampling circuit comprises: a holding capacitor to generate the holding signal; and - the sampling switch 'reducing the holding capacitance wire sample The fresh-seismic green number generates the maintenance signal with accompanying capacity. ‘, Fu Teng Shen. The frequency modulation control circuit for the power supply || described in Item 5 of the monthly patent device, wherein the sampling circuit further comprises a buffer 3, which buffers the first first shock signal, and the sample switch 'the sampling Close the sampling of the _ Zhina - shock disk signal. 7. The control circuit of the present invention for use in a power supply as described in the application of the present invention, wherein the adjustable charging circuit comprises: a clock generator for generating a plurality of clock control signals; The plurality of current mirrors generate the charging signals according to the clock control signals. 8. Ο 10. π. The frequency modulation control circuit for a power supply device according to claim 7, wherein the clock generator comprises: an input clock generation circuit that generates a Inputting a clock signal; and a linear shift register to generate the clock control signals according to the input clock signal. A control circuit for frequency modulation of a power supply device as described in claim 1 wherein the charging signals are charging currents of different sizes. The control circuit for frequency modulation of a power supply device as described in claim 1 wherein the oscillation signal generating circuit comprises: - an oscillating capacitor responsive to the charging signals, generating the second oscillating signal; Discharging a current source, generating a discharge current to discharge the oscillating capacitor; - discharging the switch 'coupled between the oscillating capacitor and the discharge current source; - the first comparator 'receiving a high threshold signal and the second oscillating The signal generates a first comparison signal; the second comparator receives a low threshold signal and the second oscillation signal to generate a second comparison signal; and - the flip flop receives the first comparison signal and the second The comparison signal generates a pulse signal to control the discharge switch. The control circuit for frequency modulation of a power supply device according to claim 1, wherein the switching circuit includes a comparator that compares a reference signal and the second seismic value to generate the Maximum conduction control signal. The control circuit for frequency modulation of the power supply device according to claim 1 further includes a protection circuit that generates a protection signal according to a feedback signal and a sensing signal to cut off the switching. The signal, wherein the feedback signal is related to the output of one of the power supplies 18 12. 201020747. 13. A control circuit for frequency modulation of a power supply, comprising: - an adjustable charging circuit 'generating a plurality of charging signals according to a first oscillation signal; a seismic signal generating circuit, according to the charging signals Generating a second oscillating signal, the oscillating signal generating circuit modulating the second oscillating signal according to the charging signals; and a switching circuit responsive to the second oscillating signal to generate a maximum conduction control signal, the maximum conduction control The number is used to determine a switching period of a switching signal, and the maximum output power of the power supply is controlled; wherein the first first oscillation signal and the second oscillation signal are sawtooth signals. 14. The control circuit for frequency modulation of a power supply device according to claim 13 further comprising a charge and discharge circuit that generates the first oscillating signal according to a reference voltage. 15. The control circuit for frequency modulation of a power supply device according to claim 13, wherein the adjustable charging circuit comprises: a clock generator generating a complex clock control signal; and a complex current mirror And generating the charging signals according to the clock control signals. 16. The frequency tuning circuit for a power supply device according to claim 15, wherein the clock generator comprises: an electrical-input clock generating circuit that generates an input clock signal; - Linear shifting saves n, according to the lion's input clock minus, producing some clock control signals. Π The method as claimed in claim 13 is characterized in that the charging power supply has a demodulation circuit, wherein the charging signals are charging currents of different sizes. The power transmission circuit for the power supply device, as described in claim 13 of the patent application scope, wherein the oscillation signal generation circuit comprises: an industrial power-earthquake capacitance, which is generated according to the charging positions The second seismic signal; - a discharge current source, generating a - discharge current to discharge the shock capacitance; 19 201020747 a discharge switch, being coupled between the oscillation capacitor and the discharge current source; a first comparator Receiving a high threshold signal and the second oscillating signal to generate a first comparison signal; a second comparator receiving a low threshold signal and the second oscillating signal to generate a second comparison signal; and a flip flop Receiving the first comparison signal and the second comparison signal to generate a pulse signal to control the discharge switch. 19. The control circuit for frequency modulation of a power supply as described in claim 13 wherein the switching circuit includes a comparator that compares a reference signal and the second oscillation signal to The maximum conduction control signal is generated. 20. The control circuit for frequency modulation of a power supply device as described in claim 13 further includes a protection circuit that generates a protection signal according to a feedback signal and a sensing signal. The switching signal is stopped, wherein the feedback signal is related to an output voltage of one of the power supplies. 20