200949811 九、發明說明： 4 【發明所屬之技術領域】 本發明係關於一種垂直配向型液晶顯示裝置及其驅動 方法。 【先前技術】 ' 液晶顯示裝置中之液晶本身不具發光特性，其係採用電 場控制液晶分子扭轉而實現光之通過或不通過，從而達到顯 示之目的。傳統液晶顯示裝置之液晶驅動方式為扭轉向列模 ❹式，然而其視角範圍比較窄，即，從不同角度觀測晝面時， 將觀察到不同之顯示效果。為解決扭轉向列模式液晶顯示裝 置視角較窄之問題，業界提出一種四域垂直配向型 (Multi-domain Vertical Alignment，MVA)液晶顯示裝置，藉由 間隔設置複數“<”形突起及溝槽於二基板表面，將每個晝 素單元分割成四區域，各區域内之液晶分子沿不同方向取 向，來擴大該晝素單元之整體視角，進而改善液晶顯示裝置 之視角特性。 G 惟，由於液晶分子長軸與短軸之光折射率不同，從不同 角度觀測四域垂直配向型液晶顯示裝置時將產生色偏現 象，導致該液晶顯示裝置之顯示品質較差。 【發明内容】 有鑑於此，提供一種顯示品質較好之液晶顯示裝置實為 必要。 有鑑於此，提供一種顯示品質較好之液晶顯示裝置驅動 方法亦為必要。 6 200949811 ^ —種垂直配向型液晶顯示t置包括—顯示面板。該顯示 .面板包括複數畫素單元。每一畫素單元包括一液晶電容。該 液晶電容在-㈣間内先後保存不同之—第-灰階電壓及 一第二灰階電壓。 • 一種用於驅動一垂直配向型液晶顯示裝置之驅動方 法m配向型液晶顯示裝置包括—包括複數畫素單元之 顯二面板，該畫素單元包括—液晶電容，該垂直配向型液晶 顯示裝置驅動方法其包括以下步驟：於一幀時間之前一段時 間内，提供一第一灰階電壓至該液晶電容；於一幢時間之後 一段時間内，提供-第二灰階電壓至該液晶電容。 相較於先前技術，本發明垂直配向型液晶顯示裝置及其 驅動方法·％ 4素單元之液晶電容於一幢時内先後保存二 不同之灰階電壓，並配合垂直配向型液晶顯示裝置二基板表 面之突起或構槽使該晝素單元在時間上實現八域顯示，因而 改善該先前技術之垂直配向型液晶顯示裝置之色偏現象，使 ❹液晶顯示裝置之顯示品質較好。 【實施方式】 明參閱圖1，係本發明垂直配向型液晶顯示裝置第一實 施方式之電路示意圖。該垂直配向型液晶顯示裝置1包括一 顯示面板11、一資料驅動電路12及一掃描驅動電路13。 該顯不面板11包括複數相互平行間隔設置之資料線111 及與該複數資料線垂直絕緣相交之複數間隔設置之掃描 線I12。δ亥複數資料線ill與該資料驅動電路12電連接，該 複數掃描線112與該掃描驅動電路13電連接。該複數資料 7 200949811 線ill與該複數掃描線n2界定複數晝素單元113。 請參閱圖2,係該垂直配向型液晶顯示裝置^ 元113之電路放大示意圖。其中第Μ及第i行資料線'm 與第=及第J列掃描'線112所界定之晝素單元ιΐ3係 ..畫素單元。該i及j代表任—自_，因而該第^晝素單元 113代表該垂直配向型液晶顯示裝置i任一晝素單元η]。 該第ij畫素單元113包括一第一薄膜電晶體ιΐ4、一音 素電極152、-與該畫素電極152對應設置之公共電極141 及-第二薄膜電晶體115。該公共電極142電連接一公丘電 壓輸入端°該第-薄膜電晶體114之祕電連接於該^電 極152’其源極電連接於該第…亍資料線m，其間極電連 接於該第Η列掃描線112。該第二薄膜電晶體ιΐ5之沒極 電連接於該晝素電極152，其源極電連接於一公共電壓輸入 端，其閘極電連接於該第j列掃描線112。該畫素電極152 與該公共電極142形成一液晶電容116,用於保存灰階電壓。 ❹ 該第二薄膜電晶體115之伏安特性不同於該第一薄膜電 晶體114。具體而言，該第二薄膜電晶體115之等效導通電 阻高於該第一薄臈電晶體114。因此，在對該第二薄膜電晶 體115及第一薄臈電晶體η*之閘極施加相同之開啟電壓， 且對該第二薄膜電晶體115及第一薄膜電晶體114之源極及 汲極之間施加相同電壓之情況下，流經該第二薄膜電晶體 115之電流較該第一薄膜電晶體114小。 再請一併參閱圖3及圖4，其中圖3係該顯示面板Π 之一畫素單元113之侧面結構示意圖，圖4係該顯示面板n 8 200949811 之一晝素單元113之平面結構示意圖。該顯示面板11還包 禮 括一第一基板14、一第二基板15及一夾於該第一、第二基 板14、15之間之液晶層16。該公共電極142設置於該第一 基板14鄰近該液晶層16之表面。複數“<”形突起143設 置於該公共電極142鄰近該液晶層16之一側。該晝素電極 152設置於該第二基板15鄰近該液晶層16之表面。複數 “<”形溝槽153形成於該晝素電極152中。該複數“<” 形溝槽153與該複數“〈”形突起143間隔設置。 ❹ 該垂直配向型液晶顯示裝置之工作原理如下： 請參閱圖5，係該垂直配向型液晶顯示裝置1之掃描訊 號波型圖。該掃描驅動電路13採用隔一列掃描之方式對該 顯示面板11進行掃描。具體而言，該垂直配向型液晶顯示 裝置1之一幀時間T被分為連續且相等之二部份ΤΙ、T2。 在T1時間内，該掃描驅動電路13對該顯示面板11之所有 奇數列掃描線112依序輸出一高電平脈衝；在T2時間内， 該掃描驅動電路13依序對該偶數列掃描線112輸出一高電 ◎ 平脈衝。則對於第ij晝素單元113，在一幀時間T中對該第 j-Ι列掃描線112輸出一高電平脈衝脈衝至對該第j列掃描線 112輸出一高電平脈衝脈衝之時間間隔係半幀時間T/2。 請參閱圖6,係該第ij晝素單元113之部份驅動波形圖。 該第ij晝素單元113於一幀時間T中，該掃描驅動電路13 先向該第j掃描線112輸出一高電平脈衝使該第一薄膜電晶 體114導通，此時，該資料驅動電路12輸出一第一灰階電 壓，該第一灰階電壓藉由該資料線111及該第一薄膜電晶體 9 200949811 114為該液晶電容116充電。在該第一薄膜電晶體114關閉 後該液晶電容116保存該第一灰階電壓。藉由該間隔設置之 “<”形溝槽153及該“ <”形突起143,該第一灰階電壓 使該第ij畫素單元113之液晶分子沿四不同方向取向，而實 現四域顯示。於半幀時間T/2後，該掃描驅動電路13向該 第j + Ι掃描線112輸出一高電平脈衝使該第二薄膜電晶體 115導通。此時，該液晶電容116藉由該第二薄膜電晶體115 放電。由於該第二薄膜電晶體115之伏安特性不同於該第一 ❹薄膜電晶體114，在該高電平脈衝驅動下，該液晶電容116 所保存之第一灰階電壓不會完全被釋放。因而該第二薄膜電 晶體115關閉後，該液晶電容116將保存一電壓絕對值較第 一灰階電壓小之第二灰階電壓。藉由該間隔設置之“ < ”形 溝槽153及該“〈”形突起143，該第二灰階電壓使該第ij 晝素單元113實現一不同於T1時間之四域顯示。 相較於先前技術，本發明之垂直配向型液晶顯示裝置1 办之每一晝素單元113，在前半幀時間T1，該液晶電容116保 存一第一灰階電壓，並藉由晝素單元113中間隔設置之複數 “〈”形突起143及溝槽153實現該垂直配向型液晶顯示裝 置之四域顯示；在後半幀時間T2，該液晶電容116保存一 第二灰階電壓，並同樣藉由晝素單元113中間隔設置之複數 “〈”形突起143及溝槽153實現該垂直配向型液晶顯示裝 置不同於前半幀時間T1之四域顯示，從而該畫素單元113 在一幀時間T内實現八域顯示，因而改善該垂直配向型液晶 顯示裝置1之色偏現象，提高該垂直配向型液晶顯示裝置1 200949811 之顯不品質。 請參閱圖7，係本發明垂直配向型液晶顯示裝置第二實 施方式之電路示意圖。該第二實施方式垂直配向型液晶顯示 裝置2與該第一實施方式垂直配向型液晶顯示裝置1基本相 同，其區別在於：該垂直配向型液晶顯示裝置2進一步包括 一輔助掃描驅動電路24，其顯示面板21進一步包括複數輔 助掃描線217，且第一薄膜電晶體214之伏安特性與第二薄 膜電晶體215相同。該複數輔助掃描線217與該輔助掃描驅 ❹動電路24電連接。該晝素單元213之第二薄膜電晶體215 之閘極與該輔助掃描線217電連接。 請一併參閱圖8，係該第ij晝素單元113之部份驅動波 形圖。該垂直配向型液晶顯示裝置2之工作原理如下：在一 幀時間T内，掃描驅動電路21向該第j行掃描線212輸出 一高電平脈衝使該第一薄膜電晶體214導通，該液晶電容 216保存一第一灰階電壓。該輔助掃描驅動電路24對該輔助 掃描線217之掃描時序較該掃描驅動電路23延遲半幀時間 T/2，且該輔助掃描驅動電路24輸出之高電平脈衝之電壓幅 值較該掃描驅動電路23小。在半幀時間T/2後，該輔助掃 描驅動電路24向該輔助掃描線217輸出一高電平脈衝使該 第二薄膜電晶體215導通，該液晶電容216藉由該第二薄膜 電晶體215放電，由於驅動該第二薄膜電晶體215之高電平 脈衝之電壓幅值較該驅動該第一薄膜電晶體214之高電平脈 衝小，從而使該液晶電容216在後半幀時間T/2保存一電壓 絕對值較該第一灰階電壓小之第二灰階電壓。 11 200949811 相較於第-實施方式之垂直配向型液晶顯示裝置丄，該 第二實施方式之垂直配向魏晶顯示裝置2可採用隔列掃描 之驅動方式，亦可採用逐列掃描之驅動方式。該第二薄膜電 晶體215之伏安特性斑該第一薄腺雷θ Μι 竹r王，、忒乐辟勝冤曰日體相同，因而簡化該 垂直配向型液晶顯示裝置2之設置及製程。 本發明垂直配向型液晶顯示裝置亦可具其他多種變更 设计’如·該垂直配向型液晶顯示裝署 I丄、2可係任一 ❹ ❹ PVA(Patterned Vertically ^ ^ ^ ^ ^ ^ 裝置；該垂直配向型液晶顯示裝置η ^ 且丄、2亦可係任一 MVA(Multi-domain Vertical Alignment^ -V' M果武垂直配向型液晶 顯示裝置；該第一實施方式之垂直配向细 玉夜晶顯示裝晋Ί亦 可隔二列掃描之驅動動方式或隔多列掃插 )] 實施方式中，該輔助掃描驅動電路24辦該輔方式’第二 之掃描時序亦可較該掃描驅動電路23钲〜 掃描線217 驅動電路24對該輔助掃描線217之掃插時序輔助掃描 電路23延遲之時間亦可介於1/4幀至3/4巾貞該掃插驅動 綜上所述，本發明確已符合發明專利之要^之間。 出專利申請。惟，以上所述者僅為本發明之較佳實爰依法提 本發明之範圍並不以上述實施方式為限，舉凡熟乘施方式’ 之人士援依本發明之精神所作之等效修飾或變案技藝 於以下申請專利範圍内。 應涵息 【圖式簡單說明】 圖1係本發明垂直配向型液晶顯示梦署笛 农夏弟一實施 之電路示意圖。 乃式 12 200949811 * 圖2係垂直配向型液晶顯示裝置之晝素單元之電路放 % 大示意圖。 圖3係顯示面板一晝素單元之侧面結構示意圖。 圖4係顯示面板一晝素單元之平面結構示意圖。 圖5係垂直配向型液晶顯示裝置之掃描訊號波型圖。 圖6係第ij晝素單元之部份驅動波形圖。 圖7係本發明垂直配向型液晶顯示裝置第二實施方式 之電路示意圖。 ❹ 圖8係第ij晝素單元之部份驅動波形圖。 【主要元件符號說明】 顯示面板 11、21 資料線 111 資料驅動電路 12 ' 22 晝素單元 113 > 213 輔助掃描驅動電路 24 公共電極 142 畫素電極 152 溝槽 153 輔助掃描線 217 第一基底 141 第一基板 14 第二基底 151 第二基板 15 突起 143 液晶層 16 垂直配向型液晶顯示裝置 1、2 掃描線 112 、 212 掃描驅動電路 13、23 第一薄膜電晶體 114 、 214 第二薄膜電晶體 115 、 215 液晶電容 116 、 216 13200949811 IX. INSTRUCTIONS: 4 TECHNICAL FIELD The present invention relates to a vertical alignment type liquid crystal display device and a driving method thereof. [Prior Art] The liquid crystal in the liquid crystal display device itself has no illuminating property, and the electric field is used to control the twist of the liquid crystal molecules to achieve the passage or non-pass of light, thereby achieving the purpose of display. The liquid crystal driving method of the conventional liquid crystal display device is a twisted nematic mode, but the viewing angle range thereof is relatively narrow, that is, when the kneading surface is observed from different angles, different display effects are observed. In order to solve the problem of narrow viewing angle of the twisted nematic mode liquid crystal display device, a multi-domain vertical alignment (MVA) liquid crystal display device has been proposed in the industry, and a plurality of "<" shaped protrusions and trenches are arranged by spacing. On the surface of the two substrates, each of the halogen units is divided into four regions, and liquid crystal molecules in each region are oriented in different directions to expand the overall viewing angle of the pixel unit, thereby improving the viewing angle characteristics of the liquid crystal display device. G. However, since the refractive indices of the long axis and the short axis of the liquid crystal molecules are different, when the four-domain vertical alignment type liquid crystal display device is observed from different angles, a color shift phenomenon occurs, resulting in poor display quality of the liquid crystal display device. SUMMARY OF THE INVENTION In view of the above, it is necessary to provide a liquid crystal display device having a good display quality. In view of the above, it is also necessary to provide a driving method of a liquid crystal display device having a good display quality. 6 200949811 ^ - Vertical alignment type liquid crystal display t-set includes - display panel. The display panel includes a plurality of pixel units. Each pixel unit includes a liquid crystal capacitor. The liquid crystal capacitor stores different - first gray scale voltage and second gray scale voltage in - (four). A driving method for driving a vertical alignment type liquid crystal display device, wherein the alignment type liquid crystal display device comprises: a display panel including a plurality of pixel units, the pixel unit comprising: a liquid crystal capacitor, the vertical alignment type liquid crystal display device driving The method includes the steps of: providing a first gray scale voltage to the liquid crystal capacitor for a period of time before a frame time; providing a second gray scale voltage to the liquid crystal capacitor for a period of time after a frame time. Compared with the prior art, the vertical alignment type liquid crystal display device of the present invention and the driving method thereof and the liquid crystal capacitor of the memory unit store two different gray scale voltages in one building, and cooperate with the vertical alignment type liquid crystal display device two substrates. The protrusion or the groove of the surface enables the pixel unit to realize the eight-domain display in time, thereby improving the color shift phenomenon of the vertical alignment type liquid crystal display device of the prior art, and the display quality of the liquid crystal display device is better. [Embodiment] FIG. 1 is a circuit diagram showing a first embodiment of a vertical alignment type liquid crystal display device of the present invention. The vertical alignment type liquid crystal display device 1 includes a display panel 11, a data driving circuit 12, and a scan driving circuit 13. The display panel 11 includes a plurality of data lines 111 arranged in parallel with each other and a scanning line I12 disposed at a plurality of intervals intersecting the vertical insulation of the plurality of data lines. The delta complex data line ill is electrically connected to the data driving circuit 12, and the complex scanning line 112 is electrically connected to the scan driving circuit 13. The complex data 7 200949811 line ill and the complex scan line n2 define a plurality of pixel units 113. Referring to Fig. 2, there is shown a schematic enlarged view of the circuit of the vertical alignment type liquid crystal display device 113. Wherein the data line 'm of the third and the i-th rows and the pixel unit ιΐ3 defined by the scan line 112 of the first and the third columns are the pixel elements. The i and j represent any -, and thus the first unit 113 represents any of the pixel units η] of the vertical alignment type liquid crystal display device i. The ij pixel unit 113 includes a first thin film transistor ι 4, a pixel electrode 152, a common electrode 141 corresponding to the pixel electrode 152, and a second thin film transistor 115. The common electrode 142 is electrically connected to a common ridge voltage input end. The first thin film transistor 114 is electrically connected to the electrode 152', and its source is electrically connected to the first data line m, and the pole is electrically connected thereto. The first column scan line 112. The second thin film transistor ιΐ5 is electrically connected to the pixel electrode 152, the source thereof is electrically connected to a common voltage input terminal, and the gate thereof is electrically connected to the jth column scan line 112. The pixel electrode 152 and the common electrode 142 form a liquid crystal capacitor 116 for storing a gray scale voltage. The volt-ampere characteristic of the second thin film transistor 115 is different from that of the first thin film transistor 114. Specifically, the equivalent conductivity of the second thin film transistor 115 is higher than that of the first thin germanium transistor 114. Therefore, the same turn-on voltage is applied to the gates of the second thin film transistor 115 and the first thin germanium transistor η*, and the source and the source of the second thin film transistor 115 and the first thin film transistor 114 are In the case where the same voltage is applied between the electrodes, the current flowing through the second thin film transistor 115 is smaller than that of the first thin film transistor 114. Referring to FIG. 3 and FIG. 4 together, FIG. 3 is a schematic side view of a pixel unit 113 of the display panel ,, and FIG. 4 is a schematic plan view of a pixel unit 113 of the display panel n 8 200949811. The display panel 11 further includes a first substrate 14, a second substrate 15, and a liquid crystal layer 16 sandwiched between the first and second substrates 14, 15. The common electrode 142 is disposed on a surface of the first substrate 14 adjacent to the liquid crystal layer 16. A plural "<" shaped protrusion 143 is disposed adjacent to one side of the common electrode 142 of the liquid crystal layer 16. The halogen electrode 152 is disposed on a surface of the second substrate 15 adjacent to the liquid crystal layer 16. A plural "<" shaped groove 153 is formed in the halogen electrode 152. The plural "<" shaped groove 153 is spaced apart from the plural "<" shaped protrusion 143.工作 The operation principle of the vertical alignment type liquid crystal display device is as follows: Referring to Fig. 5, the scanning signal waveform pattern of the vertical alignment type liquid crystal display device 1 is shown. The scan driving circuit 13 scans the display panel 11 by scanning in a column. Specifically, one frame time T of the vertical alignment type liquid crystal display device 1 is divided into two consecutive portions, ΤΙ, T2. During the T1 time, the scan driving circuit 13 sequentially outputs a high level pulse to all the odd column scan lines 112 of the display panel 11; in the T2 time, the scan driving circuit 13 sequentially scans the even column scan lines 112. Output a high power ◎ flat pulse. Then, for the ij-dimensional unit 113, a high-level pulse pulse is output to the j-th column scan line 112 in one frame time T to a time when a high-level pulse pulse is output to the j-th column scan line 112. The interval is the half frame time T/2. Please refer to FIG. 6, which is a partial driving waveform diagram of the ij-dimensional unit 113. In the frame time T, the scan driving circuit 13 first outputs a high level pulse to the jth scan line 112 to turn on the first thin film transistor 114. At this time, the data driving circuit 12 outputs a first gray scale voltage, and the first gray scale voltage charges the liquid crystal capacitor 116 by the data line 111 and the first thin film transistor 9 200949811 114. The liquid crystal capacitor 116 holds the first gray scale voltage after the first thin film transistor 114 is turned off. The first gray scale voltage causes the liquid crystal molecules of the ijth pixel unit 113 to be oriented in four different directions by the "<" shaped trench 153 and the "<" shaped protrusion 143 disposed at the interval, thereby realizing four The field is displayed. After the half frame time T/2, the scan driving circuit 13 outputs a high level pulse to the j + Ι scan line 112 to turn on the second thin film transistor 115. At this time, the liquid crystal capacitor 116 is discharged by the second thin film transistor 115. Since the volt-ampere characteristic of the second thin film transistor 115 is different from that of the first thin film transistor 114, the first gray scale voltage held by the liquid crystal capacitor 116 is not completely released under the high level pulse driving. Therefore, after the second thin film transistor 115 is turned off, the liquid crystal capacitor 116 stores a second gray scale voltage whose absolute value is smaller than the first gray scale voltage. The second gray scale voltage causes the ith pixel unit 113 to achieve a four-domain display different from the T1 time by the " < " shaped trench 153 and the "<" shaped protrusion 143 disposed at the interval. Compared with the prior art, each of the pixel units 113 of the vertical alignment type liquid crystal display device 1 of the present invention stores a first gray scale voltage at the first half frame time T1, and the pixel unit 113 is provided by the pixel unit 113. The plurality of "<" shaped protrusions 143 and the grooves 153 of the intermediate interval realize the four-domain display of the vertical alignment type liquid crystal display device; at the second half time T2, the liquid crystal capacitor 116 stores a second gray scale voltage, and also by The plurality of "<" shaped protrusions 143 and the grooves 153 spaced apart from each other in the pixel unit 113 realize the four-domain display of the vertical alignment type liquid crystal display device different from the previous field time T1, so that the pixel unit 113 is within one frame time T The eight-domain display is realized, thereby improving the color shift phenomenon of the vertical alignment type liquid crystal display device 1, and improving the quality of the vertical alignment type liquid crystal display device 1 200949811. Referring to Fig. 7, there is shown a circuit diagram of a second embodiment of the vertical alignment type liquid crystal display device of the present invention. The vertical alignment type liquid crystal display device 2 of the second embodiment is substantially the same as the vertical alignment type liquid crystal display device 1 of the first embodiment, except that the vertical alignment type liquid crystal display device 2 further includes an auxiliary scan driving circuit 24, which The display panel 21 further includes a plurality of auxiliary scan lines 217, and the volt-ampere characteristics of the first thin film transistor 214 are the same as those of the second thin film transistor 215. The complex auxiliary scan line 217 is electrically coupled to the auxiliary scan drive flip circuit 24. The gate of the second thin film transistor 215 of the pixel unit 213 is electrically connected to the auxiliary scan line 217. Please refer to FIG. 8 together for a partial drive waveform diagram of the ij-dimensional unit 113. The operation principle of the vertical alignment type liquid crystal display device 2 is as follows: in a frame time T, the scan driving circuit 21 outputs a high level pulse to the z-th row scanning line 212 to turn on the first thin film transistor 214, the liquid crystal Capacitor 216 holds a first gray scale voltage. The scan timing of the auxiliary scan driving circuit 24 is delayed by a half frame time T/2 from the scan driving circuit 23, and the voltage amplitude of the high level pulse outputted by the auxiliary scan driving circuit 24 is smaller than the scan driving. Circuit 23 is small. After the half frame time T/2, the auxiliary scan driving circuit 24 outputs a high level pulse to the auxiliary scan line 217 to turn on the second thin film transistor 215. The liquid crystal capacitor 216 passes through the second thin film transistor 215. Discharge, since the voltage amplitude of the high level pulse driving the second thin film transistor 215 is smaller than the high level pulse of the first thin film transistor 214, so that the liquid crystal capacitor 216 is at the second half time T/2. And storing a second gray scale voltage whose absolute value is smaller than the first gray scale voltage. 11 200949811 The vertical alignment type liquid crystal display device of the second embodiment is different from the vertical alignment type liquid crystal display device of the second embodiment, and the driving method of the interlaced scanning may be employed. The volt-ampere characteristic spot of the second thin film transistor 215 is the same as that of the first thin gland θ Μ ι 竹, and thus the setting and process of the vertical alignment type liquid crystal display device 2. The vertical alignment type liquid crystal display device of the present invention can also have various other design changes. For example, the vertical alignment type liquid crystal display device I 丄, 2 can be any ❹ ❹ PVA (Patterned Vertically ^ ^ ^ ^ ^ ^ device; the vertical The alignment type liquid crystal display device η ^ and 丄, 2 may be any MVA (Multi-domain Vertical Alignment^ - V' M vertical alignment type liquid crystal display device; the vertical alignment fine jade crystal display of the first embodiment In the embodiment, the auxiliary scan driving circuit 24 can perform the auxiliary mode. The second scan timing can also be compared with the scan driving circuit 23. ~ Scanning line 217 The driving circuit 24 delays the sweeping timing of the auxiliary scanning line 217 by the auxiliary scanning circuit 23, and may also be in the range of 1/4 frame to 3/4, which is described above. Having been in compliance with the invention patents. Patent application. However, the above is only a preferred embodiment of the present invention. The scope of the present invention is not limited to the above embodiments. The person assists in the essence of the invention The equivalent modification or modification technique made by God is within the scope of the following patent application. The following is a schematic diagram of the schematic diagram of the vertical alignment type liquid crystal display dream system of the present invention. 12 200949811 * Fig. 2 is a schematic diagram showing the circuit of the pixel unit of the vertical alignment type liquid crystal display device. Fig. 3 is a schematic view showing the side structure of the pixel unit of the display panel. Fig. 4 is a schematic view showing the planar structure of the pixel unit of the panel. Fig. 5 is a scanning signal waveform diagram of a vertical alignment type liquid crystal display device. Fig. 6 is a partial driving waveform diagram of the ij 昼 昼 unit. Fig. 7 is a circuit diagram of a second embodiment of the vertical alignment type liquid crystal display device of the present invention. ❹ Figure 8 is a partial drive waveform diagram of the ij 昼 单元 unit. [Main component symbol description] Display panel 11, 21 data line 111 data drive circuit 12 ' 22 昼 prime unit 113 > 213 auxiliary scan drive circuit 24 common Electrode 142 pixel electrode 152 groove 153 auxiliary scanning line 217 first substrate 141 first substrate 14 second substrate 151 second substrate 15 protrusion 143 liquid Crystal layer 16 Vertical alignment type liquid crystal display device 1, 2 scan lines 112, 212 scan drive circuit 13, 23 first thin film transistor 114, 214 second thin film transistor 115, 215 liquid crystal capacitor 116, 216 13