200930201 •九、發明說明： 【發明所屬之技術領域】 * 本發明涉及電路板技術領域，尤其涉及一種電路板及 -其製作方法。 【先前技術】 隨著電子產品往小型化、高速化方向之發展，電路板 逐漸從單面電路板向雙面電路板甚至多層電路板方向發 ❹展。雙面電路板係指雙面均分佈有導電線路之電路板。多 層電路板係指由複數單面電路板或雙面電路板壓合而成之 具有三層以上導電線路之電路板。由於雙面電路板與多層 電路板具有較多之佈線面積、較高之裝配密度而得到廣泛 之應用，請參見Takahashi，A.等人於1992年發表於IEEE Trans, on Components, Packaging, and Manufacturing Technology 之文獻 “High density multilayer printed circuit board for HITAC M-880” 。 雙面電路板之製作工藝通常包括下料、鑽孔、孔金屬 化、製作導電線路、貼阻焊膜、檢驗、包裝等工序。製作 多層電路板時，可先將複數單面電路板或雙面電路板進行 壓合，形成已製作内層導電線路、尚未製作外層導電線路 之多層基板，然後再同樣進行鑽孔、孔金屬化、製作外層 導電線路、貼阻焊膜、檢驗、包裝等工序。 於雙面電路板與多層電路板之製作工藝中，孔金屬化 均係使各層銅箔實現導通之重要工序。然而，於孔金屬化 7 200930201 製程中，不可避免地會於雙面覆銅板表面或多層基板表面 .沉積上化學鍍銅層，使得雙面覆銅板表面或多層基板表面 •之銅羯厚度增加。這樣，於後續導電線路之製作中，較厚 之銅箔不利於較細線路之製作。 【發明内容】 有寥於此，有必要提供一種電路板之製作方法，可方 細線路之電路板’並提供-種由此方法所 以下以實施例說明一種電路板及其製作方法。 板IT:路板之製作方法’包括步驟：提供-電路板基 芦盘i 間層與形成於十間層兩相對表面之第—導電 :成：導電層；於該第—導電層與第二導電層表面分別 7成:先阻層；於第—導電層表面之光阻層 ❹之第二開口;於^=第阻層;;開設與第-開口相對 形成通孔以貫通第一導電開口之間之中間層區域 壁錄金屬層以使第一導當弟一導電層；於該通孔之孔 除第-導電層與第二導電；=二導電層形成電連接;去 咖第二導電層表之光阻層；於第一導 種電路板，其包括φ 表面之第一線路與第二線路：‘通該中間層兩相對 t、第一線路與第二線路分之 電連接部、形成于通孔孔壁以及第-線 8 200930201 連接部表面之連續金屬鍍層，該第一線路與第二線路之電 連接。卩之厚度分別大於第一線路與第二線路之厚度。 該電路板製作過程中，於通孔之孔壁鍍金屬層之過程 中，未將第一導電層與第二導電層表面之光阻層去除，這 樣，鍍金屬層過程（如化學鍍銅或電鍍銅過程）中之鋼材料不 會形成於第一導電層與第二導電層之表面，因此，不合造 f第-導電層與第二導電層厚度之增加，有利於後續二細 、蕃路之製作；而且’可避免孔金屬化過程中之銅材料之浪 費。另外，電路板製作過程中，第一導電層與第二導電声 /刀別形成有電連接部，這樣孔壁鍍金屬層之過程中: 之第一金屬層與形成於電連接部表面之第2 ^層^連續之㈣’因此’第—金屬層與第二金屬層使得 第-—電層與第二導電層實現可靠之電連接，於 ::路板結構中，對應地，第-金屬層與第二金屬；：二 第一線路與第二線路實現可靠之電連接。 、s付 Ο 【實施方式】 下面將結合附圖及複數實施例對本技 之製作方法作進一步之詳細說明。 案之電路板 本技術方案實施例之電路板之製作 驟：提供一電路板基板，其包括中間層與形以下步 相對表面之第一導電層與第二導電層；於二中間層兩 第二導電層表面分別形成一光阻層；於第電層與 光阻層中開設第-開口，並於第 :電層表面之 电層表面之光阻層中 200930201 •開設與第一開口相對之第二開口；於該第一開口與第二開 口之間之中間層區域形成通孔以貫通第一導電層與第二導 電層；於該通孔之孔壁鍍金屬層以使第一導電層與第二導 •電層形成電連接；去除第一導電層與第二導電層表面剩餘 之光阻層；於第一導電層與第二導電層表面進行線路製作。 該電路板基板可為雙面板，亦可為已完成内層線路製 作且尚未進行最外層線路製作之多層板。當待製作之電路 板為雙面板時，該中間層為一層絕緣層。當待製作之電路 ®板為多層電路板時，該中間層包括多層電路板及結合於多 層電路板兩相對表面之膠層。該待製作之電路板為軟性電 路板或硬性電路板。 下面以軟性雙面板為例詳細說明本技術方案之電路板 之製作方法。 第一步，提供一雙面覆銅基板100。 請參閱圖1，該雙面覆銅基板100包括絕緣層110 ’第 ❹一導電層120及第二導電層130。該第一導電層120與第二 導電層130分別形成於該絕緣層110之兩個相對之表面。 該第一導電層120與第二導電層130可為壓延銅箔亦可為 電解銅羯，優選為具有較好可撓性之壓延銅馆。該絕緣層 110可為環氧樹脂、玻纖布、聚酸亞胺（Polyimide，PI )、 聚乙烯對苯二曱酸乙二醇酯（Polyethylene Terephtalate， PET)、聚四敗乙烯（Teflon)、聚硫胺（Polyamide)、聚甲基丙 烯酸曱 S旨（Polymethylmethacrylate)、 聚碳酸酉旨 (Polycarbonate)或聚醢亞胺·聚乙稀-對苯二曱酯共聚物 200930201 (Polyamide polyethylene-terephthalate copolymer)等 ° 第二步，對雙面覆銅基板100進行表面處理，減小第 一導電層120與第二導電層130之厚度。本實施例中，使 •第一導電層120與第二導電層130之厚度小於或等於1〇微 米。 本實施例中，表面處理是針對以下問題所進行：首先’ 由於第一導電層120與第二導電層130之表面通常會存於 油污或氧化物，因此’需要對雙面覆銅基板1〇〇進行表面 ❹處理，以去除油污和氧化物。其次，為了使後續製程中之 光阻劑能夠緊密結合於第一導電層I20與第二導電層130 之表面，需要對第一導電層120與第二導電層130之表面 進行粗化處理。再次，為了進行較細線路之製作，需要減 小第一導電層120與第二導電層13〇之厚度。 根據上述問題，首先，將雙面覆銅基板100設置於脫 脂槽中進行去油污，所用脫脂劑可為域液如KOH、Na0H ❿等。其次，將雙面覆銅基板100設置於蝕刻槽中進行去除 氧化物、粗化以及餘刻減小第一導電層120與第二導電層 130之厚度。蝕刻過程所用試劑為硫酸-雙氧水混合溶液’ 其可將第一導電層120與第二導電層130表面之氧化物去 除，並對表面進行粗化處理’另外’通過控制姓刻時間以 及硫酸與過氧化氫之混合物之濃度，使得第一導電層12〇 與第二導電層130之厚度可控之被減小。 另外，蝕刻過程所用試劑還可過硫酸銨_硫酸混合溶 液、過硫酸鈉-硫酸混合溶液、過硫酸鉀-硫酸混合溶液、氣 11 200930201 化銅-硫酸混合溶液、酸性氯化銅混合溶液或驗性氣化銅混 合溶液。 第三步，於第一導電層120與第二導電層130之表面 分別形成光阻層140與150，如圖2所示。該光阻層140 與150可為液態光阻，通過塗佈之方式形成於第一導電層 120與第二導電層130之表面。該光阻層140與150也可為 固態幹膜光阻，通過壓合之方式形成於第一導電層120與 第二導電層130之表面。該光阻層140與150之材料通常 ®為有機樹脂，例如盼醒·樹脂。 第四步，於光阻層140與150中形成複數第一開口 160 以及複數第二開口 170，如圖3所示。該每個第一開口 160 分別與一個相應之第二開口 170對應，該互相對應之第一 開口 160與第二開口 170之間之雙面覆銅基板100區域， 於後續製程中將會被部分地去除而形成通孔。該第一開口 160與第二開口 170可通過曝光、顯影製程形成；也可採用 φ鐳射燒灼法形成。 第五步，於雙面覆銅基板100中形成複數通孔180，如 圖4所示。 該通孔180可通過機械鑽孔或鐳射鑽孔之方式形成。 於鑽孔過程中，該第一開口 160與第二開口 170共同定義 出通孔180之預去除區域，而第一開口 160與第二開口 170 之週邊區域（即，第一導電層120與第二導電層130無第一 開口 160與第二開口 170之區域）被光阻層140與150所覆 蓋，因此，無論採用機械鑽孔或鐳射鑽孔，處於第一開口 12 200930201 160與第二開口 170之週邊區域之第一導電層120與第二導 電層130之表面由於被光阻層140與150所保護，而不會 被機械鑽孔機或鐳射所影響。 ' 為了使得後續鍍於通孔180孔壁之導電鍍層能夠可靠 地與第一導電層120及第二導電層130形成電連接，本實 施例中，第一開口 160與第二開口 170之開口尺寸（内徑） 大於待形成之通孔180之開口尺寸（内徑）。因此，除通孔 180對應之開口區域外，第一導電層120與第二導電層130 ®分別有部分區域未被光阻層140與150所覆蓋。第一導電 層120未被光阻層140所覆蓋之部分即稱作電連接部121， 第二導電層130未被光阻層150所覆蓋之部分即稱作電連 接部131。於第一導電層120所於之平面内，電連接部121 與通孔180 —端之周邊相接；於第二導電層130所於之平 面内，電連接部131與通孔180另一端之周邊相接。 另外，由於第一開口 160與第二開口 170係用於後續 ❹通孔180之開設所形成，因此第一開口 160與第二開口 170 之開口形狀不限，例如開口形狀可為圓形、橢圓形、多邊 形或其他規則或不規則之形狀。且第一開口 160與第二開 口 170之開口大小可相同也可不同。本實施例中，第一開 口 160與第二開口 170之開口形狀為大小相同之圓形。該 電連接部121之形狀與尺寸由第一開口 160之開口形狀與 尺寸所決定，該電連接部131之形狀與尺寸由第二開口 170 之開口形狀與尺寸所決定。因此，於本實施例中，電連接 部121與131為大小相同之圓環形。 13 200930201 第六步，對雙面覆銅基板100中之複數通孔180之孔 壁進行金屬化處理，從而於通孔180之孔壁形成第一金屬 層191，同時於電連接部121與131之表面形成第二金屬層 • 192，該第一金屬層191與第二金屬層192為連續之金屬 層，即構成連續之導電鍍層190。如圖5所示。 於雙面電路板之製作中，通常為導通兩個相對表面之 線路，需要於通孔180之孔壁形成導電金屬層，該金屬層 之形成過程即為孔金屬化過程。孔金屬化過程至少包括化 ©學鍍銅工序，依具體金屬層厚度之需要，還可包括電鍍銅 工序。本實施例中，所形成之金屬層之材質為銅，且採用 化學鍍銅與電鍍相結合之工序形成于通孔180之孔壁。 化學鍍銅工序通常包括清洗、粗化、預浸、活化及沉 銅等步驟。具體地，首先以域液清洗雙面覆銅基板100，去 除通孔180之孔壁於加工過程中所產生之油污與灰塵。其 次，以過氧水-硫酸體系粗化通孔180之孔壁。再次，將雙 0面覆銅基板100置於預浸液或敏化液中，以預防雙面覆銅 基板100帶入雜質，並潤濕通孔180之孔壁。預浸後進行 活化，使貴金屬催化劑均勻吸附於通孔180之孔壁以及電 連接部121與131之表面，形成化學沉銅所需之活化中心。 最後即可將雙面覆銅基板100放置於化學鍍銅液中，使得 化學鐘銅液中之金屬銅鹽和還原劑於具有催化活性之通孔 180之孔壁以及電連接部121與131之表面進行自催化氧化 還原反應，並於通孔180之孔壁以及電連接部121與131 之表面形成具有一定厚度之化學鍍銅層。 14 200930201 化學鍍銅層通常很薄，其厚度一般為0.1〜3微米之間。 工業上為確保孔壁銅層之連續性和可靠性，於化學鍍銅後 還需要進行電鍍銅工序，即，將雙面覆銅基板100放置於 電鍍槽中，以雙面覆銅基板100為陰極，準確地說以該化 學鍍銅層為陰極，以銅棒或銅板做陽極，以含有銅鹽之電 解質溶液作為電鍍液，接通直流電源即可於電鍍液中發生 電解反應，從而於通孔180之孔壁之化學鍍銅層表面形成 第一金屬層191，且於電連接部121與131之化學鍍銅層之 ®表面分別沉積上第二金屬層192。這樣，形成了電連接第一 導電層120與第二導電層130之導電鍍層190，如圖5所 示。為了確保第一導電層120與第二導電層130之間電連 接之可靠性，導電鍍層190之厚度為1〜20微米，即，第一 金屬層191與第二金屬層192之厚度分別為1〜20微米。由 於第二金屬層192形成於電連接部121與131之表面，因 此，於最終由第一導電層120與第二導電層130製作之線 0路中，電連接部121與131所於線路之厚度大於電連接部 121與131之外之線路之厚度，厚度差即為第二金屬層192 之厚度。 第七步，去除第一導電層120與第二導電層130表面 之光阻層140與150，如圖6所示。將雙面覆銅基板100 浸入剝離液中，該剝離液為可使光阻層140與150溶解之 有機溶劑或域液。本實施例中，剝離液為NaOH溶液。 最後，於第一導電層120與第二導電層130表面製作 線路。即，先通過圖像轉移法於第一導電層120與第二導 15 200930201 '電層130形成相應光阻圖案210與220，如圖7所示，再經 由化學藥液蝕刻或鐳射燒蝕等方法將第一導電層120與第 二導電層130製成第一線路230與第二線路240,從而得到 雙面電路板200，如圖8所示。 根據上述製程所得到之雙面電路板200,其包括絕緣層 110、由第一導電層120製作之第一線路230、由第二導電 層130製作之第二線路240、貫通第一線路230與第二線路 240之通孔180、第一線路230具有與通孔180之周邊相接 ❹之電連接部121、第二線路240具有與通孔180之周邊相接 之電連接部131、形成于通孔180孔壁之第一金屬層191 以及分別形成於電連接部121與131之第二金屬層192。由 於第一金屬層191與第二金屬層192是於電鍍製程中同時 形成之，因此，第一金屬層191與第二金屬層192所構成 之導電鍍層190為連續性鍍層。 如圖8所示，導電鍍層190之結構還可描述為：形成 ❹於通孔180孔壁之第一金屬層191構成一圓筒體；自該圓 筒體一端之圓周邊緣向通孔180外部延伸一定距離（即，電 連接部121之寬度）而形成之第二金屬層192，且該第二金 屬層192形成於電連接部121之表面；自該圓筒體另一端 之圓周邊緣向通孔180外部延伸一定距離（即，電連接部131 之寬度）而形成之第二金屬層192,且該第二金屬層192形 成於電連接部131之表面。因此，從通孔180之剖視圖可 看出，導電鍍層190之縱截面形狀為“][”。 由於本實施例中以雙面板為例介紹電路板之製作方 16 200930201 法，因此，於最終所得雙面板之結構中，處於第一線路230 與第二線路240之間之中間層為一層絕緣層。當所製作之 為多層板時，處於第一線路230與第二線路240之間之中 ‘間層可為雙面板或多層板。另外，當第一導電層120與第 二導電層130之材料為壓延銅箔時，線路230與240之材 料為壓延銅箔，而導電鍍層190之材料為電鍍銅材料，因 此，線路230與240之材料與導電鍍層190之材料不同。 而當第一導電層120與第二導電層130之材料為電解銅箔 ❹時，線路230與240之材料與導電鍍層190之材料相同。 將雙面覆銅基板100製成雙面電路基板200之後，可 直接進行貼阻焊膜、檢驗、包裝等工序，得到雙面電路板 產品。也可將得到之雙面電路板與其他雙面或單面板壓合 得到多層電路板。 本實施例之雙面電路基板製作過程中，於進行通孔180 金屬化之過程中，未將第一導電層120與第二導電層130 q表面之光阻層140與150去除，這樣，化學鍍銅或電鍍銅 過程中之銅不會形成於第一導電層120與第二導電層130 表面，因此，不會造成第一導電層120與第二導電層130 厚度之增加，有利於後續較細線路之製作；而且，可避免 化學鍍銅或電鍍銅過程中之銅材料之浪費。另外，由於開 設於光阻層140與150中之第一開口 160與第二開口 170 之開口尺寸（内徑）大於待形成之通孔180之開口尺寸（内 徑），從而第一導電層120形成電連接部121，第二導電層 130形成電連接部131，這樣當於化學鍍與電鍍過程中，導 17 200930201 電鍍層190之第一金屬層191與第二金屬層192可可靠之 -使彳于第一導電層120與第二導電層13〇實現電連接。 . 上述實施例僅以雙面板為例進行描述電路板之製作方 法，當然，多層電路板之製作過程同樣可採用與上述雙面 板相似之方法製作，從而得到高密度、細線路之多層電路 板。例如，多層電路板導通孔之孔壁鍍銅過程中，多層電 路板最外層之銅層表面之光阻層同樣不被去除，以防止化 學鍍銅或電鍍銅過程中之銅材料形成於最外層之銅層表 面’造成最外層之銅層厚度增加。 綜上所述，本發明確已符合發明專利之要件，遂依法 提出專利申請。惟，以上所述者僅為本發明之較佳實施方 式，自不能以此限制本案之申請專利範圍。舉凡熟悉本案 技藝之人士援依本發明之精神所作之等效修飾或變化，皆 應涵蓋於以下申請專利範圍内。 【圖式簡單說明】 Ο 圖1係本實施方式雙面覆銅基板之示意圖。 圖2係本實施方式雙面覆銅基板兩相對表面形成光阻 層之示意圖。 圖3係本實施方式雙面覆銅基板兩相對光阻層中形成 開口之示意圖。 圖4係本實施方式雙面覆銅基板中形成通孔之示意圖。 圖5係本實施方式雙面覆銅基板中通孔之孔壁金屬化 之示意圖。 圖6係本實施方式雙面覆銅基板之兩相對光阻層去除 18 200930201 後之示意圖。 圖7係本實施方式雙面覆銅基板兩相對表面形成用於 製作線路之光阻層之示意圖。 ' 圖8係本實施方式雙面覆銅基板兩相對表面形成線路 後所得之雙面電路板之示意圖。200930201 • Nine, invention description: [Technical field of invention] The present invention relates to the field of circuit board technology, and in particular to a circuit board and a method of fabricating the same. [Prior Art] With the development of electronic products in the direction of miniaturization and high speed, circuit boards are gradually moving from single-sided boards to double-sided boards and even multilayer boards. A double-sided circuit board is a circuit board in which conductive lines are distributed on both sides. A multi-layer circuit board refers to a circuit board having three or more conductive lines formed by pressing a plurality of single-sided circuit boards or double-sided circuit boards. Since double-sided boards and multilayer boards have a wide range of wiring areas and high assembly densities, please refer to Takahashi, A. et al., 1992, IEEE Trans, on Components, Packaging, and Manufacturing. The literature "High density multilayer printed circuit board for HITAC M-880". The manufacturing process of the double-sided circuit board usually includes the processes of blanking, drilling, hole metallization, fabrication of conductive lines, solder resist film, inspection, packaging, and the like. When manufacturing a multi-layer circuit board, a plurality of single-sided circuit boards or double-sided circuit boards may be first pressed to form a multi-layer substrate on which inner conductive lines have been fabricated, and outer conductive lines have not been fabricated, and then drilling, hole metallization, and the like. Production of outer conductive lines, solder mask, inspection, packaging and other processes. In the fabrication process of double-sided circuit boards and multilayer circuit boards, the metallization of the holes is an important process for turning on the copper foil of each layer. However, in the hole metallization process of 200930201, it is inevitable that the surface of the double-sided copper clad laminate or the surface of the multi-layer substrate is deposited with an electroless copper plating layer, so that the thickness of the beryllium on the surface of the double-sided clad laminate or the surface of the multi-layer substrate is increased. Thus, in the fabrication of subsequent conductive traces, thicker copper foils are not conducive to the fabrication of thinner traces. SUMMARY OF THE INVENTION In view of the above, it is necessary to provide a method of fabricating a circuit board, which can be used for a circuit board of a thin line, and a method for manufacturing the same. Board IT: method of manufacturing a road board' includes the steps of: providing - a circuit board-based reed i-layer and a first surface formed on the opposite surfaces of the ten-layer: conductive: a conductive layer; the first conductive layer and the second The surface of the conductive layer is respectively formed into: a first resist layer; a second opening of the photoresist layer on the surface of the first conductive layer; and a second resist opening; and a through hole is formed opposite to the first opening to penetrate the first conductive opening a metal layer is interposed between the intermediate layer regions to make the first conductive conductor a conductive layer; the hole in the through hole is electrically connected to the second conductive layer and the second conductive layer; a photoresist layer of the layer table; in the first lead circuit board, comprising a first line and a second line of the φ surface: 'the opposite intermediate layer of the intermediate layer, the electrical connection between the first line and the second line, A continuous metal plating formed on the wall of the through hole and the surface of the connecting portion of the first line 8 200930201, the first line being electrically connected to the second line. The thickness of the crucible is greater than the thickness of the first line and the second line, respectively. During the manufacturing process of the circuit board, the photoresist layer on the surface of the first conductive layer and the second conductive layer is not removed during the metallization of the hole wall of the through hole, so that the metal plating process (such as electroless copper plating or The steel material in the electroplating copper process is not formed on the surface of the first conductive layer and the second conductive layer, and therefore, the increase of the thickness of the first conductive layer and the second conductive layer is not favorable, which is beneficial to the subsequent two fine and versatile roads. Production; and 'can avoid the waste of copper material in the metallization process of the hole. In addition, during the manufacturing process of the circuit board, the first conductive layer and the second conductive sound/knife are formed with electrical connection portions, such that the first metal layer and the surface formed on the surface of the electrical connection portion are formed during the metallization of the hole wall. 2 ^ layer ^ continuous (four) 'so 'the first metal layer and the second metal layer enable the first electrical layer and the second conductive layer to achieve a reliable electrical connection, in the:: road plate structure, correspondingly, the first metal The layer and the second metal; the second first line and the second line achieve a reliable electrical connection. [Embodiment] The manufacturing method of the present technology will be further described in detail below with reference to the accompanying drawings and the embodiments. The circuit board of the embodiment of the present invention provides a circuit board substrate, which comprises a first conductive layer and a second conductive layer, wherein the intermediate layer and the opposite surface of the step are formed; a photoresist layer is formed on the surface of the conductive layer; a first opening is formed in the first electrical layer and the photoresist layer, and a photoresist layer is formed on the surface of the electrical layer on the surface of the electrical layer: 200930201 • the first opening is opposite to the first opening a second opening; a through hole is formed in the intermediate layer region between the first opening and the second opening to penetrate the first conductive layer and the second conductive layer; a metal layer is plated on the hole wall of the through hole to make the first conductive layer and The second conductive layer forms an electrical connection; the photoresist layer remaining on the surface of the first conductive layer and the second conductive layer is removed; and the circuit is fabricated on the surfaces of the first conductive layer and the second conductive layer. The circuit board substrate can be a double panel or a multi-layer board that has been fabricated with an inner layer circuit and has not been fabricated with the outermost layer. When the circuit board to be fabricated is a double panel, the intermediate layer is an insulating layer. When the circuit board to be fabricated is a multilayer circuit board, the intermediate layer includes a multilayer circuit board and a glue layer bonded to opposite surfaces of the multi-layer circuit board. The circuit board to be fabricated is a flexible circuit board or a rigid circuit board. The following describes a method for fabricating the circuit board of the present technical solution by taking a soft double panel as an example. In the first step, a double-sided copper clad substrate 100 is provided. Referring to FIG. 1, the double-sided copper clad substrate 100 includes an insulating layer 110' and a second conductive layer 120. The first conductive layer 120 and the second conductive layer 130 are respectively formed on two opposite surfaces of the insulating layer 110. The first conductive layer 120 and the second conductive layer 130 may be a rolled copper foil or an electrolytic copper crucible, preferably a rolled copper pavilion having good flexibility. The insulating layer 110 can be epoxy resin, fiberglass cloth, polyimide (PI), polyethylene terephthalate (PET), polytetramethylene (Teflon), Polyamide, Polymethylmethacrylate, Polycarbonate or Polyimide Polyethylene terephthalate copolymer 200930201 (Polyamide polyethylene-terephthalate copolymer) Etc. In the second step, the double-sided copper clad substrate 100 is surface-treated to reduce the thickness of the first conductive layer 120 and the second conductive layer 130. In this embodiment, the thickness of the first conductive layer 120 and the second conductive layer 130 is made less than or equal to 1 μm. In this embodiment, the surface treatment is performed for the following problems: First, since the surfaces of the first conductive layer 120 and the second conductive layer 130 are usually present in oil or oxide, the double-sided copper-clad substrate is required. The crucible is surface treated to remove oil and oxide. Secondly, in order to enable the photoresist in the subsequent process to be tightly bonded to the surfaces of the first conductive layer I20 and the second conductive layer 130, the surfaces of the first conductive layer 120 and the second conductive layer 130 need to be roughened. Again, in order to make a thinner line, it is desirable to reduce the thickness of the first conductive layer 120 and the second conductive layer 13A. According to the above problem, first, the double-sided copper-clad substrate 100 is placed in a degreasing bath for degreasing, and the degreasing agent used may be a domain liquid such as KOH, NaHH, or the like. Next, the double-sided copper clad substrate 100 is placed in the etching bath to remove oxides, roughen, and to reduce the thickness of the first conductive layer 120 and the second conductive layer 130. The reagent used in the etching process is a sulfuric acid-hydrogen peroxide mixed solution, which can remove the oxides on the surface of the first conductive layer 120 and the second conductive layer 130, and roughen the surface 'in addition' by controlling the time of the surname and the sulfuric acid and The concentration of the mixture of hydrogen peroxide is such that the thickness of the first conductive layer 12A and the second conductive layer 130 is controllably reduced. In addition, the reagent used in the etching process may also be an ammonium persulfate-sulfuric acid mixed solution, a sodium persulfate-sulfuric acid mixed solution, a potassium persulfate-sulfuric acid mixed solution, a gas 11 200930201 copper-sulfuric acid mixed solution, an acidic copper chloride mixed solution or a test. A mixture of vaporized copper. In the third step, photoresist layers 140 and 150 are formed on the surfaces of the first conductive layer 120 and the second conductive layer 130, respectively, as shown in FIG. The photoresist layers 140 and 150 may be liquid photoresists formed on the surfaces of the first conductive layer 120 and the second conductive layer 130 by coating. The photoresist layers 140 and 150 may also be solid-state dry film photoresists formed on the surfaces of the first conductive layer 120 and the second conductive layer 130 by press bonding. The material of the photoresist layers 140 and 150 is usually an organic resin such as a wake-up resin. In the fourth step, a plurality of first openings 160 and a plurality of second openings 170 are formed in the photoresist layers 140 and 150, as shown in FIG. Each of the first openings 160 corresponds to a corresponding second opening 170, and the mutually overlapping first and second copper-plated substrate 100 regions between the first opening 160 and the second opening 170 are partially formed in a subsequent process. The ground is removed to form a through hole. The first opening 160 and the second opening 170 may be formed by an exposure and development process; or may be formed by a φ laser cauterization method. In the fifth step, a plurality of through holes 180 are formed in the double-sided copper clad substrate 100 as shown in FIG. The through hole 180 can be formed by mechanical drilling or laser drilling. During the drilling process, the first opening 160 and the second opening 170 together define a pre-removed area of the through hole 180, and the first opening 160 and the peripheral area of the second opening 170 (ie, the first conductive layer 120 and the first The second conductive layer 130 has no first opening 160 and a second opening 170) covered by the photoresist layers 140 and 150, so that the first opening 12 200930201 160 and the second opening are used regardless of mechanical drilling or laser drilling. The surfaces of the first conductive layer 120 and the second conductive layer 130 in the peripheral region of 170 are protected by the photoresist layers 140 and 150 without being affected by the mechanical drill or laser. In order to enable the conductive plating subsequently plated on the hole wall of the through hole 180 to be electrically connected to the first conductive layer 120 and the second conductive layer 130, the opening size of the first opening 160 and the second opening 170 in this embodiment (Inner diameter) is larger than the opening size (inner diameter) of the through hole 180 to be formed. Therefore, except for the opening area corresponding to the through hole 180, a portion of the first conductive layer 120 and the second conductive layer 130, respectively, are not covered by the photoresist layers 140 and 150. The portion of the first conductive layer 120 that is not covered by the photoresist layer 140 is referred to as an electrical connection portion 121, and the portion of the second conductive layer 130 that is not covered by the photoresist layer 150 is referred to as an electrical connection portion 131. In the plane of the first conductive layer 120, the electrical connection portion 121 is in contact with the periphery of the end of the through hole 180; in the plane of the second conductive layer 130, the other end of the electrical connection portion 131 and the through hole 180 Surrounded by the surrounding. In addition, since the first opening 160 and the second opening 170 are formed for the opening of the second through hole 180, the shape of the opening of the first opening 160 and the second opening 170 is not limited, for example, the shape of the opening may be a circle or an ellipse. Shapes, polygons, or other regular or irregular shapes. The openings of the first opening 160 and the second opening 170 may be the same or different in size. In this embodiment, the openings of the first opening 160 and the second opening 170 have a circular shape of the same size. The shape and size of the electrical connection portion 121 are determined by the shape and size of the opening of the first opening 160. The shape and size of the electrical connection portion 131 are determined by the shape and size of the opening of the second opening 170. Therefore, in the present embodiment, the electrical connecting portions 121 and 131 are annular rings of the same size. 13 200930201 In the sixth step, the hole walls of the plurality of through holes 180 in the double-sided copper-clad substrate 100 are metallized to form the first metal layer 191 on the hole walls of the through holes 180, and at the same time, the electrical connection portions 121 and 131 A second metal layer 192 is formed on the surface, and the first metal layer 191 and the second metal layer 192 are continuous metal layers, that is, a continuous conductive plating layer 190 is formed. As shown in Figure 5. In the fabrication of a double-sided circuit board, usually a circuit for conducting two opposite surfaces is required to form a conductive metal layer on the hole wall of the through hole 180, and the formation process of the metal layer is a hole metallization process. The hole metallization process includes at least a chemical plating process, which may include a copper plating process depending on the thickness of the specific metal layer. In this embodiment, the material of the formed metal layer is copper, and the process of combining electroless copper plating and electroplating is formed on the hole wall of the through hole 180. The electroless copper plating process usually includes steps of washing, roughening, prepreg, activation, and copper sinking. Specifically, the double-sided copper-clad substrate 100 is first washed with a domain liquid to remove oil and dust generated during the processing of the hole wall of the through-hole 180. Next, the pore walls of the through holes 180 are roughened by a peroxyhydrate-sulfuric acid system. Again, the double-sided copper-clad substrate 100 is placed in a prepreg or sensitizing liquid to prevent the double-sided copper-clad substrate 100 from being contaminated with impurities and to wet the pore walls of the through-holes 180. After the pre-dip is activated, the noble metal catalyst is uniformly adsorbed on the pore walls of the via holes 180 and the surfaces of the electrical connection portions 121 and 131 to form an activation center required for the chemical copper sink. Finally, the double-sided copper-clad substrate 100 can be placed in the electroless copper plating solution, so that the metal copper salt and the reducing agent in the chemical solution copper liquid are in the hole wall of the catalytically active through hole 180 and the electrical connection portions 121 and 131. The surface is subjected to an autocatalytic redox reaction, and an electroless copper plating layer having a certain thickness is formed on the pore walls of the via hole 180 and the surfaces of the electrical connection portions 121 and 131. 14 200930201 Electroless copper plating is usually very thin and its thickness is generally between 0.1 and 3 microns. In order to ensure the continuity and reliability of the copper layer of the hole wall, the electroplating copper process is required after the electroless copper plating, that is, the double-sided copper-clad substrate 100 is placed in the plating tank, and the double-sided copper-clad substrate 100 is used. Cathode, specifically, the electroless copper plating layer is used as a cathode, a copper rod or a copper plate is used as an anode, and an electrolyte solution containing a copper salt is used as a plating solution, and an electrolysis reaction can be generated in the electroplating solution by turning on a direct current power source, thereby A surface of the electroless copper plating layer of the hole wall of the hole 180 forms a first metal layer 191, and a second metal layer 192 is deposited on the surface of the electroless copper plating layer of the electrical connection portions 121 and 131, respectively. Thus, a conductive plating layer 190 electrically connecting the first conductive layer 120 and the second conductive layer 130 is formed as shown in FIG. In order to ensure the reliability of electrical connection between the first conductive layer 120 and the second conductive layer 130, the thickness of the conductive plating layer 190 is 1 to 20 micrometers, that is, the thicknesses of the first metal layer 191 and the second metal layer 192 are respectively 1 ~20 microns. Since the second metal layer 192 is formed on the surface of the electrical connection portions 121 and 131, the electrical connection portions 121 and 131 are on the line in the line 0 which is finally formed by the first conductive layer 120 and the second conductive layer 130. The thickness is greater than the thickness of the lines other than the electrical connections 121 and 131, and the difference in thickness is the thickness of the second metal layer 192. In the seventh step, the photoresist layers 140 and 150 on the surfaces of the first conductive layer 120 and the second conductive layer 130 are removed, as shown in FIG. The double-sided copper clad substrate 100 is immersed in a stripping liquid which is an organic solvent or a domain liquid which can dissolve the photoresist layers 140 and 150. In this embodiment, the stripping solution is a NaOH solution. Finally, a line is formed on the surface of the first conductive layer 120 and the second conductive layer 130. That is, the corresponding photoresist patterns 210 and 220 are formed on the first conductive layer 120 and the second conductive layer 15 200930201 'the electric layer 130 by the image transfer method, as shown in FIG. 7 , and then subjected to chemical liquid etching or laser ablation. The first conductive layer 120 and the second conductive layer 130 are formed into a first line 230 and a second line 240, thereby obtaining a double-sided circuit board 200, as shown in FIG. The double-sided circuit board 200 obtained according to the above process includes an insulating layer 110, a first line 230 made of the first conductive layer 120, a second line 240 made of the second conductive layer 130, and a first line 230. The through hole 180 of the second line 240, the first line 230 has an electrical connection portion 121 that is in contact with the periphery of the through hole 180, and the second line 240 has an electrical connection portion 131 that is connected to the periphery of the through hole 180, and is formed on The first metal layer 191 of the via hole 180 and the second metal layer 192 formed in the electrical connection portions 121 and 131, respectively. Since the first metal layer 191 and the second metal layer 192 are simultaneously formed in the electroplating process, the conductive plating layer 190 composed of the first metal layer 191 and the second metal layer 192 is a continuous plating layer. As shown in FIG. 8, the structure of the conductive plating layer 190 can also be described as: forming a first metal layer 191 formed on the hole wall of the through hole 180 to form a cylindrical body; extending from the circumferential edge of one end of the cylindrical body to the outside of the through hole 180 a second metal layer 192 formed at a certain distance (ie, the width of the electrical connection portion 121), and the second metal layer 192 is formed on the surface of the electrical connection portion 121; from the circumferential edge of the other end of the cylindrical body to the through hole The second metal layer 192 is formed by extending a certain distance (ie, the width of the electrical connection portion 131), and the second metal layer 192 is formed on the surface of the electrical connection portion 131. Therefore, it can be seen from the cross-sectional view of the through hole 180 that the longitudinal cross-sectional shape of the conductive plating layer 190 is "] [". In this embodiment, the double-panel is taken as an example to introduce the circuit board manufacturing method 16 200930201. Therefore, in the final double-panel structure, the intermediate layer between the first line 230 and the second line 240 is an insulating layer. . When fabricated as a multi-layer board, between the first line 230 and the second line 240, the 'interlayer' may be a double panel or a multi-layer board. In addition, when the material of the first conductive layer 120 and the second conductive layer 130 is a rolled copper foil, the materials of the lines 230 and 240 are rolled copper foil, and the material of the conductive plating layer 190 is an electroplated copper material, therefore, the lines 230 and 240 The material is different from the material of the conductive plating 190. When the materials of the first conductive layer 120 and the second conductive layer 130 are electrolytic copper foils, the materials of the wires 230 and 240 are the same as those of the conductive plating layer 190. After the double-sided copper clad substrate 100 is formed into the double-sided circuit board 200, the solder resist film, inspection, packaging, and the like can be directly applied to obtain a double-sided circuit board product. The obtained double-sided circuit board can also be pressed together with other double-sided or single-sided boards to obtain a multilayer circuit board. In the process of fabricating the double-sided circuit substrate of the embodiment, during the metallization of the via 180, the photoresist layers 140 and 150 on the surface of the first conductive layer 120 and the second conductive layer 130 are not removed, so that chemistry The copper in the process of copper plating or copper plating is not formed on the surfaces of the first conductive layer 120 and the second conductive layer 130. Therefore, the thickness of the first conductive layer 120 and the second conductive layer 130 is not increased, which is advantageous for subsequent comparison. The production of fine lines; moreover, the waste of copper material during electroless copper plating or copper plating can be avoided. In addition, since the opening size (inner diameter) of the first opening 160 and the second opening 170 formed in the photoresist layers 140 and 150 is larger than the opening size (inner diameter) of the through hole 180 to be formed, the first conductive layer 120 Forming the electrical connection portion 121, the second conductive layer 130 forms the electrical connection portion 131, so that during the electroless plating and electroplating process, the first metal layer 191 and the second metal layer 192 of the plating layer 190 can be reliably made The first conductive layer 120 and the second conductive layer 13 are electrically connected. The above embodiment only describes the manufacturing method of the circuit board by taking the double panel as an example. Of course, the manufacturing process of the multilayer circuit board can also be fabricated by a method similar to the above double-sided board, thereby obtaining a multilayer circuit board of high density and fine line. For example, in the copper plating process of the via hole of the multilayer circuit board, the photoresist layer on the outermost layer of the copper layer of the multilayer circuit board is also not removed to prevent the copper material in the process of electroless copper plating or copper plating from being formed on the outermost layer. The surface of the copper layer 'causes the thickness of the outermost copper layer to increase. In summary, the present invention has indeed met the requirements of the invention patent, and has filed a patent application according to law. However, the above description is only a preferred embodiment of the present invention, and it is not possible to limit the scope of the patent application of the present invention. Equivalent modifications or variations made by persons skilled in the art in light of the present invention are intended to be included within the scope of the following claims. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic view showing a double-sided copper-clad substrate of the present embodiment. Fig. 2 is a schematic view showing the formation of a photoresist layer on the opposite surfaces of the double-sided copper-clad substrate of the present embodiment. Fig. 3 is a schematic view showing the formation of openings in the opposite photoresist layers of the double-sided copper-clad substrate of the present embodiment. 4 is a schematic view showing the formation of a through hole in the double-sided copper-clad substrate of the embodiment. Fig. 5 is a view showing the metallization of the hole walls of the through holes in the double-sided copper clad substrate of the embodiment. FIG. 6 is a schematic view showing the removal of two opposite photoresist layers of the double-sided copper-clad substrate of the present embodiment 18 200930201. Fig. 7 is a schematic view showing the formation of a photoresist layer for forming a line on both opposite surfaces of the double-sided copper-clad substrate of the present embodiment. Fig. 8 is a schematic view showing a double-sided circuit board obtained by forming lines on opposite surfaces of a double-sided copper-clad substrate of the present embodiment.
【主要元件符號說明】 雙面覆銅基板 100 絕緣層 110 第一導電層 120 電連接部 121 ， 131 第二導電層 130 光阻層 140 ， 150 第一開口 160 第二開口 170 通孔 180 導電鍍層 190 第一金屬層 191 第二金屬層 192 光阻圖案 210 ， 220 第一線路 230 第二線路 240 雙面電路板 200 19[Main component symbol description] double-sided copper-clad substrate 100 insulating layer 110 first conductive layer 120 electrical connection portion 121, 131 second conductive layer 130 photoresist layer 140, 150 first opening 160 second opening 170 through hole 180 conductive plating layer 190 first metal layer 191 second metal layer 192 photoresist pattern 210, 220 first line 230 second line 240 double-sided circuit board 200 19