200913819 . 九、發明說明： 、【發明所屬之技術領域】 本發明涉及一種電路板測試方法。 【先前技術】 電路板製作完成後，一般需要經過多種測試’例如短 路測試及開路測試，請參見Yiu-Wing Leung, A Signal Path Grouping Algorithm for Fast Detection of Short Circuits on Printed Circuit Boards, IEEE Transactions on Instrumentation and Measurement, Vol 43. No. 1, p288-292, February 1994. 由於電路板之製作工藝較為複雜，製作過程中經常會 有各種不良產生，例如殘膠以及線路過蝕。殘膠通常指盲 孔底部遺留有膠。線路過蝕指由於各種原因造成本來為線 路部分之銅被蝕刻掉。這些不良通常會導致導電線路之信 賴度下降。因此電路板測試時必須將這些不良找出來。這 ' 些不良都會導致導電線路之電阻發生較為明顯之變化，因 此從理論上來講，可通過測量導電線路之電阻值來測量線 路板中是否存於不良。 先前技術中對電路板進行電性測試一般依照電路板國 際規範（IPC規範）進行，然而IPC規範中，電路板導電線 路之通路電阻標準為10Ω，即導電線路兩端之間電阻小於 10 Ω即為正常，因此針對電路板電阻測量之方法及標準均 只適用於10 Ω級別之電阻，而目前之電路板中，如柔性電 200913819 .路板中導電線路兩端之間 間，因此遠小於1〇Ωc〜 處於〇.〇1〇到2Ω之 -進行電性料，^全按照IPC之規範對電路板 甩進而確定電路板中之不良。 孜 有鑒於此’提供—種可通過 疋否存於不良之測試方法實為必要。電阻而料電路板中 【發明内容】 中是否可通過測量電阻而測試電路板 板中各個導電路;電=以下步驟二測量該種電路 數待測量導帝路广 丁 ” ，於该種電路板中確定複 電路徑之電:值^測量複數該種電路板中每個待測量導 電路徑及其電阻值^ 值變化幅度超出預定範圍之導 導電路徑進行切片分 田度％出預疋靶圍之 分析不良導電路^ ^ 電路徑中是否存於不良； 引起之導電路/: 值變化與標準電阻值，得出不良 化規律；、，” I广且值變化範圍相對於其標準電阻值之變 每個量電路板中各導電路握之電阻值，根ί 測電路板變化是否符合該變化規律以確認該待 奴肀各導電路徑是否存於不良。 寸 本技術方案提供之測量電路 良對導電路經電阻造成之變化 ：：：過建立不. :簡，導電_阻並將 車父’即可雜技好播1 I之如準相比 X、^ V電路徑中是否存於殘膠等不良。 200913819 【實施方式】 - 參閱圖1’本技術方案提供之 以下步驟： 板不良測試方法包括 步驟一、測量電路板中各導電路徑 電路板上通常具有複數測試點。一般;車^值。 成時會根據需要測試之仃电子性能測 間之電阻。參閱圖2,其為本，二：要測夏哪些測試點之 圖。電路板U)上具有複數導電路經s之1路板之不意 電路徑包括導電線路122、導通孔12:、二、每個導 試點14。 及设置於兩端之測 :試50到⑽片電路板1〇中之各導 ‘^:^方法計算出每個導電路二 阻會隨機分佈於—定範圍内值二S·; Q ^這些標準電 例，所測量到之各導電路徑 為柔性電路板為 間。 <知早電阻值於0.01Ω至2Ω之 測試電阻時可採用飛針四 具有很高測量精度，可_彳。 式測試 性電路板時，必須將電路板拉^採用飛針四線式測量柔 此可實際值，影響測試之準確度，因 用之、口具。參閱圖3，其為測量電路板10時採 結構不意圖。該治具包括底板20及頂板22。頂板 -置有複數通孔24,通孔24之位置與電路板 200913819 .试點14 一一對應。參閱圖4，將電路板10夾於底板20遍 -頂板22之間，每個測試點14從與之相對應之通孔％中露 出。採用底板20與頂板22將電路板1〇固定後可避免電^ 板10晃動造成之測試不準確問題。 步驟二、於電路板10中確定複數待測量導電路徑。 該複數待測量導電路徑之禪準兩 跤拓⑺士、曾雨格仫之榦早电阻值應均勻分佈於電 辭之數一： 間内，且待測量之導電 出之社㈣# ☆ 取樣點數目衫，則最後得 出之、·’口果越精確。本實施合丨中挥 依次總，…里之導電路徑為22個， 、'唬 Sl、s2、s3、…、s21、s22，备個往、目,,θ，首 母個待測量導電路徑 t應之払準龟阻值於〇 〇 0 050. ηιη 玍山之間，依次為0.01Ω、 導雷政你 士 · 。畜然待測量之 值分佈決定。例如，如果電路二^^路從之標準電阻 之導電卿，討^^ 中沒有標準電阻為咖 電阻靠近0 1Ω $ I + ^ U到％路板10上標準 迎㈣之導電路徑之電阻，例如〇_。 y驟二、測量複數電路板1〇中每個 電阻值’並記錄阻值變化 目1㊅路控之 太牛锕— 頂疋靶圍之導電路徑。 V 目之在於找出初步懷疑為不良之導+ & :值變化異常是根據不良所導致之電阻= 阻值相較由於殘膠不良導致導電路徑之電 :較於私準電阻變化通常於2〇%以上。 之, 之為其他種類之不良，則 ：：如果測里 爻化呉吊之乾圍可相應改 10 200913819 變乙為便於記錄，將該複數電路板1〇編號，本實施例當中 該複數電路板1〇依次記為電路板Li、.....k。 —假設某個待測量導電路徑之標準電阻值為Xn，實"際測 量之電阻值為Υη，記其電阻值變化△ Υη=Υη_Χη，△ ΙΑ即 為其阻值變化幅度，如果ΔΥη/Χη超出預先確定之某一範圍 内，例如前述之20%，則記錄該電路板之編號及其電阻值 變化Α於表i中對應之單格内。由於同—片電路板上且有 ，數待測量導電路徑，目此可能有複數導電路徑被記錄於 :1中。電路板1G之測量數量使得對應於每個取樣點記錄 =到10個不良導電路徑即可。當㈣多之資料可得到更 口精確之結果。例如，電路板Li上之導電路徑&之標準電 :為〇則’實際測量其電阻值為㈣⑽，其變化幅度超 =观，因此將該電路板編號、導電路#編號及電阻值記 :於表1中對應之單格内。此處僅以—個導電路徑為例進 兄明’電路板Ll其他之待測量導電路#或者其他電路板 甲之待測導電路徑同.樣處理。 -___ 表1 待測量导电 路怪编号 待测量导电路 怪标准电阻 0.01Ω 电路板編号及其电阻值变化 ~~一 "" -----—___________- L1-〇.〇〇4q .200913819. IX. Description of the invention: [Technical field to which the invention pertains] The present invention relates to a test method for a circuit board. [Prior Art] After the board is completed, it is generally required to go through various tests, such as short-circuit test and open-circuit test. See Yiu-Wing Leung, A Signal Path Grouping Algorithm for Fast Detection of Short Circuits on Printed Circuit Boards, IEEE Transactions on Instrumentation And Measurement, Vol 43. No. 1, p288-292, February 1994. Due to the complexity of the manufacturing process of the circuit board, there are often various defects in the manufacturing process, such as residual glue and line over-etching. Residual glue usually means that glue remains on the bottom of the blind hole. Line over-corrosion means that copper, which was originally part of the line, is etched away for various reasons. These defects often result in a decrease in the reliability of the conductive line. Therefore, these defects must be found out when testing the board. These 'defects' will cause a significant change in the resistance of the conductive line. Therefore, in theory, the resistance value of the conductive line can be measured to measure whether there is a defect in the line board. In the prior art, the electrical test of the circuit board is generally carried out according to the international board standard (IPC specification). However, in the IPC specification, the path resistance of the conductive line of the circuit board is 10 Ω, that is, the resistance between the two ends of the conductive line is less than 10 Ω. It is normal, so the method and standard for measuring the resistance of the board are only applicable to the resistance of 10 Ω level, and in the current circuit board, such as the flexible circuit 200913819. The distance between the two ends of the conductive line in the road board is far less than 1 〇Ωc~ is in the range of 〇.〇1〇 to 2Ω - the electrical material is used, and the board is flawed according to the IPC specification to determine the fault in the board.孜 In view of this, it is necessary to provide a test method that can be used in the absence of defects. In the circuit board of resistance, it is possible to test each of the circuit boards in the circuit board by measuring the resistance; the electric power = the following step 2 measures the number of circuits to be measured, and the circuit board is used. Determine the power of the re-power path: value ^ measure the number of each conductive path to be measured in the circuit board and the resistance value of the resistance value exceeds the predetermined range of the conductive path to slice the degree of splitting out of the target range Analyze the bad conducting circuit ^ ^ Whether there is a bad in the electrical path; Cause the derivative circuit /: The value change and the standard resistance value, the degenerative law is obtained;," I wide and the value change range is relative to the standard resistance value The resistance value of each conductive circuit in each quantity of the circuit board, and whether the change of the circuit board conforms to the change rule to confirm whether the conductive paths of the slave circuit are defective. The measurement circuit provided by the technical solution has a good resistance to the conduction circuit caused by the resistance::: over build. No: simple, conductive _ resistance and the car father can be acrobatics good broadcast 1 I as compared to X, ^ Whether there is a defect such as residual glue in the V electric path. 200913819 [Embodiment] - Refer to FIG. 1' The following steps are provided by the technical solution: The board defect test method includes the following steps: 1. Measuring the conductive paths in the circuit board The circuit board usually has a plurality of test points. General; car ^ value. The electrical resistance of the electronic performance test will be tested as needed. Refer to Figure 2, which is the basis, and 2: Which test points are to be measured in summer. The unintentional electrical path of the circuit board U) having the complex circuit through the s circuit board includes the conductive line 122 and the via hole 12: two, each of the pilots 14. And set at both ends of the test: test 50 to (10) chip board 1 各 each guide '^: ^ method to calculate the second resistance of each conductive circuit will be randomly distributed in the range of the value of two S ·; Q ^ These In the standard example, each conductive path measured is a flexible circuit board. < Known early resistance value of 0.01Ω to 2Ω test resistance can be used with flying probe four with high measurement accuracy, can be _ 彳. When testing a circuit board, the board must be pulled and the flying needle is used to measure the softness. This can affect the accuracy of the test, and the use of the tool. Referring to Fig. 3, it is not intended to measure the structure of the circuit board 10. The jig includes a bottom plate 20 and a top plate 22. Top plate - There are a plurality of through holes 24, and the position of the through holes 24 is corresponding to the circuit board 200913819. Referring to Fig. 4, the circuit board 10 is sandwiched between the bottom plate 20 and the top plate 22, and each test point 14 is exposed from the corresponding through hole %. The use of the bottom plate 20 and the top plate 22 to fix the circuit board 1〇 can avoid the problem of inaccurate testing caused by the shaking of the electric board 10. Step 2: Determine a plurality of conductive paths to be measured in the circuit board 10. The dry and early resistance values of the plural 待 ( ( 7 曾 曾 曾 曾 曾 曾 曾 曾 曾 曾 曾 曾 曾 曾 曾 曾 曾 曾 曾 曾 曾 曾 曾 曾 曾 曾 曾 曾 曾 曾 曾 曾 曾 曾 曾 曾 曾 曾 曾 曾 曾 曾 曾 曾 曾 曾 曾 曾The number of shirts, the final result, the more accurate the word. In this implementation, the total number of conductive paths in the middle and the middle is..., '唬Sl, s2, s3, ..., s21, s22, and the first, the first, and the first conductive path to be measured. The corresponding turtle resistance value should be between 〇〇0 050. ηιη 玍山, in turn, 0.01Ω, lead the thunder and you. The distribution of values to be measured is determined. For example, if the circuit is from the standard resistance of the circuit, there is no standard resistance for the resistance of the coffee circuit to be close to 0 1 Ω $ I + ^ U to the resistance of the standard welcoming (4) of the path board 10, for example 〇_. Y2. Measure the resistance value of each of the complex circuit boards and record the resistance change. The first six-way control of the burdock--the conductive path of the top target. V is to find the initial suspected bad guide + & : value change abnormality is based on the resistance caused by the defect = resistance compared to the conductive path due to poor residual glue: compared to the private resistance change usually 2 〇% or more. For other types of defects, if:: If the measurement of the 爻 呉 呉 之 之 可 可 可 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 1〇 is sequentially recorded as the circuit board Li, .....k. - Assume that the standard resistance value of a conductive path to be measured is Xn, and the resistance value of the actual measured value is Υη, and the resistance value change △ Υη=Υη_Χη, △ ΙΑ is the magnitude of its resistance change, if ΔΥη/Χη If it exceeds a predetermined range, for example, 20%, the number of the board and its resistance value change are shown in the corresponding cell in Table i. Since the conductive path is to be measured on the same-chip board, there may be multiple conductive paths recorded in :1. The measurement number of the board 1G is such that it is possible to record = to 10 bad conductive paths corresponding to each sampling point. When (4) more data, you can get more accurate results. For example, the standard path of the conductive path & on the circuit board Li is: 'The actual resistance value is (4) (10), and the variation range is super-view, so the board number, the circuit number and the resistance value are recorded: In the corresponding box in Table 1. Here, only the conductive path is taken as an example. The conductor path to be tested is the same as that of the other circuit board. -___ Table 1 The number of circuits to be measured is to be measured. The circuit resistance is 0.01Ω. The board number and its resistance value change~~一"" -----____________- L1-〇.〇〇4q .
11 20091381911 200913819
^驟二與步驟三可相互 =可能發現步驟二中確定之取樣點與; 吻合，例如，步驟_占士 、貝k个艮J月b亚不 準電阻1Ω之導電：/_=了取樣點1Ω，但實際測量時標 多，因此可調整步报少，標準電阻丄細之卻較 調整還應使各取點1以卿。當然上述 内。 7 ”，、車乂為均勻之分佈於整個電阻值區間 行切Γ八：：Γ且值變化幅度超出預定範圍之導電路徑進 仃切片分析以確認該導電路捏是否存於不良。進 該導之標準電阻值，某種不良導致 於20%-V:交化之幅度也不一樣，步驟二中採用之大 片分析進、彳=好估龍，並不料。因此需要通過切 經過觀荠：導:、七刀片分析時沿導電路徑進行切片。如果 之電阻值變化,己錚於#9士丄“貝咖導電路徑 不良導電路/ =中。由於每個取樣點對應有複數 包峪仏，因此電阻值變化也有複數。 表2 待测量导电 路怪編号 电阻值变化 待测量导电路 怪标准电阻 12 200913819^Step 2 and Step 3 can be mutually = It is possible to find that the sampling points determined in Step 2 are consistent with; for example, the steps _Zhanshi, Bei k 艮J month b, the sub-resistance resistance is 1 Ω, the conductivity: /_= sampling point 1Ω, but the actual measurement time scale is more, so the adjustment step can be less, the standard resistance is finer, but the adjustment should also make each point 1 clear. Of course within the above. 7", the rut is evenly distributed over the entire resistance value interval, and the conductive path is changed beyond the predetermined range to confirm the conduction of the conductive circuit. The standard resistance value, a certain defect leads to 20%-V: the amplitude of the intersection is not the same, the large-scale analysis used in the second step, 彳 = good estimate of the dragon, is not expected. Therefore, it is necessary to cut through the observation: : Seven-blade analysis is performed along the conductive path. If the resistance value changes, it is already in #9士丄"Beca conductive path bad conduction circuit / =. Since each sampling point corresponds to a plurality of packets, the resistance value also has a complex number. Table 2 Conductivity to be measured Road monster number Resistance value change Conductor to be measured Strange standard resistance 12 200913819
Si 0.01Ω ΔΥ11、ΔΥ12、…、ΔΥΐη S2 0.05Ω ΔΥ21、ΔΥ22、…、ΔΥ2η S3 0.1Ω ΔΥ31、ΔΥ32、…、ΔΥ3η S4 0.2Ω ΔΥ41、ΑΥ42、…、ΑΥ4η S5 0.3Ω ΔΥ51、ΔΥ52、…、ΔΥ5η … • · · … S21 1.9Ω ΔΥ211、ΔΥ212、…、△Υζΐη S22 2Ω ΔΥ221、ΔΥ222、…、ΔΥ22η 步驟五、分析不良導電路徑之電阻值變化與該導電路 徑之標準電阻值得出不良引起之導電路徑之電阻值變化範 圍相對於標準電阻之變化規律。 根據表2求出與每個取樣點對應之電阻值變化之最大 值與最小值。結果如表3所示。 表3 待测量导电 路怪编号 待测量导电路 怪标准电阻 电阻值变化 最大值 电阻值变化最小值 Si 0.01Ω Maxi Mini S2 0.05Ω Max2 Min2 S3 0.1Ω Max3 Min3 S4 0.2Ω Max4 Min4 S5 0.3Ω Max5 Min5 13 200913819 … • · · ^21 1.9Ω S22 2ΩSi 0.01 Ω ΔΥ11, ΔΥ12, ..., ΔΥΐη S2 0.05 Ω ΔΥ21, ΔΥ22, ..., ΔΥ2η S3 0.1Ω ΔΥ31, ΔΥ32, ..., ΔΥ3η S4 0.2Ω ΔΥ41, ΑΥ42, ..., ΑΥ4η S5 0.3Ω ΔΥ51, ΔΥ52, ..., ΔΥ5η ... · · · ... S21 1.9Ω ΔΥ211, ΔΥ212,...,△Υζΐη S22 2Ω ΔΥ221, ΔΥ222,...,ΔΥ22η Step 5: Analyze the change in the resistance value of the poor conductive path and the standard resistance of the conductive path. The variation of the resistance value relative to the standard resistance. According to Table 2, the maximum value and the minimum value of the resistance value change corresponding to each sampling point are obtained. The results are shown in Table 3. Table 3 The number of the circuit to be measured is to be measured. The circuit is blamed. The standard resistance value changes. The maximum value of the resistance value changes. Si 0.01Ω Maxi Mini S2 0.05Ω Max2 Min2 S3 0.1Ω Max3 Min3 S4 0.2Ω Max4 Min4 S5 0.3Ω Max5 Min5 13 200913819 ... • · · ^21 1.9Ω S22 2Ω
Max2l ~~--Max2l ~~--
Max22Max22
Min21 Min22 根據表3,採用回歸分析法 值X之變化，某種不良導致該導電路徑，電， 大值。△ Ymin=fmin(x)表示隨導電路經標二=、支=之取 某種不良導致該導電路徑之電阻值值x之隻化， 於某-個確定之導電路徑，其取小值。因此對 函數δυ -f rx^Av 丰电阻值x為確定，根據 w 歎 Δ Ymax_fmax(X)與 Δγ_ = ^η(χ)即 導致其電阻值變化之最大值鱼 /、不良所能 範圍。 /、 J值，亦即其電阻值變化 由於某種不良導致莫+Λ 电路搜電阻之變化範圍陏俨進中 阻值之變化規律於標準電阻值卢於Τ ' ，登砧•电丨值處於不同之範圍時不同，優 二驟Γ電阻值分為幾個區間，對每個區間分別進 : 到步驟五，分別求得每個區間内之ΔΥ _f⑵ 與△ Y_=fmin〇g。例如，根據羊 max -f_(x) 區間。 ·5Ω、0.5〜1〜2Ω四個 其電=對：:::=各導電路徑電阻值，並㈣ 定其是否為某變化是否符合阻值變化規律確 14 200913819 對於標準值為X之導電路徑，由△YnaaFfmaJX)與 ΔΥ‘=4ίη(Χ)分別求出aYmax與AYmin，如果實際測量得到之 電阻值Y處於ΔΥΜχ與ΔΥ^η之間，則該導電路徑屬於該種 不良品。 以上僅得到一種不良所導致之電阻值變化範圍規律， 可重複同樣之步驟確定各種不良之導致之電阻值變化範圍 規律。 本技術方案提供之測量電路板不良之方法通過建立| 路板不良對導電路徑電阻造成之變化與According to Table 3, Min21 Min22 uses the regression analysis method to change the value X. Some kind of defect leads to the conductive path, electricity, and large value. △ Ymin=fmin(x) indicates that the resistance value x of the conductive path is caused by a certain defect caused by the reference circuit ==, branch =, and the small value is taken for a certain determined conductive path. Therefore, the function δ υ -f rx^Av has a large resistance value x, and according to w sing Δ Ymax_fmax(X) and Δγ_ = ^η(χ), the maximum value of the resistance value of the fish is changed. /, J value, that is, the change in its resistance value due to some kind of failure, the variation of the range of the resistance of the circuit is not affected by the variation of the resistance value in the standard resistance value Lu Yuxi ', the anvil and the electric enthalpy value are at The difference between the different ranges is that the resistance value is divided into several intervals. For each interval, go to step 5. Find ΔΥ _f(2) and △ Y_=fmin〇g in each interval. For example, according to the sheep max -f_(x) interval. · 5Ω, 0.5~1~2Ω four electric=pair::::= resistance values of each conductive path, and (4) determine whether it is a change or not according to the resistance change law. 200913819 For the standard value of X conductive path AYmax and AYmin are respectively obtained from ΔYnaaFfmaJX) and ΔΥ'=4ίη(Χ), and if the actually measured resistance value Y is between ΔΥΜχ and ΔΥ^η, the conductive path belongs to the defective product. The above only obtains a rule of variation of the resistance value caused by a defect, and the same steps can be repeated to determine the range of variation of the resistance value caused by various defects. The method for measuring the fault of the circuit board provided by the technical solution is to change the resistance of the conductive path by establishing the bad board
可簡單測量導電路徑之電阻並將其與已經建立^ 準相比較’即可獲得該導電路徑是否不良。 之I 提出已符合發明專利之要件，遂依法 出專射d以上所述者僅為本發明 式，自不能以此限制本案之申於 b 實也方 技藝之人士援依本發明之精神；；:：凡熟悉本案 應涵蓋於以下申請專‘利範圍^作之以修飾或變化，皆 【圖式簡單說明】 圖1係本技術方案提佴 圖2传本# n安士 /、'、里電路板測試方法流程圖。 ^係本技㈣案巾待測量之電路板之示 ㈡ 圖 不 圖3係本技術方案測量 :圖 伋崎鉍用之冶具結構 電阻技術方案測量電路板時採用治具測量電路4 15 200913819 【主要元件符號說明】 電路板 10 導電線路 122 導通孔 124 測試點 14 底板 20 頂板 22 通孔 24 16It is possible to simply measure the resistance of the conductive path and compare it with the established voltage to obtain a defect in the conductive path. I propose that the requirements of the invention patent have been met, and that the above description is only for the purpose of the invention, and the person who applies to the skill of the case in this case can not rely on the spirit of the invention; ::Familiarity of the case should be covered in the following application. The scope of the application is modified or changed. [Simplified description of the diagram] Figure 1 is the technical scheme of the scheme. Figure 2 is transmitted # n安士/, ', Circuit board test method flow chart. ^系本技(4) The description of the circuit board to be measured (2) Figure 3 is the measurement of this technical solution: Figure 汲 铋 铋 冶 结构 结构 结构 结构 结构 测量 测量 测量 测量 测量 测量 4 4 4 4 4 4 Description of component symbols] Circuit board 10 Conductive line 122 Via hole 124 Test point 14 Base plate 20 Top plate 22 Through hole 24 16