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TW200830482A - Surface-mount housing for semiconductor chip - Google Patents

Surface-mount housing for semiconductor chip Download PDF

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Publication number
TW200830482A
TW200830482A TW096134152A TW96134152A TW200830482A TW 200830482 A TW200830482 A TW 200830482A TW 096134152 A TW096134152 A TW 096134152A TW 96134152 A TW96134152 A TW 96134152A TW 200830482 A TW200830482 A TW 200830482A
Authority
TW
Taiwan
Prior art keywords
lead frame
surface mount
wafer
cover
mount type
Prior art date
Application number
TW096134152A
Other languages
Chinese (zh)
Inventor
Georg Bogner
Rolf Hanggi
Thomas Zeiler
Original Assignee
Osram Opto Semiconductors Gmbh
Rolf Hanggi
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Osram Opto Semiconductors Gmbh, Rolf Hanggi filed Critical Osram Opto Semiconductors Gmbh
Publication of TW200830482A publication Critical patent/TW200830482A/en

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Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/85Packages
    • H10H20/8506Containers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49861Lead-frames fixed on or encapsulated in insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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Abstract

This invention concerns a surface-mount housing for at least a semiconductor chip, this housing has at least a plastic housing part (1) and a conductor frame (2). The main features of the surface-mount housing is: the conductor frame (2) has at least a gap (4) and at least a recess (5), and the housing part (1) engages into gap (4) and recess (5) in order to be fixed in conductor frame (2).

Description

200830482 九、發明說明: 【發明所屬之技術領域】 本發明係一種具有如申請專利範圍第1項之特徵的用 於至少一個半導體晶片的表面安裝式外罩。 【先前技術】 本專利申請要求享有德國專利申請10 2006 043 404.8 之優先權。 國際專利WO 02/084749 A2提出一種具有一個塑膠製外 罩部分及一個導線架的用於光電半導體晶片的表面安裝式 外罩。這種外罩具有一個設置在散熱片上的晶片安裝面。使 光電半導體晶片形成導電接觸的導電架是以階梯狀的方式 從塑膠外罩被引出,並具有一個從外罩側面伸出的連接條。 在這一類的表面安裝式LED外罩中,導線架通常是以 澆注法與塑膠外罩被壓力注塑包封在一起。通常是以一種 熱固性塑膠(例如一種環氧樹脂)作爲製造外罩的材料。使 用熱固性塑膠的優點是可以減少因爲製造導線架的材料 (例如銅)和塑膠外罩的材料具有不同的熱膨脹係數而產生 的熱機械應力。此外,在將環氧樹脂的表面和銅接合時通 常可以形成具有良好的物理及化學特性的接合面,因此塑 膠外罩在導線架中的機械式錨定並不重要。 【發明內容】 本發明之目的是提出一種用於至少一個半導體晶片 (尤其是光電半導體晶片)的經過改良的外罩,這種外罩的 特徵是導線架是以更好的方式被固定在塑膠外罩中。在本 200830482 發明中,導線架應以很好的方式被錨定在外罩中,因此即 使是以價格低廉的熱塑性塑膠作爲製造外罩的材料也沒關 係。 採用具有如申請專利範圍第〗項之特徵的表面安裝式 外罩就可以達到上述目的。本發明之各種有利的實施方式 及改良方式均記載於附屬申請專利項目中。 本發明的用於至少一個半導體晶片(尤其是光電半導 體晶片)的表面安裝式外罩具有至少一個塑膠製的外罩部 f 分,以及一個導線架,其中導線架具有一個供至少一個半 導體安裝用的晶片安裝面。此外,導線架還具有至少一個 間隙及至少一個凹槽,外罩部分可以嵌入間隙及凹槽,以 固定在導線架中。 • 由於外罩部分可以嵌入間隙及凹槽,因此能夠以'很穩 固的方式將外罩部分固定在導線架中。 導線架最好是一種扁平式導線架。扁平式導線架可以 在同一個平面上具有多個厚度不同的子區域。扁平式導線 k 架除了凹槽部分的厚度較小外(例如因爲壓鑄的關係使厚 度變小),扁平式導線架的其他部分都沒有梯級 (stepping),也沒有彎曲。 在本發明的表面安裝式外罩中,即使導線架的厚度比 較薄,外罩部分也能夠相當穩固的被固定在導線架中。導 線架的厚度d應在0.1mm(含)以上至1mm(含)以下之間,而 且最好是介於〇.2mm(含)與0.5mm(含)之間。 導線架具有的至少一個凹槽的深度t應介於導線架之 200830482 厚度d的3 0%至7 0%之間,而且最好是介於導線架之厚度d 的40%至60%之間。 即使外罩部分是以熱塑性塑膠製成,也能夠具有足夠 的力學穩定性。相較於以熱固性塑膠(尤其是環氧樹脂)作 爲製造外罩的材料,以價格較低的熱塑性塑膠作爲製造外 罩的材料的優點是可以降低外罩的製造成本。 導線架的間隙最好是穿孔。此外,最好是以壓鑄法製 造出導線架的凹槽,也就是導線架上厚度較薄的區域。也 可以使用在製造上比較簡單的成型法及沖壓法以很薄的金 屬爲材料造出導線架。以這些方法製造導線架都不需進行 麻煩的切削步驟或飩刻步驟。 本發明的一種有利的實施方式是將導線架的間隙設置 在凹槽中。同時一方面使外罩的一部分緊靠在凹槽邊緣, 外罩的另外一部分則嵌入導線架的間隙,以便將外罩部分 固定在導線架中。 例如可以將凹槽設置在導線架的一個位於晶片安裝面 之對面的底面上。在這種情況下,外罩部分最好是從導線 架的底面嵌入間隙及凹槽內。 根據本發明的一種有利的實施方式,外罩部分分成上 半段及下半段,其中外罩部分的下半段是固定在導線架 中。因此在這種實施方式後最好是將下半段的外形設計成 能夠使外罩穩固的被錨定在導線架中,而上半段的外形則 是依據外罩在功能上的需求來設計。例如可以將外罩部分 的上半段設計成具有一個用於光電半導體晶片之反射壁’ 200830482 而此光電半導體晶片係設置在導線架的晶片安裝面上。 根據本發明的另外一種有利的實施方式,晶片安裝面 的一個背面在導線架中被間隙及/或凹槽環繞住。在這種實 施方式中,晶片安裝面的背面最好具有一個與間隙及/或凹 槽緊鄰的壓鑄邊緣。形成於晶片安裝面的背面上的壓鑄邊 緣最好是將晶片安裝面的整個背面環繞住。外罩部分最好 是放置在壓鑄邊緣上,這樣做的好處是可以使外罩部分在 導線架中的固定更爲穩固。 根據本發明的另外一種有利的實施方式,導線架的另 外一個背對晶片安裝面的底面與外罩部分的一個底面構成 一個平坦面。在這個平坦平上外罩可以平穩的放置在一個 載體上,例如放置在一片印刷電路板上,而且在這片印刷 電路板上設有與安裝在晶片安裝面上的半導體晶片形成導 電接觸的導線。 爲了改善光電半導體晶片的散熱,一種有利的實施方 式是使導線架之晶片安裝面的背面不要被塑膠製的外罩部 分覆蓋住。根據這種實施方式,外罩可以直接放置在一個 載體上,而且這個載體最好是具有散熱作用,或是和散熱 片連接在一起。 本發明的一種有利的實施方式是以壓鑄或注塑的方式 將導線架和塑膠製的外罩部分一起成型。利用這種方式可 以降低外罩的製造成本。 爲了與半導體晶片形成導電接觸,最好是在導線架的 一個背對晶片安裝面的底面上設置接觸面,而且最好是將 200830482 這些接觸面設置在外罩部分內。導線架最好是不要從外覃 部分的側面伸出’這樣就可以縮小外罩的橫向尺寸。 使用扁平式導線架也可以達到縮小外罩的縱向尺寸的 目的。縮小外罩的尺寸不但可以減少材料的使用量,而旦 可以提高外罩的封裝密度。 本發明的一種有利的實施方式是在導線架的晶片安裝 面上至少安裝一個半導體晶片(尤其是光電半導體晶片)。 另外一種可行方式是在外罩的晶片安裝面上安裝多個半導 ^ 體晶片。 如果所安裝的是光電半導體晶片,則最好一種是LED 或半導體雷射二極體,尤其是一種高功率LED晶片。高功 率LED晶片的輻射功率應大於〇·2 W,或最好是大於0.5 W 〇 【實施方式】 以下配合第1圖至第5圖及實施例對本發明的內容做 進一步的說明。 C : I 相同或相同作用的元件在所有的圖式中均以相同的元 件符號標示。以上圖式中的元件並非按比例尺繪製,有時 爲了便於說明或理解而將某些元件繪製得特別大。 第1、2、3圖是分別從不同的方向觀察一個用於半導 體晶片的表面安裝式外罩,尤其是一種用於光電半導體晶 片的表面安裝式外罩,而且特別適用於安裝一個或多個 LED晶片(未在圖式中繪出)。這種表面安裝式外罩具有一 個塑膠製的外罩部分(1)及一個導線架(2)。導線架(2)在外 200830482 罩部分(i)內有一部分是沒有被蓋住的,這個部分構成一個 晶片安裝面(3)。 可以將一個光電半導體晶片安裝在晶片安裝面(3) 上,例如以焊接方式安裝。也可以將多個半導體晶片安裝 在晶片安裝面(3)上而形成所謂的多晶片 LED(multi-Chip-LED)。 在導線架(2)上有兩個凹槽(5)。在這兩個凹槽部分(也 就是導線架(2)的子區域)的導線架(2)的厚度d比較小,而 ( 且最好是以壓鑄法在導線架(2)上形成凹槽(5)。 凹槽的壓鑄深度t以介於導線架(2)之厚度d的30%至 70%之間爲佳,而且最好是介於導線架(2)之厚度d的40% 至60%之間。 導線架的厚度d以在0.1mm(含)及1mm(含)之間爲佳, 而且最好是在0.2mm(含)及0.5mm(含)之間。最好是以三種 扁平的金屬帶(尤其是銅帶)作爲製造導線架(2)的材料。 最好是根據安裝在晶體安裝面(3 )上的半導體晶片的。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 [Prior Art] This patent application claims priority to German Patent Application No. 10 2006 043 404.8. International Patent No. WO 02/084749 A2 proposes a surface mount housing for an optoelectronic semiconductor wafer having a plastic outer cover portion and a lead frame. The housing has a wafer mounting surface disposed on the heat sink. The conductive frame that forms the conductive contact of the optoelectronic semiconductor wafer is led out of the plastic cover in a stepped manner and has a connecting strip extending from the side of the outer cover. In this type of surface mount LED housing, the lead frame is typically overmolded with a plastic cover by casting. A thermosetting plastic (such as an epoxy resin) is usually used as the material for the outer cover. The advantage of using thermoset plastics is that the thermomechanical stresses due to the different coefficients of thermal expansion of the materials used to make the leadframe (e.g., copper) and the plastic cover can be reduced. In addition, the bonding surface having good physical and chemical properties can usually be formed when the surface of the epoxy resin is bonded to the copper, so that the mechanical anchoring of the plastic cover in the lead frame is not important. SUMMARY OF THE INVENTION It is an object of the invention to provide an improved housing for at least one semiconductor wafer, in particular an optoelectronic semiconductor wafer, which is characterized in that the lead frame is better secured in the plastic housing . In the invention of 200830482, the lead frame should be anchored in the outer cover in a good manner, so that it is irrelevant even if the inexpensive thermoplastic is used as the material for the outer cover. This can be achieved by using a surface mount enclosure having the features of the scope of the patent application. Various advantageous embodiments and improvements of the present invention are described in the dependent patent application. The surface mount housing of the present invention for at least one semiconductor wafer, in particular an optoelectronic semiconductor wafer, has at least one plastic cover portion f, and a lead frame, wherein the lead frame has a wafer for at least one semiconductor mounting Mounting surface. In addition, the lead frame also has at least one gap and at least one recess, and the cover portion can be embedded in the gap and the recess for fixing in the lead frame. • Since the cover part can be inserted into the gap and the groove, the cover part can be fixed in the lead frame in a very stable manner. The lead frame is preferably a flat lead frame. The flat lead frame can have multiple sub-areas with different thicknesses on the same plane. The flat wire k frame has no thickness in addition to the small thickness of the groove portion (for example, the thickness is reduced due to die casting), and the other portions of the flat wire frame have no stepping and no bending. In the surface mount type cover of the present invention, even if the thickness of the lead frame is thinner, the cover portion can be relatively stably fixed in the lead frame. The thickness d of the wire guide should be between 0.1 mm or more and 1 mm or less, and preferably between 〇2 mm (inclusive) and 0.5 mm (inclusive). The lead frame has a depth t of at least one groove which is between 30% and 70% of the thickness d of the 200830482 lead frame, and preferably between 40% and 60% of the thickness d of the lead frame. . Even if the outer cover portion is made of a thermoplastic plastic, it can have sufficient mechanical stability. Compared with thermosetting plastics (especially epoxy resins) as the material for the outer cover, the advantage of using a lower-priced thermoplastic plastic as a material for the outer cover is that the manufacturing cost of the outer cover can be reduced. The gap of the lead frame is preferably perforated. Further, it is preferable to form the groove of the lead frame by die casting, that is, the thinner portion of the lead frame. It is also possible to use a relatively simple molding method and a stamping method to form a lead frame from a very thin metal material. Manufacturing the leadframe by these methods does not require a cumbersome cutting step or engraving step. An advantageous embodiment of the invention is to arrange the gap of the leadframe in the recess. At the same time, on the one hand, a part of the outer cover abuts against the edge of the groove, and another part of the outer cover is embedded in the gap of the lead frame to fix the outer cover part in the lead frame. For example, the recess can be placed on a bottom surface of the leadframe opposite the wafer mounting surface. In this case, the cover portion is preferably embedded in the gap and the recess from the bottom surface of the lead frame. According to an advantageous embodiment of the invention, the outer cover portion is divided into an upper half and a lower half, wherein the lower half of the outer cover portion is fixed in the lead frame. Therefore, after this embodiment, it is preferable to design the lower half of the outer shape so that the outer cover can be anchored in the lead frame, and the upper half of the outer shape is designed according to the functional requirements of the outer cover. For example, the upper half of the housing portion can be designed to have a reflective wall '200830482 for an optoelectronic semiconductor wafer that is disposed on the wafer mounting surface of the leadframe. According to a further advantageous embodiment of the invention, a back side of the wafer mounting surface is surrounded by gaps and/or grooves in the lead frame. In this embodiment, the back side of the wafer mounting surface preferably has a die cast edge adjacent the gap and/or the recess. The die-cast edge formed on the back surface of the wafer mounting surface preferably surrounds the entire back surface of the wafer mounting surface. The outer cover portion is preferably placed on the die cast edge to provide a more secure attachment of the outer cover portion to the lead frame. According to a further advantageous embodiment of the invention, the other one of the bottom surface of the lead frame facing away from the wafer mounting surface forms a flat surface with a bottom surface of the housing portion. In this flat flat housing, it can be placed smoothly on a carrier, for example on a printed circuit board, and a conductor which is in conductive contact with a semiconductor wafer mounted on the wafer mounting surface is provided on the printed circuit board. In order to improve the heat dissipation of the optoelectronic semiconductor wafer, an advantageous embodiment is such that the back surface of the wafer mounting surface of the lead frame is not covered by the plastic cover portion. According to this embodiment, the outer cover can be placed directly on a carrier, and the carrier preferably has a heat dissipation effect or is coupled to the heat sink. An advantageous embodiment of the invention is to die-cast or injection-mold the leadframe together with the plastic cover portion. In this way, the manufacturing cost of the outer cover can be reduced. In order to form an electrically conductive contact with the semiconductor wafer, it is preferred to provide a contact surface on a bottom surface of the lead frame that faces away from the wafer mounting surface, and preferably these contact surfaces are disposed in the housing portion of 200830482. Preferably, the lead frame does not protrude from the side of the outer rim portion. This reduces the lateral dimension of the outer cover. The use of a flat lead frame also achieves the purpose of reducing the longitudinal dimension of the outer cover. Reducing the size of the outer cover not only reduces the amount of material used, but also increases the packing density of the outer cover. An advantageous embodiment of the invention is to mount at least one semiconductor wafer (especially an optoelectronic semiconductor wafer) on the wafer mounting surface of the leadframe. Another possibility is to mount a plurality of semiconductor wafers on the wafer mounting surface of the housing. If an optoelectronic semiconductor wafer is mounted, the preferred one is an LED or semiconductor laser diode, especially a high power LED wafer. The radiation power of the high power LED chip should be greater than 〇·2 W, or preferably greater than 0.5 W 实施. [Embodiment] The contents of the present invention will be further described below with reference to Figs. 1 to 5 and the embodiment. C: I The same or equivalent elements are marked with the same element symbol in all figures. The elements in the above figures are not drawn to scale, and some elements are sometimes drawn particularly large for ease of illustration or understanding. Figures 1, 2, and 3 are a surface mount type cover for a semiconductor wafer viewed from different directions, in particular, a surface mount type cover for an optoelectronic semiconductor wafer, and are particularly suitable for mounting one or more LED chips. (not drawn in the drawing). The surface mount housing has a plastic cover portion (1) and a lead frame (2). The lead frame (2) is outside. The part of the cover part (i) of the 200830482 is not covered. This part constitutes a wafer mounting surface (3). An optoelectronic semiconductor wafer can be mounted on the wafer mounting surface (3), for example by soldering. It is also possible to mount a plurality of semiconductor wafers on the wafer mounting surface (3) to form a so-called multi-chip-LED. There are two grooves (5) on the lead frame (2). The thickness d of the lead frame (2) in the two groove portions (i.e., the sub-area of the lead frame (2)) is relatively small, and (and preferably the groove is formed on the lead frame (2) by die casting) (5) The die casting depth t of the groove is preferably between 30% and 70% of the thickness d of the lead frame (2), and preferably between 40% and 40% of the thickness d of the lead frame (2) Between 60%. The thickness d of the lead frame is preferably between 0.1 mm (inclusive) and 1 mm (inclusive), and preferably between 0.2 mm (inclusive) and 0.5 mm (inclusive). Three flat metal strips (especially copper strips) are used as the material for manufacturing the lead frame (2). Preferably, it is based on a semiconductor wafer mounted on the crystal mounting surface (3).

I 功率決定導線架的厚度d。例如,如果安裝的是低功率的 LED,則可以使用厚度很薄的導線架(2),如果安裝的是高 功率的LED(因此熱容量較大),則最好是使用厚度較大的 導線架(2)。 外罩部分(1)從導線架(2)的一個底面(6)嵌入導線架(2) 上的凹槽(5),因而使外罩部分(1)被固定在導線架(2)中。 在兩個凹槽(5)中的一個凹槽內有形成一個間隙(4),外 罩部分(1 )亦有嵌入這個間隙(4 )。經由這種方式外罩部分 -10- 200830482 (1)在導線架(2)中的固定可以達到很好的力學穩定性。 間隙(4)最好是一個穿孔,這樣做的好處是有助於降低 導線架(2)的製造成本,因爲製作穿孔不需用到比較費事的 切削或蝕刻程序。 爲了進一步降低表面安裝式外罩的製造成本,一種有 利的方式是以熱塑性塑膠作爲製造外罩部分(1)的材料。之 所以能夠以熱塑性塑膠作爲製造外罩部分(1)的材料是因 爲外罩部分(1)經由凹槽(5)及間隙(4)在導線架(2)中的固定 (" 具有很好的力學穩定性,因此即使是製造外罩部分(1)的塑 膠和製造導線架(2)的材料(例如銅)具有不同膨脹係數亦無 妨。 導線架(2)最好是一種扁平式導線架,所謂扁平式導線 架是指除了壓鑄形成的凹槽(5)及沖形成的穿孔(4)外,整個 導線架都具有一個平坦的表面。尤其是導線架(2)的各個厚 度不同的子區域都是在同一個平面上。 在製造外罩時,最好是以壓鑄或注塑的方式將導線架 1' U (2)和外罩部分(1) 一起成型。 凹槽(5)最好是位於導線架(2)的一個位於晶片安裝面 (3)之對面的底面(6)上。在這種情況下,外罩部分(1)是從 導線架(2)的底面(6)嵌入間隙(4)及兩個凹槽(5)內。也就是 說’外罩部分(1)在導線架(2)中的錨定是在外罩部分(1)的 一個底面(11 )上進行的,因此在設計外罩部分(1)的上半段 的形狀時可以有很大自由度。 例如可以將外罩部分(1 )的上半段設計成具有一個反 -11- 200830482 射壁(10),其作用是將安裝在晶片安裝面(3)上的光電半導 體晶片發出的輻射反射到光電半導體晶片的一個反射方 向,以避免外罩部分(1)吸收輻射。 此外,可以在外罩部分(1)中環繞晶片安裝面(3)設置安 裝孔(8),以便利用這些安裝孔(8)將其他的元件固定在外罩 部分(1)的一個頂面上。例如可以利用安裝孔(8)將使光電半 導體晶片發出的輻射射束成型的光學元件固定在外罩部分 ⑴上。 f ^ 在導線架(2)背對晶片安裝面(3)的一個底面上至少具 有兩個能夠與安裝在晶片安裝面(3)上的半導體晶片形成 導電接觸的接觸面(7)。可以利用間隙(4)使接觸面(7)在導 - 線架(2)中彼此電絕緣。例如晶片安裝面(3)與其中一個接觸 - 面(7)形成導電連接。一個安裝在晶片安裝面(3)上的半導體 晶片可以經由一條壓焊絲與導線架(2)的一個與另外一個 接觸面(7)連接的區域連接,這樣半導體晶片就可以與另外 一個接觸面(7)形成導電連接。 / ^ 安裝在晶片安裝面(3 )上的半導體晶片可以是一種光 電半導體晶片,尤以一種輻射功率爲0.2 W或更高的高功 率LED晶片爲佳,或最好是一種輻射功率爲0.5 W以上的 高功率LED晶片。此外,本發明的表面安裝式外罩亦適用 於半導體雷射二極體,尤其是一種可表面安裝的半導體雷 射二極體,例如VCSEL或VECSEL。 如果是用於高功率半導體晶片(例如高功率LED或半 導體雷射二極體),則導線架(2)的一個位於晶片安裝面(3) 200830482 之對面的背面(9)最好是不要被塑膠製的外罩部分(1)覆蓋 住。這樣做的好處是可以改善安裝在晶片安裝面(3)上的半 導體晶片的散熱。一種有利的方式是將表面安裝式外罩安 裝在一個適於將半導體晶片產生的熱排出的載體上。這種 載體最好是以陶瓷材料製成,例如一種以A1N爲材料製成 的載體。此外,也可以將外罩安裝在一個由散熱片構成的 載體上,或是安裝在一個具有散熱片的載體上。 在以下提及的實施例中,導線架(2)上設有接觸面(7) ί 的子區域會從外罩部分(1)的側面伸出。 另外一種可行的方式是將導線架(2)的接觸面(7)設置 在外罩部分(1)內。第4圖顯示的實施例使用的就是這種方 - 式。 從第4圖顯示的外罩的下視圖可以看出,導線架(2)沒 有在任何一個位置從從外罩部分(1)的側面伸出,尤其是整 個接觸面(7)都位於外罩部分(1)內。這樣做的好處是可以縮 小外罩的整體尺寸,因而達到減少材料的使用量,以及提 V 高外罩在載體上的封裝密度。 在第二個實施例中,導線架(2)的一個背對晶片安裝面 (3)的底面(6)與外罩部分(1)的一個底面(11)構成一個平坦 面。這樣做的好處是只需用很簡單的方式就可以將外罩安 裝在一個平坦的載體上,而且可以達到較高的力學穩定性。 除此之外,第4圖顯示的外罩基本上和第1圖至第3 圖顯示的外罩是一樣的。因此前面關於第1圖至第3圖顯 示之外罩的有利的實施方式的說明亦適用於第4圖顯示的 -13- 200830482 外罩。 第5圖的透視圖顯示在第三個實施例中,外罩及導線 架在製造完成後尙未被分開成單一的外罩之前的情況。 第5圖的左半部顯示以壓鑄或注塑的方式和塑膠製的 外罩部分(1)一起成型的導線架(2)。 爲了更清楚的呈現導線架(2)及外罩部分(1)的結構,以 及外罩部分(1)在導線架(2)中的配置方式,因此第5圖的右 上方顯示出外罩部分(1)及導線架(2)的一個斷面圖。此外, f 第5圖的右下方則另外顯示一個沒有塑膠製的外罩部分(1) 的導線架(2)。 在第5圖的實施例中,晶片安裝面(3)的一個背面(9) 在導線架(1)中被間隙(4)及凹槽(5)環繞住。在凹槽(5)中分 別有形成另外一個間隙(4),同時外罩部分(1)從下方嵌入此 另外形成的間隙(4)。晶片安裝面(3)的背面(9)具有一個壓 鑄邊緣(12)。外罩部分(1)從下方嵌入壓鑄邊緣(12),因此 可以進一步提高外罩部分(1)固定在導線架(2)中的力學穩 (. 定性。 壓禱邊緣(12)最好是將晶片安裝面(3)的背面(9)整個 環繞住。在將導線架(2)和外罩部分(1)壓鑄在一起後’導線 架(2)的壓鑄邊緣(12)就放置在外罩部分(1)上。 和第4圖顯示的實施例一樣,導線架(2)的一個底面(6) 和外罩部分(1)的一個底面(11)最好是構成一個平坦的面。 從右上方的斷面圖可以看出’有一個半導體晶片(13) 安裝在晶片安裝面(3)上。 -14- 200830482 半導體晶片(1 3 )可以是一種光電半導體晶片,例如一 種LED晶片或雷射二極體。 由於晶片安裝面(3)的背面(9)並未被外罩部分(1)覆蓋 住,因此半導體晶片(1 3 )產生的熱可以經由導線架(2)被傳 導到一個載體上。因此本發明的表面安裝式外罩特別適用 於高功率LED晶片,尤其是輻射功率至少〇·2 W或甚至是 至少0.5 W的高功率LED晶片。 本發明的範圍並非僅限於以上所舉的實施方式。每一 種新的特徵及兩種或兩種以上的特徵的所有組合方式(尤 其是申請專利範圍中提及的特徵的所有組合方式)均屬於 本發明的範圍,即使這些特徵或特徵的組合方式未在本說 明書之說明部分或實施方式中被明確指出。 【圖式簡單說明】 第1圖:本發明之表面安裝式外罩的第一個實施例的 斷面圖。 第2圖:表面安裝式外罩的第一個實施例的下視圖。 第3圖:表面安裝式外罩的第一個實施例的透視圖。 第4圖:本發明之表面安裝式外罩的第二個實施例的 下視圖。 第5圖:本發明之表面安裝式外罩的第三個實施例的 透視圖。 【主要元件符號說明】 1 外罩部分 2 導線架 200830482 3 晶 片 安 裝 面 4 間 隙 5 凹 槽 6 導 線 架 的 底 面 7 接 hsm 觸 面 8 安 裝 孔 9 晶 片 安 裝 面 的背面 10 反 射 壁 11 外 罩 的 底 面 12 壓 鑄 邊 緣 13 半 導 體 晶 片The I power determines the thickness d of the lead frame. For example, if you install a low-power LED, you can use a very thin lead frame (2). If you install a high-power LED (and therefore a large heat capacity), it is best to use a thicker lead frame. (2). The cover portion (1) is fitted into the recess (5) of the lead frame (2) from a bottom surface (6) of the lead frame (2), thereby fixing the cover portion (1) in the lead frame (2). A gap (4) is formed in one of the two grooves (5), and the cover portion (1) is also embedded in the gap (4). In this way, the cover portion -10- 200830482 (1) fixing in the lead frame (2) can achieve good mechanical stability. The gap (4) is preferably a perforation, which has the advantage of helping to reduce the manufacturing cost of the leadframe (2) because the fabrication of the perforations does not require a relatively laborious cutting or etching process. In order to further reduce the manufacturing cost of the surface mount type cover, it is advantageous to use thermoplastic plastic as the material for manufacturing the cover portion (1). The reason why thermoplastic plastic can be used as the material for manufacturing the outer cover portion (1) is because the outer cover portion (1) is fixed in the lead frame (2) via the groove (5) and the gap (4) (" has good mechanics Stability, so even the plastic that makes the cover part (1) and the material (such as copper) that makes the lead frame (2) have different expansion coefficients. The lead frame (2) is preferably a flat lead frame, so-called flat The lead frame means that the entire lead frame has a flat surface except for the groove (5) formed by die casting and the punched hole (4). In particular, the sub-areas of different thicknesses of the lead frame (2) are On the same plane. When manufacturing the cover, it is preferable to form the lead frame 1' U (2) and the cover portion (1) together by die casting or injection molding. The groove (5) is preferably located on the lead frame ( 2) a bottom surface (6) opposite the wafer mounting surface (3). In this case, the housing portion (1) is embedded in the gap (4) and the two from the bottom surface (6) of the lead frame (2) Inside the groove (5). That is to say 'the cover part (1) is in the lead frame (2) The anchoring is carried out on a bottom surface (11) of the outer cover portion (1), so that there is a great degree of freedom in designing the shape of the upper half of the outer cover portion (1). For example, the outer cover portion (1) The upper half is designed to have a counter--11-200830482 shot wall (10) that reflects the radiation emitted by the optoelectronic semiconductor wafer mounted on the wafer mounting surface (3) to a direction of reflection of the optoelectronic semiconductor wafer. In order to prevent the cover portion (1) from absorbing radiation. Further, mounting holes (8) may be provided around the wafer mounting surface (3) in the cover portion (1) to fix other components to the cover portion by means of these mounting holes (8). On a top surface of (1), for example, an optical element for forming a radiation beam emitted from an optoelectronic semiconductor wafer can be fixed to the cover portion (1) by means of a mounting hole (8). f ^ The wafer holder (2) is mounted on the back of the wafer The bottom surface of the surface (3) has at least two contact faces (7) capable of making electrical contact with the semiconductor wafer mounted on the wafer mounting surface (3). The contact surface (7) can be guided by the gap (4). - Wire rack 2) Electrically insulated from each other. For example, the wafer mounting surface (3) forms an electrically conductive connection with one of the contact faces (7). A semiconductor wafer mounted on the wafer mounting surface (3) can be connected to the lead frame via a bonding wire (2) One of the regions connected to the other contact surface (7) is connected so that the semiconductor wafer can be electrically connected to the other contact surface (7). / ^ The semiconductor wafer mounted on the wafer mounting surface (3) can be a kind An optoelectronic semiconductor wafer, particularly a high power LED chip having a radiation power of 0.2 W or higher, or preferably a high power LED wafer having a radiation power of 0.5 W or more. In addition, the surface mount type cover of the present invention is also Suitable for semiconductor laser diodes, especially a surface mountable semiconductor laser diode such as VCSEL or VECSEL. If it is used for high power semiconductor wafers (such as high power LEDs or semiconductor laser diodes), then the back side (9) of the lead frame (2) located opposite the wafer mounting surface (3) 200830482 is preferably not to be The plastic cover part (1) is covered. This has the advantage of improving the heat dissipation of the semiconductor wafer mounted on the wafer mounting surface (3). One advantageous way is to mount the surface mount housing on a carrier adapted to discharge heat generated by the semiconductor wafer. The carrier is preferably made of a ceramic material such as a carrier made of A1N. Alternatively, the cover may be mounted on a carrier formed of a heat sink or mounted on a carrier having a heat sink. In the embodiment mentioned below, a sub-area on the lead frame (2) provided with a contact surface (7) ί will protrude from the side of the cover portion (1). Another possible way is to place the contact surface (7) of the lead frame (2) in the housing portion (1). The embodiment shown in Figure 4 uses this formula. As can be seen from the lower view of the housing shown in Fig. 4, the lead frame (2) does not protrude from the side of the housing portion (1) at any one position, in particular the entire contact surface (7) is located in the housing portion (1) )Inside. This has the advantage of reducing the overall size of the outer cover, thereby reducing the amount of material used and the packing density of the V-high cover on the carrier. In the second embodiment, a bottom surface (6) of the lead frame (2) facing away from the wafer mounting surface (3) and a bottom surface (11) of the housing portion (1) constitute a flat surface. The advantage of this is that the housing can be mounted on a flat carrier in a very simple manner and achieves high mechanical stability. In addition, the cover shown in Fig. 4 is basically the same as the cover shown in Figs. 1 to 3. Therefore, the foregoing description of the advantageous embodiment of the outer cover with respect to Figs. 1 to 3 also applies to the -13-200830482 cover shown in Fig. 4. The perspective view of Fig. 5 shows the case where the outer cover and the lead frame are not separated into a single outer cover after the manufacture is completed in the third embodiment. The left half of Fig. 5 shows a lead frame (2) formed by die-casting or injection molding together with a plastic cover portion (1). In order to more clearly show the structure of the lead frame (2) and the cover portion (1), and the arrangement of the cover portion (1) in the lead frame (2), the cover portion (1) is shown at the upper right of Fig. 5. And a cross-sectional view of the lead frame (2). In addition, f on the lower right side of Figure 5 shows a lead frame (2) without a plastic cover part (1). In the embodiment of Fig. 5, a back surface (9) of the wafer mounting surface (3) is surrounded by the gap (4) and the recess (5) in the lead frame (1). In the groove (5), another gap (4) is formed, respectively, while the cover portion (1) is embedded in the additionally formed gap (4) from below. The back side (9) of the wafer mounting surface (3) has a die cast edge (12). The cover portion (1) is embedded into the die-cast edge (12) from below, so that the mechanical stability of the cover portion (1) fixed in the lead frame (2) can be further improved (. Qualitative. The edge of the pray (12) is preferably mounted on the wafer. The back surface (9) of the face (3) is entirely surrounded. After the lead frame (2) and the cover portion (1) are die-cast together, the die-cast edge (12) of the lead frame (2) is placed on the cover portion (1). As with the embodiment shown in Fig. 4, a bottom surface (6) of the lead frame (2) and a bottom surface (11) of the outer cover portion (1) preferably constitute a flat surface. It can be seen that there is a semiconductor wafer (13) mounted on the wafer mounting surface (3). -14- 200830482 The semiconductor wafer (13) can be an optoelectronic semiconductor wafer, such as an LED wafer or a laser diode. Since the back surface (9) of the wafer mounting surface (3) is not covered by the cover portion (1), heat generated by the semiconductor wafer (13) can be conducted to a carrier via the lead frame (2). Surface mount housing is especially suitable for high power LED chips, especially A high power LED wafer having a radiation power of at least 2 W or even at least 0.5 W. The scope of the invention is not limited to the embodiments set forth above. Each of the new features and all of the two or more features Combinations, in particular, all combinations of the features mentioned in the claims, are intended to be within the scope of the invention, even if the combinations of the features or features are not explicitly indicated in the description or the embodiments of the specification. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a cross-sectional view showing a first embodiment of a surface mount type cover of the present invention. Fig. 2 is a bottom view of a first embodiment of a surface mount type cover. Fig. 3: Surface mounting A perspective view of a first embodiment of the outer cover of the present invention. Fig. 4 is a bottom view of a second embodiment of the surface mount type cover of the present invention. Fig. 5 is a third embodiment of the surface mount type cover of the present invention. Perspective view [Main component symbol description] 1 Cover part 2 Lead frame 200830482 3 Wafer mounting surface 4 Clearance 5 Groove 6 The bottom surface of the lead frame 7 Connect to hsm The bottom surface of the wafer back surface 9 faces the mounting surface of the mounting hole 8 the reflection wall 10 of the cover 11 the outer edge of the die casting 12 semiconductor wafer 13

-16-16

Claims (1)

200830482 十、申請專利範圍: 1· 一種用於至少一個半導體晶片的表面安裝式外罩,具有 至少一個塑膠製外罩部分(1)及一個導線架(2),表面安裝 式外罩的特徵爲: -導線架(2)具有一個供至少一個半導體安裝用的晶片安 裝面(3); -導線架(2)具有至少一個間隙(4)及至少一個凹槽(5);以 及 ( _外罩部分(1)可以嵌入間隙(4)及凹槽(5),以固定在導線 架(2)中。 2 ·如申請專利範圍第1項的表面安裝式外罩,其中,導線 架(2)是一種扁平式導線架。 * 3 ·如申請專利範圍第1項或第2項的表面安裝式外罩,其 中’導線架(2)的厚度d在〇.imm(含)及lmm(含)之間。 4 ·如前述申請專利範圍中任一項的表面安裝式外罩,其 中,凹槽的深度t介於導線架之厚度d的3 0 % (含)至 {: ^ 70%(含)之間。 5 ·如前述申請專利範圍中任一項的表面安裝式外罩,其 中,所使用的塑膠是一種熱塑性塑膠。 6,如前述申請專利範圍中任一項的表面安裝式外罩,其 中,間隙(4)是一個穿孔。 7 ·如前述申請專利範圍中任一項的表面安裝式外罩,其 中,以壓鑄法形成凹槽(5 )。 8·如前述申請專利範圍中任一項的表面安裝式外罩,其 -17- 200830482 中,將間隙(4)設置在凹槽(5)中。 9 .如前述申請專利範圍中任一項的表面安裝式外罩,其 中’將凹槽(5)設置在導線架(2)的一個位於晶片安裝面(3) 之對面的底面(6)上。 1 0 ·如申請專利範圍第9項的表面安裝式外罩,其中,外罩 部分(1)從導線架(2)的底面(6)嵌入間隙(4)及凹槽(5)內。 1 1 ·如前述申請專利範圍中任一項的表面安裝式外罩,其 中,晶片安裝面(3)的一個背面(9)在導線架中被間隙(4) 及/或凹槽(5)環繞住。 1 2 ·如申請專利範圍第1 1項的表面安裝式外罩,其中,晶片 安裝面(3)的背面(9)具有一個與間隙(4)及/或凹槽(5)緊 鄰的壓鑄邊緣(12)。 1 3 .如申請專利範圍第丨2項的表面安裝式外罩,其中,壓鑄 邊緣(12)將晶片安裝面(3)的整個背面(9)環繞住。 1 4 ·如申請專利範圍第i 2項或第i 3項的表面安裝式外罩, 其中,壓鑄邊緣(12)放置在外罩部分(1)上。 1 5 ·如前述申請專利範圍中任一項的表面安裝式外罩,其 中,導線架(2)的一個背對晶片安裝面(3)的底面(6)與外罩 部分(1)的一個底面(11)構成一個平坦面。 1 6 ·如前述申請專利範圍中任一項的表面安裝式外罩,其 中,晶片安裝面(3)的一個背面(9)未被外罩部分(1)覆蓋 住。 1 7 ·如前述申請專利範圍中任一項的表面安裝式外罩,其 中,以壓鑄或注塑的方式將導線架(2)和塑膠製的外罩部 200830482 分(i)一起成型。 1 8 ·如前述申請專利範圍中任一項的表面安裝式外罩,其 中,導線架(2)的一個背對晶片安裝面(3)的底面(6)具有與 半導體晶片形成導電接觸的接觸面(7)。 1 9 ·如申請專利範圍第1 8項的表面安裝式外罩,其中,安裝 有位於外罩部分(1)內的接觸面(7)。 2〇·如前述申請專利範圍中任一項的表面安裝式外罩’其 中,在晶片安裝面(3)上至少安裝一個半導體晶片(13)° 2 I如申請專利範圍第20項的表面安裝式外罩,其中’半_ 體晶片(13)是一種光電半導體晶片。 22·如申請專利範圍第21項的表面安裝式外罩,其中’ 半導體晶片(13)是一種高功率LED晶片。 23·如申請專利範圍第22項的表面安裝式外罩,其中’高# 率LED晶片(13)的輻射功率爲0.2 W以上。200830482 X. Patent application scope: 1. A surface mount type cover for at least one semiconductor wafer, having at least one plastic cover part (1) and a lead frame (2), the surface mount type cover is characterized by: - wire The holder (2) has a wafer mounting surface (3) for at least one semiconductor mounting; - the lead frame (2) has at least one gap (4) and at least one recess (5); and (_ housing portion (1) The gap (4) and the recess (5) may be embedded to be fixed in the lead frame (2). 2. The surface mount type cover according to claim 1, wherein the lead frame (2) is a flat wire * 3 · For surface-mounted enclosures of claim 1 or 2, where the thickness d of the leadframe (2) is between 〇.imm (inclusive) and lmm (inclusive). The surface mount enclosure of any of the preceding claims, wherein the depth t of the recess is between 30% (inclusive) and {:^70% (inclusive) of the thickness d of the leadframe. A surface mount type cover according to any one of the preceding claims, wherein The plastic used is a thermoplastic, 6. The surface mount housing of any of the preceding claims, wherein the gap (4) is a perforation. 7 - Surface mount according to any of the preceding claims The outer cover, wherein the groove (5) is formed by die casting. The surface mount type cover according to any one of the preceding claims, wherein the gap (4) is set in the groove (5) in -17-200830482 9. A surface mount enclosure according to any of the preceding claims, wherein 'the recess (5) is disposed on a bottom surface (6) of the leadframe (2) opposite the wafer mounting surface (3) 1 0. The surface mount type cover according to claim 9 wherein the cover portion (1) is embedded in the gap (4) and the recess (5) from the bottom surface (6) of the lead frame (2). A surface mount housing according to any of the preceding claims, wherein a back surface (9) of the wafer mounting surface (3) is surrounded by a gap (4) and/or a recess (5) in the lead frame. 1 2 · If the surface mount type cover of claim 11 is applied, The back surface (9) of the wafer mounting surface (3) has a die-cast edge (12) adjacent to the gap (4) and/or the groove (5). 1 3. Surface mounting as in claim 2 a cover, wherein the die-cast edge (12) surrounds the entire back surface (9) of the wafer mounting surface (3). 1 4 . The surface mount housing of claim i or 2, wherein The die-casting edge (12) is placed on the outer cover portion (1). The surface-mounted outer cover according to any one of the preceding claims, wherein the lead frame (2) is facing away from the wafer mounting surface (3) The bottom surface (6) and a bottom surface (11) of the outer cover portion (1) constitute a flat surface. A surface mountable cover according to any one of the preceding claims, wherein a back surface (9) of the wafer mounting surface (3) is not covered by the cover portion (1). A surface mount type cover according to any one of the preceding claims, wherein the lead frame (2) and the plastic cover portion 200830482 (i) are molded together by die casting or injection molding. A surface mount enclosure according to any of the preceding claims, wherein a bottom surface (6) of the leadframe (2) facing away from the wafer mounting surface (3) has a contact surface that makes conductive contact with the semiconductor wafer. (7). 1 9 . The surface mount type cover of claim 18, wherein a contact surface (7) located in the outer cover portion (1) is mounted. A surface mount type cover according to any one of the preceding claims, wherein at least one semiconductor wafer (13) is mounted on the wafer mounting surface (3), and the surface mount type is as claimed in claim 20 The cover, wherein the 'semi-body wafer (13) is an optoelectronic semiconductor wafer. 22. A surface mount enclosure as claimed in claim 21 wherein the semiconductor wafer (13) is a high power LED wafer. 23. The surface mount type cover of claim 22, wherein the 'high# rate LED chip (13) has a radiation power of 0.2 W or more. -19--19-
TW096134152A 2006-09-15 2007-09-13 Surface-mount housing for semiconductor chip TW200830482A (en)

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DE102007001706A1 (en) 2007-01-11 2008-07-17 Osram Opto Semiconductors Gmbh Housing for optoelectronic component and arrangement of an optoelectronic component in a housing
WO2021144120A1 (en) * 2020-01-13 2021-07-22 Osram Opto Semiconductors Gmbh Housing, optoelectronic semiconductor component and production method

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DE102004003928B4 (en) * 2004-01-26 2012-02-23 Tay Kheng Chiong A miniaturized SM-technology optoelectronic device and method of making this device
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