TW200825919A - Method and system for updating firmware of a microcontroller - Google Patents
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- TW200825919A TW200825919A TW95146574A TW95146574A TW200825919A TW 200825919 A TW200825919 A TW 200825919A TW 95146574 A TW95146574 A TW 95146574A TW 95146574 A TW95146574 A TW 95146574A TW 200825919 A TW200825919 A TW 200825919A
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200825919 九、發明說明: 【發明所屬之技術領域】 本發明係關於一種更新動體之系統與方法,特別是, 關於一種更新微控制器之韌體之系統與方法。 【先前技術】 近年來蓬勃發展的 3C (Computer,Commimieatior^200825919 IX. INSTRUCTIONS: TECHNICAL FIELD OF THE INVENTION The present invention relates to a system and method for updating a dynamic body, and more particularly to a system and method for updating a firmware of a microcontroller. [Prior Art] 3C (Computer,Commimieatior^) that has flourished in recent years
Consumer-electronics)產品,常常需要使用者更新產品的勃 體,以提昇產品的相容性與性能,或是當發現韌體有錯誤 (bug)時,也需要使用者更新產品的韌體,以修正這些錯 誤。此外,對於系統商來說,買進一顆積體電路(integrated circuit,1C),例如微控制器(Micro C()ntlOtoUnit5 MQJ), 雖然1C廠商可能會提供韋刃體程式,但是此勒體多為IC廠 商作為硬體測試之用,因此功能與結構尚不完備。如果能 讓系統商方便地更新或升級韌體,將大大地增加Ic的價 值。微控制器的韌體一般儲存於微控制器内之一晶片内 (on-chip)程式記憶體,例如一快閃(flash)記憶體或電性可抹 除式唯讀記憶體(EEPROM)等非揮發性(n〇n_v〇latile)記憶 體,但是由於使用年限或成本之問題,因此發展出以揮發 性記憶體,如靜態隨機存取記憶體(SRAM),來構成晶片 内程式記憶體。這類型的微控制器在使用上,需於晶片外 外加-程式記憶體,例如-電性可抹除式唯讀記憶體,每 當微控制為啟動(power on)時,把此電性可抹除式唯讀記 憶體内之韋刃體載入晶片内程式記憶體,以克服上述缺點。Consumer-electronics products often require users to update the product's body to improve product compatibility and performance, or when the firmware is found to have bugs, the user needs to update the firmware of the product. Fix these errors. In addition, for the system vendor, buy an integrated circuit (1C), such as a microcontroller (Micro C () ntlOtoUnit5 MQJ), although the 1C manufacturer may provide the Wei blade program, but this kind of Most of them are IC manufacturers used for hardware testing, so the function and structure are not complete. If you can make it easy for system vendors to update or upgrade firmware, it will greatly increase the value of Ic. The firmware of the microcontroller is typically stored in an on-chip program memory in the microcontroller, such as a flash memory or an electrically erasable read-only memory (EEPROM). Non-volatile (n〇n_v〇latile) memory, but due to years of use or cost, the development of volatile memory, such as static random access memory (SRAM), to form in-chip program memory. In this type of microcontroller, it is necessary to add a program memory to the outside of the chip, for example, an electrically erasable read-only memory. When the micro control is power on, this electrical property can be used. The wiper in the erase-only read-only memory is loaded into the on-chip program memory to overcome the above disadvantages.
4FULHUA/05004TW 200825919 一般韌體更新可經由微控制器開發時所預留的二接 腳/三接腳/四接聊,供滅更新之用,然而這些接聊 皆為廠商所自定的規格,因此更新的動作需由_摔作^ 對於使用者來說相當不方便。此外,可先把韋刃體下載至主 機(host)中’例如電腦主機、手機…等,再利用通用串列匯 流排(Universal Serial Bus,USB)把儲存在主機的韋刀體載入 微控,器之晶片内程式記憶體,以更新勒體。通用串列匯 〇 流排是由 Intd、ComPaq、Digita卜 IBM、Microsoft、nec 及Northern Telecom等七家公司共同推出的介面標準已 在市面上被廣為應用,且經由通用串列匯流排介面更新韌 體的方式’只需要使用者在主機上下指令,非常簡便。 其他介面’例如由飛利浦(Philips)公司推出的積體電 路間(Inter Integrated Circuit,I2C or IIC)介面及摩托羅拉 (Motorola)公司推出的串列週邊介面(Serial peripherai Interface,SPQ也可被用來作更新韌體之用。4FULHUA/05004TW 200825919 The general firmware update can be used for the update by the two-pin/three-pin/four-connected reservations reserved during the development of the microcontroller. However, these contacts are all customized by the manufacturer. Therefore, the updated action needs to be made by _falling ^ which is quite inconvenient for the user. In addition, you can download the Weishou body to the host (such as the host computer, mobile phone, etc.), and then use the Universal Serial Bus (USB) to load the Wei knife body stored in the host into the micro controller. , the program memory inside the chip to update the body. The universal serial bus is an interface standard jointly developed by seven companies including Intd, ComPaq, Digitab IBM, Microsoft, nec and Northern Telecom. It has been widely used in the market and updated via the universal serial bus interface. The way of the firmware 'requires the user to command up and down the host, which is very simple. Other interfaces' such as the Inter Integrated Circuit (I2C or IIC) interface introduced by Philips and the Serial Peripherai Interface (SPQ) from Motorola can also be used as Update the firmware.
U I2C是-種兩線式的通訊介面,這兩線分別為串列資 料線(Serial Data,SDA)及串列時脈線(Serial cl〇ck,SCL), SDA用於資料之輸入/輸出,而SCL則用於產生時脈。I2C 上所有的裝置,都疋藉由這兩條線連接在一起,且這些裝 置依據需求的不同,每-個裝置都能在主(master)或從屬 (slave)模式下運作。因此I2C上每個裝置都必須具有一個 獨一無二的位址供辨識。更細部地說明,假設某個裝置為U I2C is a two-wire communication interface. These two lines are Serial Data (SDA) and Serial Cl〇ck (SCL). SDA is used for data input/output. And SCL is used to generate the clock. All devices on the I2C are connected by these two lines, and each of these devices can operate in either master or slave mode depending on the requirements. Therefore, each device on the I2C must have a unique address for identification. To explain in more detail, suppose a device is
4FULHUA/05004TW 6 200825919 主裝,,其餘震置為從屬裝置,則主裝置會先對I2C上所 ^的裝置廣播,並送出想要溝通的從屬I置之位址,被指 定的從屬襄置會送出-回應(acknowledge),且開始與主裝 置連線而進行溝通及資料傳遞,其他的從屬裝置則飾^ 應。溝通結束後,回到初始狀態,等待下一次動作。 SPI則是一種四線式的通訊介面,其中主出從入 (Master Out Slave In, MOSI) (Master In Slave Out, MIS〇)、串列時脈(Serial Clock,SCK)三線進行資料傳輸, 而,屬選擇線(Slave Select,ss}則控制裝置的選擇。更細部 地況明主裝置為時脈提供者,可發起讀取從屬裝置或寫 入從屬裝置之動作。當介面上存在多個姻裝置時,若要 發起-傳輸,主裂置將把從屬裝置之選擇線電位降低,然 後分別透過M0SI和MISQ線路啟動數據的發送或接收。 此外’比起I2C,SPI -般可達到更快的傳輸速度。 在柏士半導體(Cypress Semiconductor)公司所推出的 ,控制器中’拿刃體更新是使用如圖一所示之系統。微控制 器102之韌體儲存於晶片内程式記憶體1〇8中,且微控制 器102之兩個介面··積體電路間介面112或通用串列匯流 排二面114冑可供拿刃體更新之用。但因為積體電路間介面 非常普遍地被使用,若是積體電路間介面112被其 之積體電路間介面外部裝置126所佔滿,則將無法用來更 新韌體,此時只能透過通財列匯流排介面m來更新韌4FULHUA/05004TW 6 200825919 Main installation, the rest is set as a slave device, then the master device will broadcast the device on the I2C first, and send the address of the slave I to be communicated, the designated slave device will be Send-response (acknowledge), and start to communicate with the main device for communication and data transmission, and other subordinate devices are decorated. After the communication is over, return to the initial state and wait for the next action. SPI is a four-wire communication interface, in which Master Out Slave In (MOSI) (Master In Slave Out, MIS〇) and Serial Clock (SCK) are used for data transmission. The selection line (Slave Select, ss} controls the selection of the device. In more detail, the master device is the clock provider, and can initiate the action of reading the slave device or writing the slave device. When there are multiple marriages on the interface In the case of device-to-initiation-transmission, the main split will lower the select line potential of the slave device and then initiate data transmission or reception through the M0SI and MISQ lines respectively. In addition, SPI can be achieved faster than I2C. Transmission speed. At Cypress Semiconductor, the controller's 'blade body update' uses the system shown in Figure 1. The firmware of the microcontroller 102 is stored in the on-chip program memory. 8 , and the two interfaces of the microcontroller 102 · the integrated circuit interface 112 or the universal serial bus two sides 114 胄 can be used for updating the blade body, but because the integrated circuit interface is very popular Use, if it is product Between the interface circuit 112 which is between the external interface of the integrated circuit device 126 occupied by full, it will not be used to update the firmware, this time to update the firmware can pass through the column bus interface fiscal m
4FULHUA/05004TW 7 200825919 體’使用上變得缺乏彈性。 法。因此,有必要提供-輕合上述各介面之系統及方 【發明内容】 有馨於上述柏士半導體之韋刃體更新的缺點,若能再加 進摩托羅拉公⑽串舰邊介面,則#積體電路間介面被 其他震置佔滿時,可運料舰邊介面更蹄體;反之, 當串列週邊介面被其他㈣佔滿時,則可運用積體電路問 介面更新Μ,使用上變得極富彈性。 、電路門 本發明之一方面在於提供一種更新微控制器之韌體 的系統,包含:一晶片内(〇n_chip)程式記憶體,用於儲存 早刃體、至少一外部裝置,用於儲存一新勃體、一動體载 入器(Firmware Loader),具有複數個介面,此複數個介面 包含··一串列週邊介面、一積體電路間介面及一通用串列 匯流排介面,其中此韌體載入器係透過複數個介面將新韌 體載入此晶片内程式記憶體,以更新韌體。對於韌體更 新,可增加介面使用上的彈性。 本發明之一另方面在於提供一種更新微控制器之章刀 體的方法’包含:提供一晶片内程式記憶體於微控制器 内,供儲存一韌體;測試是否存在一晶片外(off_chip)程式4FULHUA/05004TW 7 200825919 The body has become inelastic in use. law. Therefore, it is necessary to provide a system for lightly combining the above interfaces. [Summary of the Invention] There is a shortcoming of the update of the blade of the above-mentioned Baishi Semiconductor. If it can be added to the Motorola (10) string side interface, then #积When the inter-circuit interface is occupied by other shocks, the ship-side interface can be more hoofed; on the other hand, when the serial interface is filled by the other (4), the integrated circuit can be used to update the interface and use the upper change. Very flexible. An aspect of the present invention provides a system for updating a firmware of a microcontroller, comprising: a DRAM (n_chip) program memory for storing an early blade, at least one external device, for storing one A new body, a firmware loader (Firmware Loader), has a plurality of interfaces, the plurality of interfaces including a series of peripheral interfaces, an integrated circuit interface and a universal serial bus interface, wherein the toughness The body loader loads the new firmware into the in-chip program memory through a plurality of interfaces to update the firmware. For firmware updates, the flexibility of the interface can be increased. Another aspect of the present invention provides a method for updating a chapter of a microcontroller to include: providing an in-chip program memory in the microcontroller for storing a firmware; and testing whether there is an off-chip (off_chip) Program
4FULHUA/05004TW 8 200825919 =體;ί不存在晶片外程式記憶體時,則偵測一串列週 邊"面啟動裝置及-積體電路間介面啟動裝置 置被,當至少一介面啟動裝置被致能 '則偵扇:至>、-介面啟練置所對應的— 否為-儲存元件,·當此外部裝置為—儲存元件時,^貞^ 此儲存7G件是謂存—新減;#此儲存元件儲存一新勤 體時,將此新_載人此晶片内程式記鐘,以更新韋刃二。 【實施方式】 本發明揭露一種微控制器之韌體更新的系統及方 法。為了使本發明之敘述更加詳盡與完備,可參照下列描 述並配合圖2、圖3及表1至表3。 7參考圖2,® 2為本發明更練體之—具體實施例的 一系統。此更新韌體之系統200包含位於一微控制器2〇2 内的一晶片内程式記憶體208和一韌體載入器2〇4,及外 部裝置201。晶片内程式記憶體2〇8係用於儲存一韌體, 而早刃體載入器204具有複數個介面,包含串列週邊介面 21〇、積體電路間介面212,以及通用串列匯流排介面214。 這三個介面分別與串列週邊介面啟動裝置216、積體電路 間介面啟動裝置218,以及通用串列匯流排介面啟動裝置 220連接,且一旦介面上連接一或多個外部裝置2〇1,例 如串列週邊介面210上連接一快閃(flash)記憶體或電性可 抹除式唯讀記憶體(EEPROM)224、積體電路間介面212上4FULHUA/05004TW 8 200825919=Body; ί When there is no off-chip program memory, it detects a series of peripheral "surface activation devices and an integrated circuit interface device startup device, when at least one interface activation device is caused Can't detect the fan: to >, - interface to start the corresponding - no - storage component, · when the external device is - storage component, ^ 贞 ^ This storage 7G is a storage - new reduction; # When this storage component stores a new service, this new _ manned the program in this chip to update the Weiji II. [Embodiment] The present invention discloses a system and method for firmware update of a microcontroller. In order to make the description of the present invention more detailed and complete, reference is made to the following description in conjunction with Figures 2, 3 and Tables 1 to 3. 7 Referring to Figure 2, the ® 2 is a system of a more practical embodiment of the present invention. The firmware-removing system 200 includes an in-chip program memory 208 and a firmware loader 2〇4 located in a microcontroller 2〇2, and an external device 201. The in-chip program memory 2〇8 is used to store a firmware, and the early blade loader 204 has a plurality of interfaces, including a serial peripheral interface 21〇, an integrated circuit interface 212, and a universal serial bus. Interface 214. The three interfaces are respectively connected to the serial peripheral interface activation device 216, the integrated inter-system interface activation device 218, and the universal serial bus interface activation device 220, and once the interface is connected to one or more external devices 2〇1, For example, a serial peripheral interface 210 is connected to a flash memory or an electrically erasable read only memory (EEPROM) 224, and the integrated circuit interface 212 is connected.
4FULHUA/05004TW 9 200825919 八面214 L可抹除式唯讀記憶體226,或通料列匯流排 連接一電腦主機228,則對應的介面啟動裝置 牡署矣220將被致能。換句話說,被致能的介面啟動 =置表不對應的介面上存在一外部裝置-、226或⑽。 裝置包含串列週邊介面上的串列週邊介面外部裝 、、、積體電路間介面上的積體電路間外部裝置级, 匯流排介面上的通用匯流排外部裝置228。需要4FULHUA/05004TW 9 200825919 Eight-faced 214 L erasable read-only memory 226, or a busbar connected to a computer host 228, the corresponding interface activation device will be enabled. In other words, the enabled interface is activated = there is an external device -, 226 or (10) on the interface that does not correspond to the meter. The device includes a serial peripheral interface external device on the serial peripheral interface, an external circuit device between the integrated circuits on the integrated circuit interface, and a universal bus external device 228 on the bus interface. need
駚ΐ攸外部裝置2〇1包含各種支援串列週邊介面、積 之類通=:=广更體’例如記憶體 伯、古此入 冑機或其他電子產品元件。但是即 ;丨面上存在著儲存元件,這些儲存元件也不一定儲 體’而可能只是錯存—些物體之資料。因此,此 入包含—判斷敍222,供欺外«置 疋否為儲存70件,且欺儲存元件中是爾存物體。 在判定儲存元件是否儲存教體方面此 ΐί二表二之設計。表1為一例供指明儲存二 :子Μ體,而表2為-例供細儲存元件 ==請從存取位址_ 3CH及從存取位址!二 f Η ’湖定此儲存元件上儲存物體,如表二。反之 攸存取位址〇讀出遍及從存取健 件上只儲存彻之資料,如表_:^^ 稷數個"面上之儲存元件细、226或228皆存有拿刃體時田The external device 2〇1 includes various types of support peripheral serial interfaces, and the likes of the product =: = wide body, such as memory, ancient devices, or other electronic product components. However, there are storage elements on the surface, and these storage elements are not necessarily storage's and may simply be the data of some objects. Therefore, this inclusion includes a judgment 222, which is used for deception. The storage is 70 pieces, and the object is a storage object. This is the design of the second table in determining whether the storage element stores the teaching body. Table 1 is an example for storing two: sub-body, and Table 2 is - for fine storage elements == please access address _ 3CH and slave access address! Two f Η ’ lakes are stored on this storage element, as shown in Table 2. On the other hand, the access address is read and stored only from the access health device, such as the table _: ^^ & number of " storage elements on the surface, 226 or 228 are stored in the blade
4FULHUA/05004TW 200825919 判斷裝置222可用於由複數個介面選擇其中一介面,並且 把這個選擇的介面上之儲存元件224、226或228所儲存 的韌體載入晶片内程式記憶體2〇8,完成更新韌體的動作。 在判定外部裝置201是否為儲存元件方面,因為儲存 元件的大小不一,因此除了判定是否為儲存元件之外,若 要存取這些儲存元件,需要送出不同長度的存取位址。於 一些具體實施例中,例如對於積體電路間介面212,判斷 政置222可傳送一請求到一從屬位址(slave address)所對應 的元件上,若收到一回應,則判定存在儲 存兀件。參考表三之定義,以更進一步地說明從屬位址的 定義,其中表三是使用7位元之定址機制為例,7位元從 屬位址中的前4個高位元部分為固定的,並依裝置本身性 質加以分類,例如1010B即代表EEPR0M,而後3個低 位元邛为則透過裝置上之位址接腳(a(^reSSpin)設定,例如 若接腳A2、A1及A0分別灌入〇,〇,〇或,則從屬位 址之低位元部分便被決定為〇〇〇B或mB。此外,從屬位 址之低位元部分也可依據接腳,設計成其他二進位數值, 因此在同一積體電路間介面212上可以有8個相同形式的 裝置。一般,根據EEPR0M的大小通常需要一個、二個 或二個位兀組(byte)長度之存取位址,而積體電路間介面 212之從屬位址又可依接腳來程式化,因此不同的從屬位 址之低位元部分可用來指示不同的存取位址的長度。例如 設計某些從屬位址之低位元部分代表大小不超過256個位4FULHUA/05004TW 200825919 The determining device 222 can be used to select one interface from a plurality of interfaces, and load the firmware stored in the storage element 224, 226 or 228 on the selected interface into the in-chip program memory 2〇8, and complete Update the firmware's actions. In determining whether the external device 201 is a storage element, since the size of the storage elements is different, in addition to determining whether it is a storage element, in order to access the storage elements, access addresses of different lengths need to be sent. In some embodiments, for example, for the integrated inter-circuit interface 212, the judgment 222 may transmit a request to a component corresponding to a slave address, and if a response is received, determine that the storage exists. Pieces. Refer to the definition of Table 3 to further explain the definition of the subordinate address, where Table 3 uses the 7-bit addressing mechanism as an example, and the first 4 high-order parts of the 7-bit subordinate address are fixed, and According to the nature of the device itself, for example, 1010B represents EEPR0M, and the last 3 low-order devices are set by the address pin (a(^reSSpin) on the device. For example, if pins A2, A1 and A0 are respectively injected into the device, , 〇, 〇 or, the lower bit part of the slave address is determined to be 〇〇〇B or mB. In addition, the lower bit part of the slave address can also be designed as other binary values according to the pin, so in the same There may be eight devices of the same form on the integrated circuit interface 212. Generally, one, two or two bit length access addresses are required according to the size of the EEPR0M, and the integrated circuit interface is integrated. The slave address of 212 can be programmed according to the pin, so the lower bit part of the different slave address can be used to indicate the length of different access address. For example, designing the lower bit part of some slave address represents the size is not More than 256 digits
4FULHUA/05004TW 11 200825919 元組之EEPROM類型,並定義為a型,其中使用一個位 元組便可完全表示A㉟EEPR0M之存取位址;而又設計 另外某些從屬位址之低位元部分代表大小超過256個位元 組’但不超過64K個位元組之EEPR〇M類型,並定義為 B型’其中使用二個位元組便可完全表示b型eepr〇m 的存取位址。如表三之定義,判斷裝置222可先送出從屬 位址為1010000B之一第一請求到積體電路間外部裝置 226上,如果收到一第一回應,則視為A型EEpR〇M , 若欲讀取A型EEPROM 226之儲存内容,則需送出一個 位元組的存輸址。如果沒_第—喃,祕送出從屬 位址為1010111B之-第二請求到積體電路間外部裝置 226上,如果收到一第二回應’則視為B型EEpR〇M , 若欲讀取B型EEPROM 226之儲存的内容,則需送出二 個位元組的存取紐。如果健沒_第二回應,則判定 這些積體電路間外部裝置226中不存在EEpR〇M。需要注 意的是’以上是以EEPROM及EEPROM所對應的從屬位 址之高位元部分1010B為例,且只定義a型和B型 EEPROM ’熟習此技藝人士可知’判斷裝置222可依照上 述方法,判定積體電路間外部裝置级中是否存在其他類 型之EEPROM或其他種類之儲存元件。 、 在判定外部裝置201是否為儲存元件方面,於另一些 具體實施例中,例如對於㈣週邊介面21G,因為串列& 邊介面比積體電路間介面多了從屬選擇線(ss),因此判斷4FULHUA/05004TW 11 200825919 The EEPROM type of the tuple is defined as a type, in which one byte can completely represent the access address of A35EEPR0M; and the lower bit part of some other dependent address is designed to exceed the size. 256 bytes 'but no more than 64K bytes of EEPR〇M type, and defined as type B' where two bytes are used to fully represent the access address of b-type eepr〇m. As defined in Table 3, the determining means 222 may first send a first request having a dependent address of 1010000B to the external device 226 of the integrated circuit, and if a first response is received, it is regarded as a type A EEpR 〇 M, if To read the contents of the Type A EEPROM 226, a byte address must be sent. If there is no _---, the secret address is 1010111B - the second request is sent to the external circuit device 226 of the integrated circuit, and if a second response is received, it is regarded as type B EEpR 〇 M, if it is to be read For the contents stored in the B-type EEPROM 226, two byte access buttons are required. If the _ second response is made, it is determined that EEpR 〇 M does not exist in these integrated inter-circuit external devices 226. It should be noted that the above is an example of the high-order portion 1010B of the slave address corresponding to the EEPROM and the EEPROM, and only the a-type and B-type EEPROMs are defined. 'It is known to those skilled in the art that the judgment device 222 can determine according to the above method. Whether other types of EEPROM or other types of storage elements are present in the external device stage between the integrated circuits. In terms of determining whether the external device 201 is a storage component, in other embodiments, for example, for the (four) peripheral interface 21G, since the serial & side interface has more slave select lines (ss) than the integrated circuit interface, Judge
4FULHUA/05004TW 12 200825919 if Γί可=上述判定儲存元件是否儲存勒體的方式。 存m不同大小之儲存元件,需要不同長度的 位址到-串列週邊介面外部裝置 存取位址之料的諸。若讀回的資料與事 ^ ’則判定此串列週邊介面外部裝置似上存 Ο4FULHUA/05004TW 12 200825919 if Γί can = the above way to determine whether the storage element stores the leot. Storing storage elements of different sizes requires addresses of different lengths to the external device of the serial interface to access the address. If the information and the matter returned are ' ’, it is determined that the external device of the serial interface is similar to
讀回二資料二的:::回此存取位址之資料。若 ,«置224不存在儲存元件。需要注意= :技蓺ί:以二及三個位元組大小之儲存元件為例,孰習 物,也職魏大小的^ 从η 上思的疋上述之判定外部裝置201是否為儲在分 事先元較顿_社频實施财,不符合 動作。以表2。^存疋件或㈣,將不會進行勃體更新的 元若非耗定義:^斷裝置222由特定位址讀取出之位 .^ , 的CH即C3H,則即使實際上儲存的為 1體,也將被判斷裳置222視為非拿刃體。 為 圖2中的晶 程式記憶體2〇8。 片外程式記憶體206,係用於擴充晶片内 例如8051單晶片’除了内建的晶片内程Read back the second data::: Back to the information of this access address. If , «Set 224 does not exist storage components. Need to pay attention to = :Technical 蓺 :: Take two or three byte size storage elements as an example, 孰 , , 也 魏 魏 魏 从 从 从 从 从 从 从In advance, the yuan _ _ social frequency implementation of the money, does not meet the action. Take Table 2. ^Save the condition or (4), the non-depletion definition of the Bosch body update will not be performed: ^ The device 222 is read by the specific address. ^, the CH is C3H, even if it is actually stored as 1 body It will also be judged that the 222 is considered a non-sharp body. It is the crystal memory of Figure 2 in Figure 2. Off-chip program memory 206 is used to expand the inside of the wafer, such as the 8051 single chip, except for the built-in wafer internal process.
4FULHUA/05004TW 13 200825919 式記憶體208有4K位元組之外,可擴充程式記憶體到64Κ 位元組大小,即可外加60Κ位元組的晶片外程式記憶體 。g日日片外程式挹憶體206存在時,於本發 韌體載入器202被禁能。 翏考圖 ,▼句5更新初體之一具體實施例的一方 法。接在此方法300之開始302之後的是_是否存在晶 片外程式記憶It 304,若否,則偵測是否為微 時306。若是,則_—串列週邊細啟_置或 電路間介面啟動裝置是否被致能3〇8。若是,則侧是否 此串列週邊介面啟動裝置被致能則。若是,職測此串 列週邊介面所對應的串列週邊介面外部裝置是否為一 存元件3丨2。若是,關麻儲存元件是雜存一勒體 314。若是’下載此勒體到微控制器之_晶片内程4FULHUA/05004TW 13 200825919 The memory 208 has 4K bytes, which can expand the program memory to 64Κ byte size, and can add 60 bytes of off-chip program memory. When the g-day off-chip program memory 206 exists, it is disabled in the native firmware loader 202.翏考图 , ▼ sentence 5 update one of the first embodiment of the specific embodiment. Following the beginning 302 of the method 300 is whether there is an out-of-chip program memory It 304, and if not, it is detected as a time 306. If so, then _-the serial peripheral __ or the inter-circuit interface activation device is enabled 3〇8. If so, then whether the side peripheral interface activation device is enabled on the side. If so, it is determined whether the external device of the serial peripheral interface corresponding to the serial interface of the series is a storage component 3丨2. If so, the Guan Ma storage element is a miscellaneous 314. If it is 'download this body to the microcontroller's wafer internal process
J 體316。現在回到步驟304,若存在晶片外程式記情體 走到結束326。現在回到步驟鄕,騎微控制哭開啟 時’則走^貞測是否-電腦主機請求藉由通用串列匯流 介面下載韋刃體324。現在回到步驟31〇、312及: 二啟置未被致能、串列週邊介面對應4部 衣置非儲存7G件及儲存元件不齡滅 路介面啟動裝置是否被致能318。若是, 電路介面賴_魏電路間介科部 ς匕積體 f22元件/a2G _麵存元崎ΐ存= 。右疋’下載此韋刀體到微控制器之一晶片内程式記憶J body 316. Returning now to step 304, if there is an off-chip program, the end of the program goes to end 326. Now go back to the step 鄕, when the micro control is crying on, then go to the test and check if the host asks to download the scallop 324 via the universal serial converged interface. Now go back to steps 31〇, 312 and: 2, the second open is not enabled, the serial interface is 4, the non-storage 7G and the storage component are not enabled. If so, the circuit interface _ _ Wei circuit between the Department of hoarding f22 components / a2G _ face memory Yuan Qi memory =. Right 疋' download this knives to one of the microcontroller's in-chip program memory
4FULHUA/05004TW 14 200825919 fZ 318'32G及322,若積體電路介面 =f 能、频介面外部裝置非贿元件及 J二不儲存她,則走到侧是否—電腦主機請求藉 '歹丨匯/观排介面下載韌體324。現在到步驟324, 田摘測到電&主機之請树,驗據此 片内程式記鐘3.在-些具體實施射,#完成^ 316之後,可回到步驟324,以等待電腦主機之下一個請 求。任何時刻,只要一電腦主機請求更新動體,便藉由通 用串列匯流排介©,把事_存在電腦主機中之物體,載 入晶^内程式記憶體,如圖3所示之具體實施例。在其他 具體貫施例中,當走到步驟316之後,也可以依據需要, 設計回到步驟326、步驟308或其他步驟。 於圖3之具體實施例中,係先偵測串列週邊介面啟動 裝置被致能310,再偵測積體電路間介面啟動裝置被致能 318,但是於其他的具體實施例,本發明可先偵測積體電 路間介面啟動裝置被致能,再偵測串列週邊介面啟動裝置 被致能。 以上所述僅為本發明之較佳實施例而已,並非用以限 定本發明之申請專利範圍;凡其它未脫離本發明所揭示之 精神下所完成之等效改變或修飾,均應包含在下述之申請 專利範圍内。4FULHUA/05004TW 14 200825919 fZ 318'32G and 322, if the integrated circuit interface = f energy, the frequency interface external device non-bribery components and J two do not store her, then go to the side - the computer host requests to borrow "歹丨汇 / Download the firmware 324 from the viewing interface. Now to step 324, the field picks up the electric & host request tree, and checks the on-chip program clock. 3. After some specific implementations, #complete^ 316, return to step 324 to wait for the host computer. The next request. At any time, as long as a computer host requests to update the mobile body, the object stored in the computer host is loaded into the internal memory of the program by means of the universal serial bus interface ©, as shown in FIG. example. In other specific embodiments, after step 316, the design may be returned to step 326, step 308, or other steps as needed. In the specific embodiment of FIG. 3, the serial peripheral interface activation device is activated 310, and the integrated inter-device interface activation device is enabled 318. However, in other embodiments, the present invention may The first detection of the inter-connector interface activation device is enabled, and then the detection of the serial peripheral interface activation device is enabled. The above is only the preferred embodiment of the present invention, and is not intended to limit the scope of the present invention; all other equivalent changes or modifications which are not departing from the spirit of the present invention should be included in the following. Within the scope of the patent application.
4FULHUA/05004TW 15 200825919 【圖式簡單說明】 圖1為柏士半導體公司更新微控制器勃體之系統之方 塊圖, 圖2為更新微控制綠體之系統的具體實施例之方塊 圖3為更新微控制器_之方法的具體實施例之流程 圖,4FULHUA/05004TW 15 200825919 [Simple diagram of the diagram] Figure 1 is a block diagram of a system for updating a microcontroller body, and Figure 2 is a block diagram of a specific embodiment of a system for updating a micro-control body. Flowchart of a specific embodiment of a method of a microcontroller
表1為一例供指明儲存元件触. 表2為一例供指明儲存元 初—,Table 1 is an example for the specified storage element to touch. Table 2 is an example for specifying the storage element.
表3為-例針對積體電;以及 226之從屬位址的定義。 丨卸212對於EEPROMTable 3 shows the definition of the dependent address for the integrated power; and 226. Unloading 212 for EEPROM
4FULHUA/05004TW 16 200825919 【主要元件符號說明】 102, 202微控制器 108, 208晶片内程式記憶體 112,212積體電路間介面 114, 214通用串列匯流排介面 126, 226積體電路間介面外部裝置 128,228通用串列匯流排介面外部裝置 201 外部裝置 204 韌體載入器 206 晶片外程式記憶體 210 串列週邊介面 216 串列週邊介面啟動裝置 218 積體電路間介面啟動裝置 220 通用串列匯流排介面啟動裝置 222 判斷裝置 224 串列週邊介面外部裝置 4FULHUA/05004TW 174FULHUA/05004TW 16 200825919 [Description of main components] 102, 202 microcontroller 108, 208 in-chip program memory 112, 212 integrated inter-circuit interface 114, 214 universal serial bus interface 126, 226 integrated inter-circuit interface external device 128,228 universal serial bus interface external device 201 external device 204 firmware loader 206 off-chip program memory 210 serial peripheral interface 216 serial peripheral interface activation device 218 integrated circuit interface startup device 220 universal serial bus Interface activation device 222 judgment device 224 serial peripheral interface external device 4FULHUA/05004TW 17
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TWI602124B (en) * | 2017-01-20 | 2017-10-11 | 神雲科技股份有限公司 | Baseboard Management Controller Firmware Updating Method For Fan Speed Control |
TWI714220B (en) * | 2019-08-16 | 2020-12-21 | 致伸科技股份有限公司 | Universal serial bus device and firmware update method thereof |
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TWI602124B (en) * | 2017-01-20 | 2017-10-11 | 神雲科技股份有限公司 | Baseboard Management Controller Firmware Updating Method For Fan Speed Control |
TWI714220B (en) * | 2019-08-16 | 2020-12-21 | 致伸科技股份有限公司 | Universal serial bus device and firmware update method thereof |
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