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TW200723382A - Method for processing wafer - Google Patents

Method for processing wafer

Info

Publication number
TW200723382A
TW200723382A TW095105807A TW95105807A TW200723382A TW 200723382 A TW200723382 A TW 200723382A TW 095105807 A TW095105807 A TW 095105807A TW 95105807 A TW95105807 A TW 95105807A TW 200723382 A TW200723382 A TW 200723382A
Authority
TW
Taiwan
Prior art keywords
wafer
support
composition
processing
polished
Prior art date
Application number
TW095105807A
Other languages
Chinese (zh)
Inventor
Kyouyuu Yasuda
Original Assignee
Jsr Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Jsr Corp filed Critical Jsr Corp
Publication of TW200723382A publication Critical patent/TW200723382A/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67132—Apparatus for placing on an insulating substrate, e.g. tape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/6834—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Grinding And Polishing Of Tertiary Curved Surfaces And Surfaces With Complex Shapes (AREA)

Abstract

A method for processing a wafer adaptable to a variety of wafers having complex structure by solving problems of conventional processes that the wafer strength lowers and the wafer support thermally deteriorates after wet polishing, a polished wafer is liable to crack when it is separated from the support, and testing at wafer level is difficult after thinning. The method for processing a wafer is characterized in that an adhesive composition principally comprising a compound having a molecular weight of 5,000 or less is interposed, as a fixing agent, between the wafer surface on which a semiconductor element is formed and the support, the wafer and the support are brought into close contact by thermally fusing the composition and then bonded fixedly by cooling, the back of the wafer is polished to thin the wafer to a thickness of 20-100 m, and then the wafer and the support are separated by thermally fusing the composition.
TW095105807A 2005-02-23 2006-02-21 Method for processing wafer TW200723382A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005046853 2005-02-23

Publications (1)

Publication Number Publication Date
TW200723382A true TW200723382A (en) 2007-06-16

Family

ID=36927291

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095105807A TW200723382A (en) 2005-02-23 2006-02-21 Method for processing wafer

Country Status (3)

Country Link
JP (1) JPWO2006090650A1 (en)
TW (1) TW200723382A (en)
WO (1) WO2006090650A1 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI627666B (en) * 2012-12-26 2018-06-21 Disco Corp Processing method of wafer
CN113941952A (en) * 2021-11-01 2022-01-18 徐州领测半导体科技有限公司 Double-side polishing process of semiconductor wafer
CN115725240A (en) * 2022-11-18 2023-03-03 无锡市恒利弘实业有限公司 Wafer polishing solution composition

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006328104A (en) * 2005-05-23 2006-12-07 Jsr Corp Adhesive composition
JP4927484B2 (en) * 2006-09-13 2012-05-09 株式会社ディスコ Method for manufacturing device for lamination
US20080092806A1 (en) * 2006-10-19 2008-04-24 Applied Materials, Inc. Removing residues from substrate processing components
JP2008244132A (en) * 2007-03-27 2008-10-09 Sanyo Electric Co Ltd Semiconductor device manufacturing method and semiconductor device
DE102007041885B4 (en) * 2007-09-04 2009-12-24 Infineon Technologies Ag Method for producing a semiconductor circuit arrangement
JP2009090416A (en) * 2007-10-10 2009-04-30 Dainippon Printing Co Ltd Method of manufacturing membrane structure
JP5832060B2 (en) * 2008-02-18 2015-12-16 デンカ株式会社 Method for grinding electronic component assembly and method for dividing electronic component assembly using the same
US7888758B2 (en) 2008-03-12 2011-02-15 Aptina Imaging Corporation Method of forming a permanent carrier and spacer wafer for wafer level optics and associated structure
JP2009224659A (en) * 2008-03-18 2009-10-01 Disco Abrasive Syst Ltd Method of dividing work
JP5185847B2 (en) * 2009-01-30 2013-04-17 パナソニック株式会社 Substrate dry etching method
JP5185186B2 (en) * 2009-04-23 2013-04-17 株式会社東芝 Semiconductor device
DE102010007127A1 (en) 2010-02-05 2011-08-11 Ev Group E. Thallner Gmbh Method of treating a temporarily bonded product wafer
JP2018142630A (en) * 2017-02-28 2018-09-13 日化精工株式会社 Wafer temporarily bonding wax and wafer temporarily bonding method
JP7362333B2 (en) * 2019-05-09 2023-10-17 株式会社ディスコ How to install a protective member, how to process a workpiece, a workpiece with a protective layer, and a frame unit
JP7335136B2 (en) * 2019-11-06 2023-08-29 株式会社ディスコ Resin protective member forming device

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0737768A (en) * 1992-11-26 1995-02-07 Sumitomo Electric Ind Ltd Method of reinforcing semiconductor wafer and reinforced semiconductor wafer
JP3309681B2 (en) * 1995-11-30 2002-07-29 株式会社日立製作所 Semiconductor device and processing method thereof
JP2000038556A (en) * 1998-07-22 2000-02-08 Nitto Denko Corp Semiconductor wafer-retaining protective hot-melt sheet and method for application thereof
JP2001118760A (en) * 1999-10-21 2001-04-27 Victor Co Of Japan Ltd Method for sticking semiconductor wafer
JP2002075940A (en) * 2000-08-25 2002-03-15 Hitachi Ltd Method for manufacturing semiconductor device
JP2003179006A (en) * 2002-09-20 2003-06-27 Toshiba Corp Wafer dividing method and method of manufacturing semiconductor device
TWI275623B (en) * 2002-10-01 2007-03-11 Ube Industries Polyol mixture, reactive hot-melt composition obtained from such mixture and mold goods using such composition
JP2004186522A (en) * 2002-12-05 2004-07-02 Renesas Technology Corp Manufacture method of semiconductor device
JP4899308B2 (en) * 2003-11-27 2012-03-21 Ｊｓｒ株式会社 Hot melt adhesive composition

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI627666B (en) * 2012-12-26 2018-06-21 Disco Corp Processing method of wafer
CN113941952A (en) * 2021-11-01 2022-01-18 徐州领测半导体科技有限公司 Double-side polishing process of semiconductor wafer
CN115725240A (en) * 2022-11-18 2023-03-03 无锡市恒利弘实业有限公司 Wafer polishing solution composition
CN115725240B (en) * 2022-11-18 2024-03-01 无锡市恒利弘实业有限公司 Wafer polishing solution composition

Also Published As

Publication number Publication date
JPWO2006090650A1 (en) 2008-07-24
WO2006090650A1 (en) 2006-08-31

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