[go: up one dir, main page]

TW200631154A - Inner bridges for chip-to-chip interconnections in a multi-chip IC package - Google Patents

Inner bridges for chip-to-chip interconnections in a multi-chip IC package

Info

Publication number
TW200631154A
TW200631154A TW094138120A TW94138120A TW200631154A TW 200631154 A TW200631154 A TW 200631154A TW 094138120 A TW094138120 A TW 094138120A TW 94138120 A TW94138120 A TW 94138120A TW 200631154 A TW200631154 A TW 200631154A
Authority
TW
Taiwan
Prior art keywords
chip
additional
lead frame
package
interconnections
Prior art date
Application number
TW094138120A
Other languages
Chinese (zh)
Inventor
Ting-Fong Dai
Ming-Jie Wu
Original Assignee
Koninkl Philips Electronics Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninkl Philips Electronics Nv filed Critical Koninkl Philips Electronics Nv
Publication of TW200631154A publication Critical patent/TW200631154A/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49575—Assemblies of semiconductor devices on lead frames
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49113—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/10251—Elemental semiconductors, i.e. Group IV
    • H01L2924/10253—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Wire Bonding (AREA)

Abstract

One or more "bridges" are integrated into the MCM lead frame to provide a medium for chip-to-chip connections. In an example embodiment, a semiconductor device comprises a first a first lead frame adapted and located for a first IC chip at a first die-securing location and an additional lead frame adapted and located for an additional IC chip at an additional die-securing location. Each of the first and second lead frames have respective sets of bonding fingers adapted to provide electrically-bonding connection to the respective first and second IC chips; at least one lead frame bridge is adapted to couple a bonding pad of the first IC chip with a bonding pad of the additional IC chip.
TW094138120A 2004-11-03 2005-10-31 Inner bridges for chip-to-chip interconnections in a multi-chip IC package TW200631154A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US62494504P 2004-11-03 2004-11-03

Publications (1)

Publication Number Publication Date
TW200631154A true TW200631154A (en) 2006-09-01

Family

ID=36010972

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094138120A TW200631154A (en) 2004-11-03 2005-10-31 Inner bridges for chip-to-chip interconnections in a multi-chip IC package

Country Status (2)

Country Link
TW (1) TW200631154A (en)
WO (1) WO2006048836A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102006033023A1 (en) * 2006-07-17 2008-01-24 Robert Bosch Gmbh Semiconductor arrangement, has retaining substrate and controlling structure, which are formed by punched grid, and semiconductor is provided, which is pasted and soldered on punched grid, and is connected by electrical round plates

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55127032A (en) * 1979-03-24 1980-10-01 Mitsubishi Electric Corp Plastic molded type semiconductor device
JPH0671061B2 (en) * 1989-05-22 1994-09-07 株式会社東芝 Resin-sealed semiconductor device
JPH05206365A (en) * 1992-01-30 1993-08-13 Fuji Electric Co Ltd Semiconductor device and its lead frame for assembling
JP2708320B2 (en) * 1992-04-17 1998-02-04 三菱電機株式会社 Multi-chip type semiconductor device and manufacturing method thereof
JPH06151685A (en) * 1992-11-04 1994-05-31 Mitsubishi Electric Corp Mcp semiconductor device
JPH06151657A (en) * 1992-11-06 1994-05-31 Sanken Electric Co Ltd Semiconductor device and its manufacture

Also Published As

Publication number Publication date
WO2006048836A1 (en) 2006-05-11

Similar Documents

Publication Publication Date Title
TW200503221A (en) Semiconductor device having a bond pad and method therefor
TW200644218A (en) Multi-chip module and method of manufacture
TW200520120A (en) Semiconductor device package and method for manufacturing same
SG88741A1 (en) Multichip assembly semiconductor
TW200729434A (en) Semiconductor package having improved thermal performance
SG130987A1 (en) System in package (sip) structure
EP1401020A4 (en) Semiconductor device and manufacturing method thereof
MY135947A (en) Dual-die integrated circuit package
EP2228822A3 (en) Flexible Packaging for Chip-on-Chip and Package-on-Package Technologies
WO2004034432A3 (en) Power mosfet
SG137738A1 (en) Lead frame and semiconductor device using the same
EP1280203A3 (en) 3D-Semiconductor Package
SG121890A1 (en) Bond pad for flip chip package
FR2720190B1 (en) Method for connecting the output pads of an integrated circuit chip, and multi-chip module thus obtained.
TW200504963A (en) Multi-chip semiconductor package and manufacturing method thereof
TW200705620A (en) Relay board and semiconductor device having the relay board
TW200618231A (en) Semiconductor package including rivet for bonding of lead posts
TW555152U (en) Structure of flip chip package with area bump
NL1027869A1 (en) Multi-chip package.
US6953994B2 (en) Wireless coupling of staked dies within system in package
HK1042591A1 (en) Planarized plastic package modules for integrated circuits.
TW200731502A (en) Stacked integrated circuit chip assembly
TW200631154A (en) Inner bridges for chip-to-chip interconnections in a multi-chip IC package
TW200644207A (en) Semiconductor device chip and semiconductor device chip package
TW200737465A (en) A semiconductor connection package for an integrated circuit, a method of connecting a semiconductor connection package to an integrated circuit and an apparatus