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TW200607054A - Semiconductor package - Google Patents

Semiconductor package

Info

Publication number
TW200607054A
TW200607054A TW093124319A TW93124319A TW200607054A TW 200607054 A TW200607054 A TW 200607054A TW 093124319 A TW093124319 A TW 093124319A TW 93124319 A TW93124319 A TW 93124319A TW 200607054 A TW200607054 A TW 200607054A
Authority
TW
Taiwan
Prior art keywords
heat sink
encapsulant
die pad
semiconductor package
chip
Prior art date
Application number
TW093124319A
Other languages
Chinese (zh)
Other versions
TWI241692B (en
Inventor
Hung-Sheng Chen
Yaw-Yuh Yang
Original Assignee
Advanced Semiconductor Eng
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Semiconductor Eng filed Critical Advanced Semiconductor Eng
Priority to TW093124319A priority Critical patent/TWI241692B/en
Application granted granted Critical
Publication of TWI241692B publication Critical patent/TWI241692B/en
Publication of TW200607054A publication Critical patent/TW200607054A/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Abstract

A semiconductor package includes a leadframe, a chip, a heat sink and an encapsulant. The leadframe includes a die pad and a plurality of leads, and the die pad has an upper surface and a lower surface opposite to the upper surface. The chip is mounted on the upper surface of the die pad and electrically connected to the leads. The heat sink has an upper surface and a lower surface opposite to the upper surface, wherein the upper surface of the heat sink is mounted on the lower surface of the die pad, the heat sink is provided with an annular groove disposed in the upper surface thereof. The leadframe, the chip and the heat sink are encapsulated by the encapsulant, and a part of the leads and the heat sink are exposed out of the encapsulant, wherein the encapsulant is engaged with the annular groove.
TW093124319A 2004-08-13 2004-08-13 Semiconductor package TWI241692B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW093124319A TWI241692B (en) 2004-08-13 2004-08-13 Semiconductor package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW093124319A TWI241692B (en) 2004-08-13 2004-08-13 Semiconductor package

Publications (2)

Publication Number Publication Date
TWI241692B TWI241692B (en) 2005-10-11
TW200607054A true TW200607054A (en) 2006-02-16

Family

ID=37014024

Family Applications (1)

Application Number Title Priority Date Filing Date
TW093124319A TWI241692B (en) 2004-08-13 2004-08-13 Semiconductor package

Country Status (1)

Country Link
TW (1) TWI241692B (en)

Also Published As

Publication number Publication date
TWI241692B (en) 2005-10-11

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees