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TW200534447A - Bump and the fabricating method thereof - Google Patents

Bump and the fabricating method thereof Download PDF

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Publication number
TW200534447A
TW200534447A TW93109016A TW93109016A TW200534447A TW 200534447 A TW200534447 A TW 200534447A TW 93109016 A TW93109016 A TW 93109016A TW 93109016 A TW93109016 A TW 93109016A TW 200534447 A TW200534447 A TW 200534447A
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Taiwan
Prior art keywords
tin
bump
copper
lead
weight percentage
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TW93109016A
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Chinese (zh)
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TWI247396B (en
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Shyh-Ing Wu
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Advanced Semiconductor Eng
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Publication of TWI247396B publication Critical patent/TWI247396B/en

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Abstract

A bump for a chip is described. The composition of the bump comprises tin(Sn), lead(Pb), and copper(Cu). The weight percent of the Sn, Pb, and Cu are about 61.5%-62.5%, 35.5%-36.5%, and 1.5%-2.5%, respectively. Compared with the 63% Sn 37% Pb bumps, the bump provided above has better reliability and the reflow temperature is similar to the 63% Sn 37% Pb bumps.

Description

200534447 五、發明說明(1) 發明所屬之技術領域 本發明是有關於一種凸塊及其製造方法,且特別是 有關於一種錫鉛凸塊及其製造方法。 先前技術 在積體電路(I C )封裝的技術領域中,第一層級封 裝(First Level Package)主要係將晶粒(chip)連接 到承載器(ca r r i er )上,大致上有三種封裝型態,分別 為打線技術(wire bonding)、貼帶自動接合技術 (Tape Automatic Bonding,TAB)及覆晶接合技術 (Flip Chip,F/C)。其中,無論是貼帶自動接合技術 (TAB)或是覆晶接合技術(F/C) ’在晶粒與承載器在 接合的過程中,均須在晶圓(wafer)的銲墊(pad)上 進行凸塊製作’並以凸塊(bump)作為晶粒與承載器之 間電性連接的媒介。習知之凸塊的種類繁多,較為常見 的有錫錯凸塊(Solder Bump)、金凸塊(Gold Bump )、導電膠凸塊(Conductive Polymer Bump)及高分子 凸塊(Polymer Bump)等四種,其中又以錫錯凸塊的應 用最為廣泛。 目前錫鉛凸塊之常見的製作方式係在晶圓之銲墊上 方,先以蒸鍵(Evaporation)、賤鑛(Sputter)或電 鍍(Plating)的方式,於預定位置上製作一球底金屬層 (Under Ball Metallurgy, UBM)。之後’再將一厚光 阻形成於晶圓之上,並對此厚光阻層進行曝光與顯影製 程,而在厚光阻層内形成多個開口 ,且球底金屬層分別200534447 V. Description of the invention (1) Field of the invention The present invention relates to a bump and a manufacturing method thereof, and more particularly to a tin-lead bump and a manufacturing method thereof. Prior art In the technical field of integrated circuit (IC) packaging, the first level package (First Level Package) is mainly used to connect a chip to a carrier (ca ri er), there are roughly three types of packaging , Respectively, wire bonding technology, tape automatic bonding technology (TAB) and flip chip bonding technology (F / C). Among them, whether it is tape automatic bonding technology (TAB) or flip-chip bonding technology (F / C) 'During the bonding process of the die and the carrier, it must be on the wafer pad (pad) The bumps are fabricated on the substrate, and the bumps are used as a medium for the electrical connection between the die and the carrier. There are many types of bumps that are known. There are four kinds of solder bumps: Solder Bump, Gold Bump, Conductive Polymer Bump, and Polymer Bump. Among them, the tin bump is the most widely used. At present, the common manufacturing method of tin-lead bumps is above the solder pads of the wafer. First, a ball-bottom metal layer is formed at a predetermined position by means of evaporation, sputter, or plating. (Under Ball Metallurgy, UBM). After that, a thick photoresist is formed on the wafer, and the thick photoresist layer is exposed and developed, and multiple openings are formed in the thick photoresist layer.

12632TWF.PTD 第5頁 200534447 五、發明說明(2) 藉由這些開口暴露於外。然後’使用蒸鑛(eVap〇rati〇f )、電鍍或印刷(printing )等製作方法,將錫鉛銲料 (solder paste )填入開口内,並進行一迴銲(reflow )製程。迴銲之後,在球底金屬層上便形成了具有類似 球狀外貌的錫鉛凸塊。 承上所述,球底金屬層通常可分為黏著層 (adhesion layer)、阻障層(barrier layer)以及沾 錫層(wetting Layer),其中黏著層之材質通常為鈦 (Ti),阻障層之材質通常為鎳釩合金(Niv),而沾踢 層之材質通常為銅(Cu)。沾錫層與錫鉛凸塊連接,而 接著層與晶片的線路層連接。就錫鉛凸塊而言,當錫錯 凸塊長時間處於高溫的環境下,在錫錯凸塊與球底金屬 層之介面處容易產生銅錫的介金屬化合物 (Intermetal 1 ic Compound, IMC)例如Cu3Sn 與Cu6Sn5 , 或錫鎳銅介金屬化合物(Sn_Ni-Cu IMC)等。由於介金 屬化合物中的銅金屬與鎳金屬大部分來自於球底金屬 層,因此,錫鉛凸塊在高溫及/或高電流密度的情況下操 作時,會產生球底金屬層消耗的問題。換言之,當球底 金屬層之鎳或銅金屬被消耗殆盡時,凸塊中的錫金屬便 有可能侵入晶片内部,因而造成晶片失效。 此外’在面溫及/或南電流後度操作下所產生的電致 遷移效應(electromigration effect)常會在凸塊内部 造成微小空孔(v 〇 i d ),當微小空孔聚集後就可能造成 電性連接中斷。上述兩種原因都是造成錫鉛凸塊與晶片12632TWF.PTD Page 5 200534447 V. Description of the invention (2) Exposed through these openings. Then, using a manufacturing method such as eVaporatif, plating, or printing, a tin-lead solder (solder paste) is filled into the opening, and a reflow process is performed. After re-soldering, tin-lead bumps with a ball-like appearance were formed on the ball-bottom metal layer. As mentioned above, the ball bottom metal layer can generally be divided into an adhesion layer, a barrier layer, and a wetting layer. The material of the adhesion layer is usually titanium (Ti) and barrier. The material of the layer is usually nickel-vanadium alloy (Niv), and the material of the kick layer is usually copper (Cu). The soldering layer is connected to the tin-lead bump, and the subsequent layer is connected to the circuit layer of the wafer. As for tin-lead bumps, when the tin-bumps are exposed to high temperature for a long time, copper-tin intermetallic compounds (IMC) are likely to be produced at the interface between the tin-bumps and the ball-bottom metal layer. For example, Cu3Sn and Cu6Sn5, or Sn-Ni-Cu IMC. Since most of the copper metal and nickel metal in the intermetallic compound come from the ball bottom metal layer, when the tin-lead bump is operated under high temperature and / or high current density, the problem of the ball bottom metal layer consumption will occur. In other words, when the nickel or copper metal of the ball bottom metal layer is consumed, the tin metal in the bumps may invade the inside of the wafer, thereby causing the wafer to fail. In addition, the electromigration effect generated under the surface temperature and / or south current operation often causes micro voids (v oid) inside the bumps. When the micro voids gather, it may cause electrical voids. Sexual connection was interrupted. Both of the above reasons are caused by tin-lead bumps and wafers

200534447 五、發明說明(3) 電性連接中 發明内容 有鑒於 改善介金屬 題。 此外, 法,以改善 基於上 其適於配置 以及銅,其 而錯的重量 百分比係介 基於上 其適於配置 以及銅,其 間,而銅的 基於上 其適於配置 以及銅,其 重量百分比 基於上 作方法,其 而凸塊製作 一焊墊上形 斷的原因之一。 此,本發明的目的就是在提供一種凸塊,以 化合物所引起的可靠度(r e 1 i a b i 1 i t y )問 本發明的再一目的是提供一種凸塊製作方 介金屬化合物所產生的可靠度問題。 述目的或其他目的,本發明提出一種凸塊, 在一晶片上,而凸塊之材質例如包括錫、姑 中錫的重量百分比係介於61. 5%-6 2. 5%之間, 百分比係介於35. 5%-36. 5%之間,且銅的重量 於1 · 5%-2. 5% 之間。 述目的或其他目的,本發明提出一種凸塊, 在一晶片上,而凸塊之材質例如包括錫、鉛 中錫、鉛的重量百分比係介於9 7. 5%-98. 5%之 重量百分比係介於1 . 5%-2. 5%之間。 述目的或其他目的,本發明提出一種凸塊, 在一晶片上,而凸塊之材質例如包括錫、錯 中錫、鉛的重量百分比係不小於9 8 %,而銅的 係不大於2 %。 述目的或其他目的,本發明提出一種凸塊製 適於在一晶圓之多個焊墊上製作多個凸塊, 方法例如包括下列步驟。首先,於晶圓之每 成一焊料(solder paste),而焊料之材質200534447 V. Description of the invention (3) In the electrical connection Summary of the invention In view of improving the problem of intermetallics. In addition, the method to improve the weight percentage based on its suitable configuration and copper is based on its suitable configuration and copper, and the copper percentage is based on its suitable configuration and copper, and its weight percentage is based on The above method is one of the reasons why the bumps are broken on a solder pad. Therefore, the object of the present invention is to provide a bump. The reliability caused by the compound (re 1 iabi 1 ity) is asked. Another object of the present invention is to provide a reliability problem caused by the production of a bump-shaped metal compound. . For the stated purpose or other purposes, the present invention proposes a bump on a wafer, and the material of the bump, for example, includes tin, and the weight percentage of tin is between 61.5% -6 2.5%, the percentage It is between 35.5% -36.5%, and the weight of copper is between 1.5% -2.5%. The purpose or other purposes, the present invention proposes a bump on a wafer, and the material of the bump, for example, includes tin, lead, tin, lead, the weight percentage is between 9 7. 5% -98. 5% by weight The percentage is between 1.5% and 2.5%. For the stated purpose or other purposes, the present invention proposes a bump on a wafer, and the material of the bump includes, for example, tin, misintermediate tin, and lead in a weight percentage of not less than 98%, and a copper content of not more than 2% . For the stated purpose or other purposes, the present invention provides a bump system suitable for manufacturing a plurality of bumps on a plurality of bonding pads of a wafer. The method includes the following steps, for example. First, a solder paste is formed on each wafer, and the material of the solder is

12632TWF.I 第7頁 200534447 五、發明說明(4) 包括錫、鉛以及銅,其中錫的重量百分比係介於 6 1 . 5 % - 6 2 . 5 %之間,而鉛的重量百分比係介於 35. 5 %-36. 5%之間,且銅的重量百分比係介於1.5%-2.5 % 之間。隨後,對這些焊料進行迴焊。 依照本發明較佳實施例所述之凸塊製作方法,上述 之焊料的形成方法例如為印刷(P r i n t i n g )。 基於上述目的或其他目的,本發明提出一種凸塊製 作方法,其適於在一晶圓之多個焊墊上製作多個凸塊, 而凸塊製作方法包括下列步驟。首先,於晶圓之每一焊 墊上形成一焊料,而焊料之材質包括錫、鉛以及銅,其 中錫、錯的重量百分比係介於97. 5%-98.5%之間,而銅的 重量百分比係介於1 . 5%-2. 5%之間。隨後,對這些焊料進 行迴焊。 依照本發明較佳實施例所述之凸塊製作方法,上述 之焊料的形成方法例如為印刷。 基於上述目的或其他目的,本發明提出一種凸塊製作方 法,其適於在一晶圓之多個焊墊上製作多個凸塊,而凸 塊製作方法包括下列步驟。首先,於晶圓之每一焊墊上 印刷形成一焊料,而焊料之材質包括錫、鉛以及銅,其 中錫、錯的重量百分比係不小於98%,而銅的重量百分比 係不大於2 %。隨後,對這些焊料進行迴焊。 依照本發明較佳實施例所述之凸塊製作方法,上述之焊 料的形成方法例如為印刷。 基於上述,本發明之凸塊成分能夠減緩球底金屬層12632TWF.I Page 7 200534447 V. Description of the Invention (4) Including tin, lead and copper, where the weight percentage of tin is between 6 1.5%-6 2.5%, and the weight percentage of lead is referred to Between 35.5% and 36.5%, and the weight percentage of copper is between 1.5% and 2.5%. These solders are then re-soldered. According to the bump manufacturing method according to the preferred embodiment of the present invention, the above-mentioned solder forming method is, for example, printing (P r i n t i n g). Based on the foregoing or other objectives, the present invention provides a bump manufacturing method, which is suitable for manufacturing a plurality of bumps on a plurality of pads of a wafer, and the bump manufacturing method includes the following steps. First, a solder is formed on each pad of the wafer, and the material of the solder includes tin, lead, and copper, wherein the weight percentage of tin and copper is between 97.5% -98.5%, and the weight percentage of copper It is between 1.5% and 2.5%. These solders are then re-soldered. According to the bump manufacturing method described in the preferred embodiment of the present invention, the above-mentioned method for forming the solder is, for example, printing. Based on the foregoing or other objectives, the present invention provides a bump manufacturing method, which is suitable for manufacturing a plurality of bumps on a plurality of bonding pads of a wafer, and the bump manufacturing method includes the following steps. First, a solder is printed on each solder pad of the wafer, and the material of the solder includes tin, lead, and copper. The weight percentage of tin and copper is not less than 98%, and the weight percentage of copper is not more than 2%. These solders are then re-soldered. According to the bump manufacturing method described in the preferred embodiment of the present invention, the above-mentioned solder forming method is, for example, printing. Based on the above, the bump component of the present invention can slow down the ball-bottom metal layer

12632TWF.PTD 第8頁 200534447 五、發明說明(5) ----- 的消f ^率,以改善凸塊與晶片之間的接合可靠度。 顯易僅,下文特舉一較佳實丨的“特:和優點能更明 詳細說明如下。Γ實施例,並配合所附圖式,作 實施方式 37。/ Λ於ΛΛ技W凸塊組成成分主要為m的錫以及 &/° 1f二=# p t組成成分之凸塊並不能夠符合高溫 二上U Λ曰,的需求,原因在於:錫錯凸塊 今Μ4上的球底金屬層之間會反應生成介 ΐ ϊίί+i ff底金屬層逐漸消耗而喪失功能,此 、兄下择二鬼i二^b37 )在高溫及/或高電流密度的情 月電i遠桩中齡有1:的產生,進而導致錫鉛凸塊與晶 本發明即針對上述現象進行凸塊成分 =1正,以確實改善球底金屬層逐漸消耗以及孔 等問題。 首先’本實施例針對重量百分比為63%錫37%鉛之凸 塊進仃可靠度實驗’並針對電流強度與凸塊溫度對於凸 塊與晶片連接的可靠度之影響進行評估。 請參考第1圖’其表列出重量百分比為6 3 %錫3 7%鉛之 凸塊之可靠度實驗數據圖。首先,針對項次内容進行說 明。首次失效代表實驗母體樣本中首次出現失效樣本的 時間’而6 3 · 2 0 %則代表累積失效樣本佔實驗母體樣本的 63 · 2 0%所需時間。當樣本在操作電流為160mA且操作溫度 為1 5 0 C的條件下進行測試時,首次失效出現時間為3 9 〇12632TWF.PTD Page 8 200534447 V. Explanation of the invention (5) ----- The rate of elimination of ^ to improve the reliability of the bonding between the bump and the wafer. It ’s easy to see, the following is a better practice. "Features: and advantages can be explained in more detail as follows. Γ Example, and in conjunction with the attached drawings, make Embodiment 37. / Λ 于 ΛΛ 技术 W convex block composition The composition is mainly tin with m and & / ° 1f 二 = # pt. The bumps of the composition cannot meet the requirements of U Λ at high temperature, because the tin bottom bump is the metal layer on the bottom of the ball. Intermediate reactions will generate ΐ ΐίί + i ff the bottom metal layer is gradually depleted and loses its function. Therefore, my brother chooses two ghosts i2 ^ b37) at middle age at high temperature and / or high current density The generation of 1: leads to tin-lead bumps and crystals. In the present invention, the bump component = 1 is positive for the above-mentioned phenomenon, so as to improve the problems of gradual consumption and holes of the bottom metal layer. 63% tin 37% lead bump reliability test 'and evaluate the impact of current strength and bump temperature on the reliability of the bump-to-chip connection. Please refer to Figure 1' The weight percentages listed in the table are Reliability experimental data chart of 6 3% tin 3 7% lead bumps. First The content is explained. The first failure represents the time of the first failure sample in the experimental matrix sample, and 6 3 · 20% represents the time required for the cumulative failure sample to account for 63 · 20% of the experimental matrix sample. When the test is performed at an operating current of 160 mA and an operating temperature of 150 C, the first failure time is 3 9 〇

12632TWF.PTD 第9頁 200534447 五、發明說明(6) 小時,而到達6 3 · 2 0 %失效率之時間為5 0 6小時。當樣本在 操作電流為1 6 0 m A且操作溫度為1 6 0 °C的條件下進行測試 時,首次失效出現時間則縮短為2 2 7小時,而到達63. 20% 失效率之時間僅為3 0 7小時。當樣本在操作電流為32 0mA 且操作溫度為1 5 0 C的條件下進行測試時,首次失效出現 時間則縮短為2 1 6小時,而到達6 3 · 2 0 %失效率之時間為 3 0 7小時。由上述實驗數據可推論,對於63%錫37%鉛之凸 塊而言,不論是操作溫度的提高或是電流密度的提高, 都會使得凸塊的壽命縮短,造成可靠度下降。 承上所述,本發明之較佳實施例提出一種凸塊,其 適於配置在一晶片上,而凸塊之材質例如包括錫、鉛以 及銅,其中錫、鉛的重量百分比係介於9 7. 5%-98. 5%之 間, 而銅的重量百分比係介於丨· 5 2 · 5 %之間。然而,較佳之 錫的重量百分比係介於61. 5%-6 2· 5%之間,而鉛的重量百 分比係介於35· 5%-3 6· 5%之間。以下將針對本實施例之錫 鉛凸塊與其他不同錫鉛比例之錫鉛凸塊進行實驗,並分 別對各種組成成分之凸塊進行可靠度的評估。 請參考第2圖,其表列出各種不同重量百分比例之錫 錯凸塊之可靠度實驗數據圖。當樣本在操作電流為32 〇mA 且操作溫度為1 5 0 °C的條件下進行測試時,就9 5 %鉛5 %錫 之凸塊、9 0 %鉛1 0 %錫之凸塊以及6 3 %錫3 7 %鉛之凸塊而 言,首次失效時間分別為3 1 5 0小時、1 7 2 8小時與2 1 6小 時’而到達6 3 · 2 %失效率的時間分別為3 9 2 9小時、1 9 7 0小12632TWF.PTD Page 9 200534447 V. Description of the invention (6) hours, and the time to reach 6 3 · 20% failure rate is 506 hours. When the sample is tested at an operating current of 160 m A and an operating temperature of 160 ° C, the first failure time is reduced to 2 2 7 hours, and the time to reach 63. 20% failure rate is only For 3 0 7 hours. When the sample is tested at an operating current of 32 0mA and an operating temperature of 150 ° C, the time to first failure is reduced to 2 16 hours, and the time to reach 6 3 · 2 0% failure rate is 3 0 7 hours. From the above experimental data, it can be inferred that, for the bumps of 63% tin and 37% lead, no matter whether the operating temperature is increased or the current density is increased, the life of the bumps will be shortened and the reliability will be reduced. As mentioned above, a preferred embodiment of the present invention provides a bump that is suitable for being disposed on a wafer. The material of the bump includes, for example, tin, lead, and copper. The weight percentage of tin and lead is between 9 and 9. 7. 5% -98. 5%, and the weight percentage of copper is between 丨 · 5 2 · 5%. However, the preferred weight percentage of tin is between 61.5% -6 2 · 5%, and the weight percentage of lead is between 35 · 5% -3 6 · 5%. In the following, experiments will be performed on the tin-lead bumps of this embodiment and other tin-lead bumps with different tin-lead ratios, and the reliability evaluations of the bumps of various compositions will be performed respectively. Please refer to Figure 2 for a table of reliability test data of various tin weight bumps with different weight percentages. When the samples were tested at an operating current of 32 〇mA and an operating temperature of 150 ° C, 95% lead 5% tin bumps, 90% lead 10% tin bumps, and 6 For 3% tin, 37% lead bumps, the first failure time is 3 150 hours, 17 2 8 hours, and 2 16 hours, and the time to reach 6 3 · 2% failure rate is 3 9 2 9 hours, 1 9 7 0 hours

12632TWF.PTD 第10頁 200534447 五、發明說明(7) 時與307小時。由第2圖可清楚得知,高鉛凸塊的可靠度 較佳,較適用於高溫及/或高電流密度操作。值得注意的 是,雖然凸塊中鉛的重量百分比含量越高,其可靠度壽 命也越高,但是高鉛凸塊所需迴焊的溫度較高,而熟悉 此技藝者均能瞭解迴焊的溫度越高將會產生一系列的熱 問題,因此目前趨勢為迴焊溫度越低越好。 請再參考第2圖,對於6 2 %鉛3 6 %錫2 %銅之凸塊,及 6 3 %錫3 7 %鉛之凸塊而言,首次失效時間分別為7 5 2小時與 2 1 6小時,而到達6 3 . 2 %之失效率的時間分別為1 3 6 9小時 與3 0 7小時。因此,本發明採用1. 5 %至2 . 5 %的銅便可大幅 地提高可靠度壽命。此外,由於本發明之凸塊成分組成 與6 3 %鉛3 7 %錫之凸塊組成成分相近,故兩種凸塊的迴焊 溫度相近。另外,對於本發明所提出之凸塊,其製作方 法詳述如後。 本發明提出一種凸塊製作方法,其適於在一晶圓之 多個焊墊上製作多個凸塊,而凸塊製作方法包括下列步 驟。首先,於晶圓之每一焊墊上形成一焊料,而焊料之 材質包括錫、錯以及銅,其中錫、錯的重量百分比係介 於97. 5%-98. 5%之間,而銅的重量百分比係介於 1 . 5 % _ 2. 5 %之間。值得注意的是,上述之錫與鉛的含量較 佳為錫的重量百分比介於61. 5%-62. 5%之間,而錯的重量 百分比介於35. 5%-36. 5%之間,其中錫與鉛的含量亦可以 是其他比例。或者,錫與鉛的重量百分比係不小於9 8%, 而銅的重量百分比係不大於2 %。隨後,對這些焊料進行12632TWF.PTD Page 10 200534447 V. Description of invention (7) and 307 hours. It is clear from Figure 2 that the high-lead bumps have better reliability and are more suitable for high temperature and / or high current density operations. It is worth noting that although the higher the weight percentage of lead in the bumps, the higher the reliability life, but the high temperature of reflow soldering of high lead bumps, and those familiar with this technology can understand the reflow A higher temperature will cause a series of thermal problems, so the current trend is that the lower the reflow temperature, the better. Please refer to Figure 2 again. For 62% lead, 36% tin, 2% copper bumps, and 63% tin, 37% lead bumps, the first failure times are 7 5 2 hours and 2 1 6 hours, and the time to reach 63.2% failure rate was 139 hours and 307 hours. Therefore, the present invention can significantly improve the reliability life by using copper of 1.5% to 2.5%. In addition, since the composition of the bumps of the present invention is similar to that of 63% lead and 37% tin, the reflow temperature of the two bumps is similar. In addition, the method of making the bumps proposed by the present invention will be described in detail later. The invention provides a bump manufacturing method, which is suitable for manufacturing a plurality of bumps on a plurality of bonding pads of a wafer, and the bump manufacturing method includes the following steps. First, a solder is formed on each pad of the wafer, and the material of the solder includes tin, copper, and copper, wherein the weight percentage of tin and copper is between 97.5% -98.5%, and copper The weight percentage is between 1.5% and 2.5%. 5% -36. 5% 的。 It is worth noting that the above-mentioned content of tin and lead is preferably between 61.5% -62.5% by weight of tin, and the wrong weight percentage is between 35.5% -36.5% Meanwhile, the content of tin and lead may be other ratios. Alternatively, the weight percentage of tin and lead is not less than 98%, and the weight percentage of copper is not more than 2%. Subsequently, the solder

12632TWF.PTD 第11頁 200534447 五、發明說明(8) 迴焊,而焊料的形成方法例如為印刷。值得一提的是, 相較於習知使用蒸鍍或電鍍製程形成銲料,本實施例之 銲料形成方法為印刷,因此本發明之凸塊製造方法具有 成本上的優勢。 綜上所述,本發明之凸塊及其製作方法具有下列優 點: 一、 本發明之凸塊中除了錫鉛之外,更具有重量百 分比係介於1. 5 % - 2 . 5 %之間的銅金屬,所以相較於習知 6 3 %錫3 7 %鉛之凸塊,本發明之凸塊具有較佳的可靠度。 二、 本發明之凸塊具有重量百分比係介於1. 5 2. 5 % 之間的銅金屬且錯的重量百分比係介於35. 5%-36. 5%之 間,所以迴焊的溫度與習知6 3%錫3 7%鉛之凸塊相近。 三、 相較於習知的凸塊製作方法,本發明之凸塊製 作方法採用印刷的方式形成銲料具有成本上的優勢。 雖然本發明已以較佳實施例揭露如上,然其並非用 以限定本發明,任何熟習此技藝者,在不脫離本發明之 精神和範圍内,當可作些許之更動與潤飾,因此本發明 之保護範圍當視後附之申請專利範圍所界定者為準。12632TWF.PTD Page 11 200534447 V. Description of the invention (8) Reflow soldering, and the method of forming solder is, for example, printing. It is worth mentioning that, compared with the conventional method for forming solder by using the evaporation or electroplating process, the solder forming method of this embodiment is printing, so the bump manufacturing method of the present invention has a cost advantage. In summary, the bumps of the present invention and the manufacturing method thereof have the following advantages: First, in addition to tin and lead, the bumps of the present invention have a weight percentage between 1.5%-2.5%. Copper metal, so compared with the conventional 63% tin 37% lead bumps, the bumps of the present invention have better reliability. Second, the bumps of the present invention have a weight percentage of copper metal between 1.5.2.5% and a wrong weight percentage of between 35.5% -36.5%, so the temperature of reflow Similar to the conventional 6 3% tin 3 7% lead bump. 3. Compared with the conventional bump manufacturing method, the bump manufacturing method of the present invention has a cost advantage in forming solder by printing. Although the present invention has been disclosed in the preferred embodiment as above, it is not intended to limit the present invention. Any person skilled in the art can make some modifications and retouching without departing from the spirit and scope of the present invention. Therefore, the present invention The scope of protection shall be determined by the scope of the attached patent application.

12632TWF.PTD 第12頁 200534447 圖式簡單說明 第1圖表列出重量百分比為6 3 %錫3 7 %鉛之凸塊之可靠 度實驗數據圖。 第2圖表列出各種不同重量百分比例之錫鉛凸塊之可 靠度實驗數據圖。12632TWF.PTD Page 12 200534447 Brief description of the diagram The first chart shows the reliability test data of the bumps with a weight percentage of 63% tin and 37% lead. Figure 2 shows the reliability test data of tin-lead bumps with different weight percentages.

12632TWF.PTD 第13頁12632TWF.PTD Page 13

Claims (1)

200534447 六、申請專利範圍 1. 一種凸塊,適於配置在一晶片上,該凸塊之材質 包括錫、鉛以及銅,其中錫的重量百分比係介於 61 . 5%-6 2. 5%之間,鉛的重量百分比係介於3 5. 5%-36. 5% 之間,而銅的重量百分比係介於1 . 5%-2. 5%之間。 2. —種凸塊,適於配置在一晶片上,該凸塊之材質 包括錫、錯以及銅,其中錫、錯的重量百分比係介於9 7. 5%-98.5%之間,而銅的重量百分比係介於1.5%_2.5%之 間。 3 —種凸塊,適於配置在一晶片上,該凸塊之材質包 括錫、鉛以及銅,其中錫、鉛的重量百分比係不小於 98%,而銅的重量百分比係不大於2%。 4 · 一種凸塊製作方法,適於在一晶圓之多數個焊墊 上製作多數個凸塊,該凸塊製作方法包括下列步驟: 於該晶圓之每一該些焊墊上形成一焊料,每一該些 焊料之材質包括錫、錯以及銅,其中錫的重量百分比係 介於6 1. 5%-6 2. 5%之間,鉛的重量百分比係介於 3 5 . 5 % - 3 6 . 5 %之間,而銅的重量百分比係介於1 . 5 % - 2 . 5 % 之間;以及 對該些焊料進行迴焊。 5.如申請專利範圍第4項所述之凸塊製作方法,其中 該些焊料的形成方法包括印刷。 6 · —種凸塊製作方法,適於在一晶圓之多數個焊墊 上製作多數個凸塊,該凸塊製作方法包括下列步驟: 於該晶圓之每一該些焊墊上形成一焊料,每一該些200534447 VI. Application for patent scope 1. A bump suitable for disposing on a wafer. The material of the bump includes tin, lead and copper, wherein the weight percentage of tin is between 61.5% -6 2.5% Between, the weight percentage of lead is between 35.5% to 36.5%, and the weight percentage of copper is between 1.5% to 2.5%. 2. —A kind of bump, suitable for disposing on a wafer. The material of the bump includes tin, copper and copper. The weight percentage of tin and copper is between 9 7.5% -98.5%, and copper The weight percentage is between 1.5% and 2.5%. 3—A kind of bump is suitable to be arranged on a wafer. The material of the bump includes tin, lead and copper, wherein the weight percentage of tin and lead is not less than 98%, and the weight percentage of copper is not more than 2%. 4. A bump manufacturing method suitable for manufacturing a plurality of bumps on a plurality of bonding pads of a wafer. The bump manufacturing method includes the following steps: forming a solder on each of the bonding pads of the wafer, each The materials of these solders include tin, copper and copper, wherein the weight percentage of tin is between 6 1.5% -6 2.5%, and the weight percentage of lead is between 35.5.5%-3 6 5%, and the weight percentage of copper is between 1.5%-2.5%; and reflow of these solders. 5. The bump manufacturing method according to item 4 of the scope of patent application, wherein the method of forming the solders includes printing. 6-A bump manufacturing method suitable for manufacturing a plurality of bumps on a plurality of pads of a wafer, the bump manufacturing method includes the following steps: forming a solder on each of the pads of the wafer, Every one 12632TWF.PTD 第14頁 200534447 六、申請專利範圍 焊料之材質包括錫、鉛以及銅,其中錫、鉛的重量百分 比係介於97. 5%-9 8. 5%之間,而銅的重量百分比係介於1 · 50/〇-2. 5%之間;以及 對該些焊料進行迴焊。 7. 如申請專利範圍第6項所述之凸塊製作方法,其中 該些焊料的形成方法包括印刷。 8. —種凸塊製作方法,適於在一晶圓之多數個焊墊 上製作多數個凸塊,該凸塊製作方法包括下列步驟: 於該晶圓之每一該些焊墊上印刷形成一焊料,每一 該些焊料之材質包括錫、鉛以及銅,其中錫、鉛的重量 百分比係不小於98%,而銅的重量百分比係不大於2% ;以 及 對該些焊料進行迴焊。 9. 如申請專利範圍第8項所述之凸塊製作方法,其中 該些焊料的形成方法包括印刷。12632TWF.PTD Page 14 200534447 VI. Scope of patent application Solder materials include tin, lead and copper, where the weight percentage of tin and lead is between 97.5% -9 8.5%, and the weight percentage of copper Is between 1.50 / 〇-2. 5%; and reflow of these solders. 7. The bump manufacturing method according to item 6 of the scope of patent application, wherein the method of forming the solders includes printing. 8. A bump manufacturing method suitable for manufacturing a plurality of bumps on a plurality of bonding pads of a wafer, the bump manufacturing method includes the following steps: forming a solder on each of the bonding pads of the wafer by printing The material of each of these solders includes tin, lead, and copper, wherein the weight percentage of tin and lead is not less than 98%, and the weight percentage of copper is not more than 2%; and the solder is reflowed. 9. The bump manufacturing method according to item 8 of the scope of patent application, wherein the method for forming the solders includes printing. 12632TWF.PTD 第15頁12632TWF.PTD Page 15
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