TW200528973A - Apparatus for saving power of a computer system - Google Patents
Apparatus for saving power of a computer system Download PDFInfo
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200528973 五、發明說明(1) ° 發明所屬之技術領域 本發明是有關於一種省電電路,且特別是有關於一 種電腦系統的省電電路。 先前技術 在電腦系統中,例如筆記型電腦,由於其中央處理 器(CPU)和其他週邊晶片組的效能不斷的提昇,並且許多 操作上的新功能陸續的加入,因而造成了筆記型電腦系 統對電力的需求大為增加。也因為如此,就需要更大的 電池容量才能維持筆記型電腦的待機時間在一定的水 準。因為筆記型電腦電池的容量增加,造成了電池的體 積也同樣地增加。這對於致力於縮小筆記型電腦體積的 各家廠商來說,縮小電池的體積,但是又要有足夠供給 筆記型電腦系統的電力,無疑地是一個非常重要的課 題。 習知的解決方法,係使用軟體來監控筆記型電腦系 統的運作情形。其原理是將筆記型電腦系統劃分出數個 區塊,並且監控區塊的用電情形。當某個區塊所控制之 裝置例如光碟機裝置處於閒置(I d 1 e )狀態的時候,就將 輸出到這個區塊的電力降低以節省電源。習知的技術是 依照使用者的習慣與工作環境需求,自行設定電源的輸 出方式,但是使用者通常不會記得更改為省電模式,故 無法達成省電的效果。 發明内容 .因此,本發明的目的就是在提供一種電腦系統之省200528973 V. Description of the invention (1) ° TECHNICAL FIELD OF THE INVENTION The present invention relates to a power-saving circuit, and more particularly to a power-saving circuit of a computer system. The previous technology in computer systems, such as notebook computers, has continuously improved the performance of its central processing unit (CPU) and other peripheral chipsets, and many new operating functions have been added, resulting in a notebook computer system. The demand for electricity has increased significantly. Because of this, a larger battery capacity is required to maintain the notebook's standby time at a certain level. As the capacity of the notebook computer battery increases, the battery volume also increases. This is undoubtedly a very important subject for various manufacturers who are committed to reducing the size of notebook computers, but to reduce the battery size, but also have sufficient power to supply notebook computer systems. A known solution is to use software to monitor the operation of the laptop system. The principle is to divide the notebook computer system into several blocks and monitor the electricity consumption of the blocks. When a device controlled by a certain block, such as an optical disc drive, is in an idle (I d 1 e) state, the power output to this block is reduced to save power. The conventional technology is to set the output mode of the power supply according to the user's habits and working environment requirements, but the user usually does not remember to change to the power saving mode, so it cannot achieve the effect of power saving. SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a computer system
12803TWF.PTD 第6頁 200528973 五、發明說明(2) 電電路,係 制其所需之 為達上 省電裝置, 負載偵測電 號係由電腦 之負載電壓 號,並將之 控制訊號來 在一般的情況 電腦 偵測 形, 供應 對直 輸入 接交 據輸 號0 腦系 以確 他目 負載 一個 產生 參考 省電 源供 下, 裝置 源供 電路 輸出 個實 用來 負載 電路 電壓 省電 發明 路和 壓訊 ,負 較之 路, 之動 應模 能正 所耦 是否 系統内 電路係 使得省 模組之 在本發 流轉換 電壓。 流對直 入電壓 依據電 電力, 述和其 係具有 路接收 系統所 訊號與 輸出至 控制電 之某一 依據電 電控制 電力的 明的一 電路, 另外, 流轉換 和參考 統内每 實達到 的,本 偵測電 負載電 。接著 電壓比 控制電 應模組 電源供 以使其 應模組 來決定 的效果 提供一 省電控 號,而 載偵測 後,會 省電控 作。 組係用 常運作 接之裝 降低或 施例中,負載偵測電路具有交流 接收負載電壓訊號而輸出直流的 偵測電路更具有比較模組,係耦 以接收輸入電壓。比較模組會依 二者比較的結果來輸出控制訊 個裝置運作的狀況來控 種電腦系統之 制電路。其中 此負載電壓訊 電路將所接收 產生控制訊 制電路係依據 來輸出電力至 。因此,負載 置的運作情 甚至關閉電源 本發明提供一種交流對直流轉換電路,係由第一濾 波電路與第二濾波電路串聯所構成。其中第一濾波電路 包括了第一電阻,其第一端係接收負載電壓訊號,以及 第一電容,其第一端係耦接第一電阻之第二端,而第一12803TWF.PTD Page 6 200528973 V. INTRODUCTION TO THE INVENTION (2) The electric circuit is used to achieve the power saving device. The load detection electric number is the load voltage number of the computer, and the control signal is used in Under normal circumstances, the computer detects the shape, supplies the direct input, and receives the data input number 0. The brain system is used to confirm that the load is generated. The reference power supply is provided. The device source is used to output the circuit to save the circuit voltage. If the circuit in the system is positively coupled to whether the dynamic response mode can be positively coupled, whether the internal module of the system converts the voltage at the current source. The flow-to-line voltage is based on electrical power, and it is a circuit that has a circuit that receives signals from the system and outputs to the control power based on the electrical power. In addition, the current conversion and reference system Detect electrical load power. Then the voltage ratio controls the power supply of the power supply module so that the effect determined by the power supply module provides a power saving control signal. After the load detection, the power saving control will be performed. The system is used for normal operation. The load detection circuit is lowered. In the embodiment, the load detection circuit has an AC receiving load voltage signal and a DC detection circuit has a comparison module, which is coupled to receive the input voltage. The comparison module will output the control signal according to the comparison result of the two devices to control the control circuit of the computer system. The load voltage signal circuit outputs power to the control signal circuit according to. Therefore, the operation of the load device is even turned off. The present invention provides an AC-to-DC conversion circuit, which is composed of a first filter circuit and a second filter circuit connected in series. The first filter circuit includes a first resistor, a first terminal of which receives a load voltage signal, and a first capacitor, a first terminal of which is coupled to a second terminal of the first resistor, and a first
12803TWF.PTD 第7頁 200528973 五、發明說明(3) 電容之第二端接地。而第二濾波電路則包括了第二電 阻,其第一端耦接第一電阻之第二端並且其第二端耦接 至比較模組,以及第二電容,其第一端耦接第二電阻之 第二端並且其第二端接地。 另外,比較模組包括了比較器,係將輸入電壓與參 考電壓作比較之後,輸出控制訊號。 而在本發明的一個實施例中,比較模組更包括解碼 器,係用來使比較模組依據負載電壓訊號進行解碼,以 透過比較模組的輸出得知電腦系統對各裝置的負載狀 況。 此外,上述所提及之省電控制電路具有開關,此開 關具有控制端、第一連接端和第二連接端。其中控制端 耦接負載偵測電路的輸出,係依據控制訊號來決定是否 導通第一連接端和第二連接端。開關的第一連接端耦接 控制晶片,而第二連接端則耦接控制電路。當第一連接 端和第二連接端導通的時候,控制晶片會透過控制電路 使得電源供應模組降低或甚至關閉輸出的電力。 開關包括電晶體開關,其閘極端係耦接控制端,其 中之一源/汲極端耦接第一連接端,而其另一源/汲極端 則耦接第二連接端。 從另一觀點來看,本發明提供一種電腦系統的省電 裝置,係依據電腦系統内之控制單元所產生的負載電壓 訊號,來控制電腦系統内數個電源供應模組的電力輸 出。本發明之省電裝置具有接收負載電壓訊號的偵測模12803TWF.PTD Page 7 200528973 V. Description of the invention (3) The second terminal of the capacitor is grounded. The second filter circuit includes a second resistor whose first terminal is coupled to the second terminal of the first resistor and whose second terminal is coupled to the comparison module, and a second capacitor whose first terminal is coupled to the second The second end of the resistor and its second end are grounded. In addition, the comparison module includes a comparator, which outputs a control signal after comparing the input voltage with a reference voltage. In one embodiment of the present invention, the comparison module further includes a decoder, which is used to make the comparison module decode according to the load voltage signal, so as to know the load status of the computer system to each device through the output of the comparison module. In addition, the power-saving control circuit mentioned above has a switch, and the switch has a control terminal, a first connection terminal, and a second connection terminal. The control terminal is coupled to the output of the load detection circuit and determines whether to connect the first connection terminal and the second connection terminal according to the control signal. The first connection terminal of the switch is coupled to the control chip, and the second connection terminal is coupled to the control circuit. When the first connection terminal and the second connection terminal are turned on, the control chip makes the power supply module reduce or even turn off the output power through the control circuit. The switch includes a transistor switch. The gate terminal is coupled to the control terminal. One of the source / drain terminals is coupled to the first connection terminal, and the other source / drain terminal is coupled to the second connection terminal. From another perspective, the present invention provides a power saving device for a computer system, which controls the power output of several power supply modules in the computer system based on the load voltage signals generated by the control unit in the computer system. The power saving device of the present invention has a detection mode for receiving a load voltage signal.
12803TWF.PTD 第8頁 200528973 五、發明說明(4) 組,此偵測模組還接收參考電壓。偵測模組會將負載電 壓訊號和參考電壓進行比較,然後再依據二者比較的結 果來輸出控制訊號。另外,本發明之省電裝置還具有省 電控制模組,係耦接偵測模組以接收控制訊號。並且省 電控制模組係依據控制訊號,來決定是否需要將電腦系 統内之電源供應模組至少其中之一降低或甚至關閉其輸 出電力。 在本發明的一個實施例中,偵測模組包括了負載偵 測電路以及微控制器。負載偵測電路係接收負載電壓訊 號和參考電壓,並且依據二者比較的結果來產生控制訊 號。而微控制器係耦接負載偵測電路,並依據負載偵測 電路的輸出來判斷電腦系統的負載狀況,且微控制器更 依據電腦系統的負載狀況,來決定是否使得電源供應模 組至少其中之一降低或甚至關閉其輸出電力。 又,當微控制器得知電腦的負載狀況後,會告知本 發明所提供之輔助軟體。此輔助軟體用來依據電腦系統 的負載狀況,來調整每一個電源供應模組的輸出電力。 另外,控制單元係藉由上述之輔助軟體,來控制電 腦系統内之時脈產生器的輸出時脈訊號之頻率大小。 同樣地,負載偵測電路包括了交流對直流轉換電路 以及比較模組。比較模組包括比較器和解碼器。比較器 係將輸入電壓與參考電壓作比較之後,輸出控制訊號。 而解碼器係使得比較模組依據負載電壓訊號來進行解 碼,以使微控制器能夠透過比較模組得知電腦系統内的12803TWF.PTD Page 8 200528973 V. Description of the Invention (4) Group, this detection module also receives the reference voltage. The detection module will compare the load voltage signal with the reference voltage, and then output the control signal based on the comparison result of the two. In addition, the power saving device of the present invention also has a power saving control module, which is coupled to the detection module to receive the control signal. And the power saving control module is based on the control signal to decide whether it is necessary to reduce or even turn off the output power of at least one of the power supply modules in the computer system. In one embodiment of the present invention, the detection module includes a load detection circuit and a microcontroller. The load detection circuit receives the load voltage signal and the reference voltage, and generates a control signal based on the comparison of the two. The microcontroller is coupled to the load detection circuit, and judges the load condition of the computer system based on the output of the load detection circuit. The microcontroller further determines whether to make the power supply module at least one of them according to the load condition of the computer system. One reduces or even turns off its output power. In addition, when the microcontroller learns the load condition of the computer, it will inform the auxiliary software provided by the present invention. This auxiliary software is used to adjust the output power of each power supply module according to the load condition of the computer system. In addition, the control unit controls the frequency of the clock signal output by the clock generator in the computer system through the above-mentioned auxiliary software. Similarly, the load detection circuit includes an AC-to-DC conversion circuit and a comparison module. The comparison module includes a comparator and a decoder. The comparator compares the input voltage with a reference voltage and outputs a control signal. The decoder enables the comparison module to decode according to the load voltage signal, so that the microcontroller can learn the information in the computer system through the comparison module.
12803TWF.PTD 第9頁 200528973 五、發明說明(5) 負載狀況’來调整這些電源供應模組的輸出電力。 相對地,省電控制模組具有數個省電控制電路,係 分別對應搞接電源供應模組。這些省電控制電路會分別 依據控制訊號來控制電源供應模組的輸出。 一般來說’控制單元包括了中央處理器(C PU )和控制 晶片組(C ο n t r ο 1 Ch i p s e t ),係用來控制電腦系統内的所 ,的裝置。另外’中央處理器和控制晶片組倶粞接電腦 系統内的時脈產生器,而時脈產生器用來提供電腦系統 運作所需的時脈訊號。12803TWF.PTD Page 9 200528973 V. Description of the invention (5) Load condition ’to adjust the output power of these power supply modules. In contrast, the power-saving control module has several power-saving control circuits, which are respectively connected to the power supply module. These power-saving control circuits control the output of the power supply module according to the control signals. Generally speaking, the control unit includes a central processing unit (CPU) and a control chipset (C0ntrr1Chipset), which are used to control all devices in a computer system. In addition, the central processing unit and the control chipset are connected to a clock generator in the computer system, and the clock generator is used to provide a clock signal required for the operation of the computer system.
本發明係使用負載偵測電路來偵測電腦系統各裝置 負載的狀況。當電腦系統的某個裝置處於閒置狀態時, 負載偵測電路會告知省電控制電路,而省電控制電路就 會控制此裝置所耦接的電源供應模組降低其輸出的電力 以達到省電的目的。 為讓 顯易懂, 細說明如 本發明之上述和其他目的、特徵和優點能更明 下文特舉幾個實施例,並配合所附圖式,作詳 下。 實施方1The present invention uses a load detection circuit to detect the load of each device of a computer system. When a device of the computer system is in an idle state, the load detection circuit will inform the power-saving control circuit, and the power-saving control circuit will control the power supply module coupled to the device to reduce its output power to achieve power saving the goal of. In order to make it easier to understand, the detailed description of the above and other objects, features, and advantages of the present invention can be made clearer. Several embodiments will be given below, and will be described in detail with the accompanying drawings. Implementing Party 1
圖1係繪示依照本發明之一實施例的系統方塊圖。請 參,圖1 ,控制單元丨30包括中央處理單元(cpu) 1 32和控 制晶片組1 3 4等,係耦接至主系統1 〇 〇,以控制電腦系統 内所有^置之運作。另外,負載偵測電路丨丨2的輸入係耦 接控制單元1 3 0和接收參考電壓Vref,而其輸出則耦接省 電控制電路1 2 2。省電控制電路1 2 2係依據負載偵測電路FIG. 1 is a block diagram of a system according to an embodiment of the present invention. Please refer to FIG. 1. The control unit 30 includes a central processing unit (CPU) 132 and a control chipset 134, etc., and is coupled to the main system 100 to control the operation of all devices in the computer system. In addition, the input of the load detection circuit 2 is coupled to the control unit 130 and the reference voltage Vref, and its output is coupled to the power-saving control circuit 1 2 2. Power saving control circuit 1 2 2 is based on load detection circuit
200528973 五、發明說明(6) 1 1 2的輸出來控制電源控制模組1 4 1對主系統1 0 0的電力輸 出。 圖2係繪示依照本發明之一實施例的負載偵測電路方 塊圖。請參照圖2,交流對直流轉換電路2 1 0係接收控制 單元1 3 0所輸出之負載電壓訊號vs,並將之轉換成直流之 輸入電壓Vi以輸出至比較模組2 2 0。比較模組2 2 0係依據 輸入電壓¥1與參考電壓Vrei二者比較的結果來輸出至省電 控制模組1 2 2。 請繼續參照圖2,其中的交流對直流轉換電路2 1 0可 以如本實施例所示,以兩個串聯的電阻電容濾波器(R C Filter)來實現。其中,濾波器211中的電阻21其中一端 係接收負載電壓訊號vs而另一端則耦接電容2 3和濾波器 213中的電阻25,此外,濾波器211中的電容23其中一端 耦接電阻21而另一端接地。另外,濾波器213中的電阻25 其中一端耦接電阻2 1並且另一端係耦接電容2 7和比較模 組2 2 0。而濾波器2 1 3中的電容2 7其中一端係耦接電阻 2 5,另一端同樣也是接地。 當交流型態的負載電壓訊號vs在正半週期時,會對 電容2 3和27充電。而當負載電壓訊號vs在負半週期時, 電容2 3和2 7開始放電。熟習此技藝者可以增加電容2 3和 2 7的電容值,來使得其放電時間增加。假設:電容2 3和 2 7的放電時間遠大於負載電壓訊號vs在負半週期的時 間,故電容23和27還未完全放電完畢,負載電壓訊號乂5 又會轉變為正半週期而開始對電容23和27充電。因此交200528973 V. Description of the invention (6) The output of 1 1 2 is used to control the power output of the power control module 1 41 to the main system 100. FIG. 2 is a block diagram of a load detection circuit according to an embodiment of the present invention. Referring to FIG. 2, the AC-to-DC conversion circuit 2 10 receives the load voltage signal vs output from the control unit 130 and converts it into a DC input voltage Vi to output to the comparison module 2 2 0. The comparison module 2 2 0 is output to the power-saving control module 1 2 2 according to the comparison result between the input voltage ¥ 1 and the reference voltage Vrei. Please continue to refer to FIG. 2, where the AC-to-DC conversion circuit 210 can be implemented by using two R C Filters connected in series as shown in this embodiment. Among them, one end of the resistor 21 in the filter 211 receives the load voltage signal vs and the other end is coupled to the capacitor 23 and the resistor 25 in the filter 213. In addition, one end of the capacitor 23 in the filter 211 is coupled to the resistor 21 The other end is grounded. In addition, one end of the resistor 25 in the filter 213 is coupled to the resistor 2 1 and the other end is coupled to the capacitor 27 and the comparison module 2 2 0. One end of the capacitor 2 7 in the filter 2 1 3 is coupled to the resistor 25, and the other end is also grounded. When the AC-type load voltage signal is in the positive half cycle, the capacitors 23 and 27 will be charged. When the load voltage signal is in the negative half cycle, the capacitors 23 and 27 start to discharge. Those skilled in this art can increase the capacitance of capacitors 23 and 27 to increase the discharge time. Assume that the discharge time of capacitors 2 3 and 27 is much longer than the time of the load voltage signal vs. the negative half cycle, so capacitors 23 and 27 have not been completely discharged, and the load voltage signal 乂 5 will turn into a positive half cycle and start to Capacitors 23 and 27 are charged. Therefore pay
12803TWF.PTD 第11頁 200528973 五、發明說明(7) "--- 流對直流轉換電路2 1 〇會輸出近乎直流的輸入電 較模組2 2 0。 1 I比 凊繼續參照圖2,比較模組2 2 〇包括比較器2 2 2,用央 依據輸入電壓和參考電壓Vref二者比較的結果,使得比 較模組2 2 0輸出控制訊號^至省電控制電路1 2 2。 比較模組2 20還包括解碼器224,係使得比較模組22 依據負載電壓訊號v s來進行解碼,以便透過負載偵測電 路1 1 2的輸出,來得知目前電腦系統對各裝置的負載狀 況0 、 圖3係繪示依照本發明之一實施例的省電控制電路 塊圖。請參照圖3,負載偵測電路112輸出的控制訊 ,由=電阻4丨和電容43所組成的電阻電容遽波器緩衝; 後,再运至開關410的控制端45。開關41〇的連接端49耦 二控制晶片40 3,而開關410的連接端47則耦接控制電2 。開關410係依據控制訊號^來決定是否導通控制 4 f 和 4 y 〇 睛=續參照圖3 ,開關41〇係例如為電晶體開關川。 開關4U的晶豆體中開一關Γ、1之間極山端^ ^ 的,、中個源/汲極端係耦接連接端4 7,1另一 端連接端49。當控制訊號^控制連接端” 、、/s I ^後控制晶片40 3就會透過控制電路4 0 5使得電 源供應Μ組1 4 1降低或甚至關閉其輸出電力。 方@ ^ 4係/會不依照本發明之一實施例的另一種電腦系統 方塊圖、參照圖4 ’纟本發明另一選擇實施例中,價測12803TWF.PTD Page 11 200528973 V. Description of the invention (7) " --- The current-to-DC conversion circuit 2 1 〇 will output an input current close to DC compared to the module 2 2 0. 1 I ratio continues to refer to FIG. 2. The comparison module 2 2 〇 includes a comparator 2 2 2. The comparison module 2 2 0 outputs a control signal according to the result of the comparison between the input voltage and the reference voltage Vref. Electric control circuit 1 2 2. The comparison module 2 20 also includes a decoder 224, which enables the comparison module 22 to decode according to the load voltage signal vs, so as to know the current load status of each device of the computer system through the output of the load detection circuit 1 1 2 0 3 is a block diagram of a power-saving control circuit according to an embodiment of the present invention. Referring to FIG. 3, the control signal output by the load detection circuit 112 is buffered by a resistor-capacitor waver composed of = resistor 4 丨 and capacitor 43; and then transported to the control terminal 45 of the switch 410. A connection terminal 49 of the switch 41 0 is coupled to the control chip 40 3, and a connection terminal 47 of the switch 410 is coupled to the control circuit 2. The switch 410 determines whether to turn on the control 4 f and 4 y according to the control signal ^. Continued With reference to FIG. 3, the switch 410 is, for example, a transistor switch. In the crystal bean body of the switch 4U, a pole terminal between Γ and 1 is turned on and off, and the middle / source terminal is coupled to the connection terminal 4 7 and the other end is connected to the connection terminal 49. When the control signal ^ controls the connection end ", / s I ^, the control chip 40 3 will reduce the power supply M group 1 4 1 or even turn off its output power through the control circuit 4 0 5. 方 @ ^ 4 系 / 会A block diagram of another computer system not according to an embodiment of the present invention is described with reference to FIG. 4 ′. In another alternative embodiment of the present invention,
12803TWF.PTD 第12頁 200528973 五、發明說明(8) 模組1 1 0接收控制單元1 3 0所產生的負載電壓訊號V S和參 考電壓Vref,而產生控制訊號V。至省電控制模組1 20。省電 控制模組1 2 0係分別耦接電源供應模組1 4 1至電源供應模 組1 4 3。而電源供應模組1 4 1至電源供應模組1 4 3係用來輸 出電力給裝置1 0 1至裝置1 〇 3,以使電腦系統運作。 請繼續參照圖4,控制單元1 3 0耦接主系統1 〇 〇,以控 制電腦系統内的各裝置。當控制單元丨3〇控制主系統100 時,會依據裝置101至裝置103的運作情形,送出負載電 壓訊號vs至偵測模組11 〇内的負載偵測電路η 2。負載偵 測電路1 1 2係依據負載電壓訊號v s和參考電壓Vf f二者比 較的結果來輸出控制訊號Vc。而省電控制模έ 1 2〇魷會依 據控制訊號V。來調整所對應之電源供應模出 的電力。 省電控制模組 來對電源供應 調整其輸出 請再參照圖4 ’省電控制模組1 2 〇中包括了例如省電 控制電路1 2 2的數個省電控制電路。每一個省電^制電路 係分別對應耦接一個電源供應模組,而每一個電&源供應 模組又對應耦接一個主系統1 〇 〇中的裝置 1 2 0係依據裝置1 0 1至裝置1 0 3的運作情形 模組1 4 1至電源供應模組1 4 3中之相對應者 至主系統1 0 0的電力。 以下舉一實例來說明本發明之精神。假 一個光碟機裝置(CD-ROM)。若是此光碟機带詈f ^ 疋 讀取音樂光碟片(CD)以撥放音樂時,光碟& 用來 較低的轉速來運作,因此其所需的電力舍比f f可以用 % 7賞比平常低。此12803TWF.PTD Page 12 200528973 V. Description of the invention (8) Module 1 0 receives the load voltage signal V S and the reference voltage Vref generated by the control unit 130 and generates the control signal V. To the power saving control module 1 20. The power saving control module 1 2 0 is respectively coupled to the power supply module 1 4 1 to the power supply module 1 4 3. The power supply modules 1 41 to 1 4 3 are used to output power to the devices 101 to 103 to make the computer system operate. Please continue to refer to FIG. 4. The control unit 130 is coupled to the main system 100 to control various devices in the computer system. When the control unit 30 controls the main system 100, it sends a load voltage signal vs to the load detection circuit η 2 in the detection module 11 according to the operating conditions of the devices 101 to 103. The load detection circuit 1 1 2 outputs the control signal Vc according to the comparison result between the load voltage signal vs and the reference voltage Vf f. The power saving control module 120 will control the signal V according to the control signal. To adjust the power output from the corresponding power supply module. The power-saving control module adjusts the output of the power supply. Please refer to FIG. 4 again. The power-saving control module 1 2 0 includes several power-saving control circuits such as the power-saving control circuit 1 2 2. Each power-saving circuit is correspondingly coupled to a power supply module, and each power & source supply module is correspondingly coupled to a device 1 in the main system 1 0 0 according to the device 1 0 1 Operation status of the device 1 0 3 to the power of the corresponding one of the module 1 41 to the power supply module 1 4 3 to the main system 100. An example is given below to illustrate the spirit of the present invention. Fake a CD-ROM drive. If this optical disc drive has 詈 f ^ 疋 when reading a music CD (CD) to play music, the disc & operates at a lower speed, so the required power rounding ratio ff can be used at a ratio of 7%. Usually low. this
200528973 五、發明說明(9) 時,負載偵測電路1 1 2就會依據負載電壓訊號vs和參考電 壓\ei二者比較的結果,來輸出控制訊號Vc至省電控制模 組1 2 0,使得電源供應模組1 4 1降低輸出至裝置1 0 1的電 力,以節省電力的消耗。 本實施例之負載偵測電路1 1 2與省電控制電路1 2 2的 内部結構以及工作原理已在前面的段落中敘述過,因此 不再多作介紹。 請再參照圖4,在另一實施例中,偵測模組1 1 0還可 以包括微控制器1 1 4。微控制器1 1 4係耦接負載偵測電路 1 1 2,用來依據負載偵測電路1 1 2的輸出來判斷電腦系統 内裝置101至裝置103的運作情形,並且告知辅助軟體 116。當裝置101至裝置103中,有某個或是某些裝置處於 閒置或是僅需要部分的電力即可工作的情形時,微控制 器1 1 4可以由負載偵測電路1 1 2的輸出判斷出來。然後微 控制器1 1 4會將此訊息告知輔助軟體1 1 6,而輔助軟體11 6 則配合微控制器1 1 4和控制訊號Ve,使得省電控制模組 1 2 0控制相對應的電源供應模組降低或甚至關閉其輸出電 力,以節省電力的消耗。 圖5係繪示依照本發明另一實施例之另一種電腦系統 之省電裝置方塊圖。請參照圖5,一般來說,電腦系統内 還具有時脈產生器1 5 1 ,其用來提供控制單元1 3 0和主系 統1 0 0所需要的時脈訊號。在本實施例中,輔助軟體1 1 6 還可以依據電腦系統對裝置1 0 1至裝置1 0 3的負載狀況, 使得控制單元1 3 0來調整時脈產生器1 5 1之輸出時脈訊號200528973 V. Description of the invention (9), the load detection circuit 1 12 will output the control signal Vc to the power-saving control module 1 2 0 according to the comparison result of the load voltage signal vs the reference voltage \ ei. The power supply module 141 reduces the power output to the device 101 to save power consumption. The internal structure and working principle of the load detection circuit 1 12 and the power-saving control circuit 12 2 of this embodiment have been described in the previous paragraphs, so they will not be described again. Please refer to FIG. 4 again. In another embodiment, the detection module 1 10 may further include a microcontroller 1 1 4. The microcontroller 1 1 4 is coupled to the load detection circuit 1 12 to judge the operation of the devices 101 to 103 in the computer system according to the output of the load detection circuit 1 12 and inform the auxiliary software 116. When one of the devices 101 to 103 is idle or requires only part of the power to work, the microcontroller 1 1 4 can be judged by the output of the load detection circuit 1 1 2 come out. Then the microcontroller 1 1 4 will inform the auxiliary software 1 1 6 of this message, and the auxiliary software 11 6 cooperates with the microcontroller 1 1 4 and the control signal Ve, so that the power-saving control module 1 2 0 controls the corresponding power supply. The supply module reduces or even shuts down its output power to save power consumption. FIG. 5 is a block diagram of a power saving device of another computer system according to another embodiment of the present invention. Referring to FIG. 5, in general, a computer system also has a clock generator 15 1 which is used to provide a clock signal required by the control unit 130 and the main system 100. In this embodiment, the auxiliary software 1 16 can also adjust the output clock signal of the clock generator 15 1 according to the load condition of the computer system on the devices 101 to 103 by the control unit 130.
12803TWF.PTD 第14頁 200528973 五、發明說明(ίο) 的頻率大小。 综上所述,本發明係以負載偵測電路再配合微控制 器和輔助軟體來偵測電腦系統内各裝置運作的情形,以 使得省電控制模組調整電源供應模組的電力輸出’以有 效地節省電力。 雖然本發明已以數個實施例揭露如上,然其並非用 以限定本發明,任何熟習此技藝者,在不脫離本發明之 精神和範圍内,當可作些許之更動與潤飾,因此本發明 之保護範圍當視後附之申請專利範圍所界定者為準。12803TWF.PTD Page 14 200528973 V. The frequency of invention description (ίο). In summary, the present invention uses a load detection circuit in combination with a microcontroller and auxiliary software to detect the operation of various devices in the computer system, so that the power-saving control module adjusts the power output of the power supply module. Effectively save electricity. Although the present invention has been disclosed as above with several embodiments, it is not intended to limit the present invention. Any person skilled in the art can make some modifications and retouching without departing from the spirit and scope of the present invention. Therefore, the present invention The scope of protection shall be determined by the scope of the attached patent application.
12803TWF.PTD 第15頁 200528973 圖式簡單說明 圖1係繪示依照本發明之一實施例的電腦系統方塊圖。 圖2係繪示依照本發明之一實施例的負載偵測電路方塊 圖。 圖3係繪示依照本發明之一實施例的省電控制電路方塊 圖。 圖4係繪示依照本發明另一實施例的電腦系統方塊圖。 圖5係繪示依照本發明另一實施例之另一種電腦系統之 省電裝置方塊圖。 【圖式標示說明】 2 1、2 5、4 1 :電阻 23、 27、 43:電容 45 :控制端 4 7、4 9 :連接端 1 0 0 :主系統 1 01、103 :裝置 1 1 0 :偵測模組 1 1 2 :負載偵測電路 1 1 4 :微控制器 1 1 6 :輔助軟體 1 2 0 :省電控制模組 1 2 2 :省電控制電路 1 3 0 :控制單元 1 3 2 :中央處理器 1 3 4 ·控制晶片12803TWF.PTD Page 15 200528973 Brief Description of Drawings Figure 1 is a block diagram of a computer system according to an embodiment of the present invention. FIG. 2 is a block diagram of a load detection circuit according to an embodiment of the present invention. FIG. 3 is a block diagram of a power saving control circuit according to an embodiment of the present invention. FIG. 4 is a block diagram of a computer system according to another embodiment of the present invention. 5 is a block diagram of a power saving device of another computer system according to another embodiment of the present invention. [Illustration of diagrammatic symbols] 2 1, 2, 5, 4 1: Resistance 23, 27, 43: Capacitance 45: Control terminal 4 7, 4 9: Connection terminal 1 0 0: Main system 1 01, 103: Device 1 1 0 : Detection module 1 1 2: Load detection circuit 1 1 4: Microcontroller 1 1 6: Auxiliary software 1 2 0: Power-saving control module 1 2 2: Power-saving control circuit 1 3 0: Control unit 1 3 2: Central Processing Unit 1 3 4 · Control Chip
12803TWF.PTD 第16頁 200528973 圖式簡單說明 141 151 210 2 11 220 222 224 403 405 410 411 1 4 3 :電源供應模組 時脈產生器 交流對直流轉換電路 2 1 3 :電阻電容濾波器 比較模組 比較器 解碼器 控制晶片 控制電路 開關 電晶體開關12803TWF.PTD Page 16 200528973 Brief description of the diagram 141 151 210 2 11 220 222 224 403 405 410 411 411 1 4 3: Power supply module clock generator AC to DC conversion circuit 2 1 3: Resistance capacitor filter comparison mode Group comparator decoder control chip control circuit switch transistor switch
12803TWF.PTD 第17頁12803TWF.PTD Page 17
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