200527349 九、發明說明： 【發明所屬之技彳舒領域】 發明領域 本發明係關於顯示器用之薄膜電晶體陣列面板。 5 【^14标】 發明背景 顯不态提供影像之資訊。液晶顯示器（LCD)及有機EL 顯不态（OLED)比其他的平面顯示器更廣泛地被使用，並且 於LCD和OLED中’薄膜電晶體(TFT)陣列面板具有作為顯 10 示器控制器之作用。 TFT陣列面板具有乡數觸線、多數行資料線、被形 成於閘線和資料線之相交處所形成的像素區域之多數像素 電極以及連接5亥寺像素電極至閑線和資料線之tft。TFT 依據經由閘線被傳送之閘信號資料信號而切換經由資料線 15被傳送至像素電極之傳輸。驅動電壓產生器產生問導通電 [或問斷電電壓並且轉送其至多數閘驅動積體電路⑽。該 等閘驅動1C依據信號控制器之控制而產生問信號。資料信 號藉由多數個資料驅動IC而被產生，該等多數個資料_ IC變換來自信號控制器之灰階信號為類比電壓。 20 信號控制器和驅動電壓產生器被形成於在LCD陣列面 板之外的印刷電路板(PCB)上，並且驅動IC被製作在介於 PCB和LCD組件之間的彈性印刷電路(Fpc)上。一般，有兩 組PCB被使用。其中一組，被稱為閉pCB，其被置於液晶（lc) 面板組件之一側上，並且被稱為資料pCB之另一組，則被 200527349 置於另一側上。因為閘驅動1C介於閘PCB和顯示面板之 間，並且資料驅動1C介於該資料PCB和該顯示面板之間， 故各1C分別地接收來自對應的PCB之信號。 但是，閘PCB可能不被使用並且可能僅有資料PCB被使 5 用而不需改變閘FPC上之閘FPC和閘驅動1C的位置。於這情 況中，資料FPC和TFT陣列面板皆具有接線以從資料pcB上 之信號控制器以及驅動電壓產生器傳送信號至閘驅動][c， 進一步地，閘FPC也具有接線以傳送信號至下一個閘驅動IC。 同時，有許多精細的接線被形成MTFT陣列面板上， 1〇其中一些可能被斷開或被短路。為預防此事件之發生，200527349 IX. Description of the invention: [Technical field to which the invention belongs] Field of the invention The present invention relates to a thin film transistor array panel for a display. 5 [^ 14 标] Background of the Invention The information provided by the display is imagery. Liquid crystal displays (LCDs) and organic EL displays (OLEDs) are more widely used than other flat displays, and in LCDs and OLEDs, 'thin-film transistor (TFT) array panels have the role of display controllers. . The TFT array panel has rural contact lines, a plurality of rows of data lines, a plurality of pixel electrodes formed in a pixel area formed at the intersection of the gate lines and the data lines, and a tft connecting the pixel electrodes of the 5Hai Temple to the idle lines and the data lines. The TFT switches the transmission of the gate signal data signal transmitted via the gate line to the pixel electrode via the data line 15. The drive voltage generator generates an energized voltage [or asks an off voltage and forwards it to most gate drive integrated circuits 积. The gate drive 1C generates an interrogation signal according to the control of the signal controller. The data signal is generated by a plurality of data driving ICs, which convert the gray-scale signals from the signal controller into analog voltages. The signal controller and the driving voltage generator are formed on a printed circuit board (PCB) outside the LCD array panel, and the driving IC is fabricated on a flexible printed circuit (Fpc) between the PCB and the LCD component. Generally, two sets of PCBs are used. One group, called a closed pCB, is placed on one side of a liquid crystal (lc) panel assembly, and the other group, called a data pCB, is placed on the other side by 200527349. Since the gate driver 1C is interposed between the gate PCB and the display panel, and the data driver 1C is interposed between the data PCB and the display panel, each 1C receives a signal from the corresponding PCB separately. However, the gate PCB may not be used and only the data PCB may be used without changing the positions of the gate FPC and gate driver 1C on the gate FPC. In this case, both the data FPC and the TFT array panel have wiring to transmit signals from the signal controller and driving voltage generator on the data pcB to the gate driver] [c. Further, the gate FPC also has wiring to transmit signals to the bottom One gate driver IC. At the same time, there are many fine wirings formed on the MTFT array panel, some of which may be disconnected or shorted. To prevent this from happening,
。結果，可能導致顯 緣層並且流進相交該修;j 示區域中之TFT的缺陷。 【發明内容】 發明概要 本發明之技術主題是防止 電晶體陣列面板之損害 本發明提供一藉蒲 靜電經由修補線而造成薄膜 種相陣列面板 ’其包含：一絕緣基片； 200527349 被形成於該絕緣基片上之閘線；資料線，其與該等閘線絕 緣且藉由相交該等閘線而定義一顯示區域；相交於該等閘 線之一靜電散佈線；被連接到該等閘線以及該靜電散佈線 之二極體；以及修補線，其用以修補被形成於該顯示區域 5 外之該絕緣基片上的該等貧料線，並且相父於該靜電散佈 線。 此處，該等二極體可以包含第一組二極體，其具有被 連接到閘線和到靜電散佈線之兩電極，因此前向電流可從 閘線流動至靜電散佈線，以及第二組二極體，其具有被連 10 接到閘線和到靜電散佈線之二電極，因此傳送靜電可從靜 電散佈線流動至閘線。 該等修補線可以包含相交於該等資料線之第一修補 線、不相交於該等資料線之第二修補線，該第二修補線被 絕緣而相交於該靜電散佈線。 15 薄膜電晶體陣列面板可以進一步地包含比該第二修補 線較遠離該顯示區域並且是相鄰於該第二修補線之一接 線。靜電散佈線可在該修補線相父該貢料線之前相父該修 補線。 薄膜電晶體陣列面板可以進一步地包含介於該修補線 20 和該靜電散佈線之間的一絕緣層。 修補線同時也可相交該資料線。 本發明也提供一種薄膜電晶體陣列面板，其包含：一 絕緣基片；被形成於該絕緣基片上之第一信號線；相交於 該第一信號線並且藉由相交該第一信號線而定義該顯示區 200527349 信號線之一靜電散佈線； 個二極體；以 域之第二信號線；相交於該 被連接到該第—信號線一〜Mm 及周圍接線，其被形成於該=讀佈線之… 並且相交該靜電散佈線。’區域外之I絕緣基片上’ 父於該第二信號線 該周圍接線被絕緣而相 圖式簡單說明 附圖的說明而更詳細地 本發明較佳實施例可藉由下面 被了解，其中： 第1圖是依據本發明_垂 10 μ 貝知例之液晶顯示器的透視圖； 苐2圖是依據本發明一實 ^ 貝苑例之液晶顯示器像素的等 效電路圖； 第3圖疋依據本發明一實施例之液晶顯示器的概略佈 局圖示； 第4圖疋第3圖液晶顯示器之Α部份的放大佈局圖； 15 第5圖是依據本發明一實施例之薄膜電晶體顯示器中 修補線和靜電散佈線之相交情況的佈局圖示；以及 第6圖是沿著第5圖展示之線νΙ-νΓ所取的薄膜二極體 陣列面板之截面圖。 C實施方式】 20較佳實施例之詳細說明 接著將參考所展示之附圖而更詳細地說明本發明之較 佳實施例。但是，本發明可以不同形式被實施，並且可理 解地，應不受限於揭示之實施例。反之，因這些實施例被 提供，所以這揭示將是周密且完全的，並且熟習本技術者 200527349 將完全地明白本發明之範轉。 於圖形中，為清楚起見，疊層、薄膜、以及區域之厚 度被放大。相同號碼指示於所有之相同元件。應了解到， 當元件(例如，疊層、薄膜、區域、或基片）被稱為在另一元 5件上時，其可以是直接地在另一元件之上，或其間也可 以呈現元件。相對地，應了解到，當元件(例如，疊層、薄 膜、區域或基片）被稱為“直接地在另一元件之上，，時，其意 謂著其間不可呈現元件。 第1圖是依據本發明一實施例之液晶顯示器的透視 10圖，並且第2圖是依據本發明一實施例之液晶顯示器（LCD) 的像素專效電路圖。 如第1圖之展示，LCD具有一液晶（LC)面板組件3〇〇、 被連接到LC面板組件300之閘驅動器4〇〇、被連接到Lc面板 組件300之資料驅動器5〇〇、被連接到閘驅動器4〇〇之驅動電 15壓產生器700、被連接到資料驅動器500之灰階電壓產生器 8〇〇、以及信號控制器600，其控制驅動電壓產生器7〇〇和灰 階電壓產生器800。 第1圖展示LC面板組件3〇〇，其包含多數信號線Gi_Gn 和DrDm，以及被連接到該等信號線之多數個像素。各像素 2〇包含一組切換元件Q，其被連接到該等信號線GrGn和 DrDm，且連接到一組LC電容器C】c以及一組儲存電容器 cst。信號線GrGn和DrDm包含傳送行掃瞄信號或閘信號之 多數掃瞄信號線或閘線GrGn，以及傳送列影像信號或資料 #號之資料信號線或資料線DrDm。切換元件Q具有三個端 200527349. As a result, it is possible to cause a marginal layer and flow into the intersecting repair; j indicates a defect of the TFT in the area. [Summary of the Invention] Summary of the Invention The technical subject of the present invention is to prevent the damage of the transistor array panel. The present invention provides a thin film seed phase array panel caused by static electricity through a repair line, which includes: an insulating substrate; 200527349 is formed in the Gate lines on an insulating substrate; data lines, which are insulated from the gate lines and define a display area by intersecting the gate lines; static dissipative wiring intersecting one of the gate lines; connected to the gate lines And a diode of the electrostatic dissipative wiring; and a repairing line for repairing the lean wires formed on the insulating substrate outside the display area 5, and is connected to the electrostatic dissipating wiring. Here, the diodes may include a first set of diodes having two electrodes connected to the gate line and to the electrostatic dissipative wiring, so that forward current can flow from the gate line to the electrostatic dissipative wiring, and the second A group diode has two electrodes connected to the gate line and to the static wiring, so that the static electricity can flow from the static wiring to the gate line. The repair lines may include a first repair line that intersects the data lines, and a second repair line that does not intersect the data lines. The second repair line is insulated and intersects the electrostatic dissipative wiring. The thin film transistor array panel may further include a wiring farther from the display area than the second repair line and adjacent to one of the second repair lines. The static dissipative wiring can be related to the repair line before the repair line is connected to the material line. The thin film transistor array panel may further include an insulating layer between the repairing line 20 and the electrostatic dissipative wiring. The repair line can also intersect the data line. The present invention also provides a thin film transistor array panel, comprising: an insulating substrate; a first signal line formed on the insulating substrate; intersecting the first signal line and defined by intersecting the first signal line The display area 200527349 one of the signal wires is statically distributed; a diode; the second signal line of the field; intersects with the first signal line connected to the ~ Mm and the surrounding wiring, which is formed at the = read Wiring ... and intersect the static-dissipative wiring. 'I outside the region on an insulating substrate' The parent signal is insulated from the surrounding wiring of the second signal line, and the phase diagram simply illustrates the description of the drawings and the preferred embodiment of the present invention can be understood in more detail by the following, among which: FIG. 1 is a perspective view of a liquid crystal display according to the present invention. Example 10 is a perspective view of a liquid crystal display pixel according to a practical example of the present invention. A schematic layout diagram of a liquid crystal display according to an embodiment; FIG. 4 and FIG. 3 are enlarged layout drawings of part A of the liquid crystal display; FIG. 5 is a repair line and a repair line of a thin film transistor display according to an embodiment of the present invention. A layout diagram of the intersection of the static-dissipation wirings; and FIG. 6 is a cross-sectional view of the thin-film diode array panel taken along the line νΙ-νΓ shown in FIG. 5. Embodiment C] Detailed Description of the Preferred Embodiment 20 Next, the preferred embodiment of the present invention will be described in more detail with reference to the accompanying drawings shown. However, the present invention may be implemented in different forms, and understandably, it should not be limited to the disclosed embodiments. In contrast, since these embodiments are provided, this disclosure will be thorough and complete, and those skilled in the art 200527349 will fully understand the scope of the present invention. In the figure, the thicknesses of the stack, film, and area are exaggerated for clarity. The same numbers are assigned to all the same components. It should be understood that when an element (for example, a laminate, a film, an area, or a substrate) is referred to as another element, it may be directly on the other element, or the element may be present therebetween. In contrast, it should be understood that when an element (for example, a stack, film, region, or substrate) is referred to as "directly on top of another element," it means that the element cannot be presented in between. Figure 1 FIG. 10 is a perspective view of a liquid crystal display according to an embodiment of the present invention, and FIG. 2 is a pixel-specific circuit diagram of a liquid crystal display (LCD) according to an embodiment of the present invention. As shown in FIG. 1, the LCD has a liquid crystal ( LC) panel assembly 300, gate driver 400 connected to LC panel assembly 300, data driver 500 connected to Lc panel assembly 300, and driving voltage 15 generated by gate driver 400 Generator 700, a grayscale voltage generator 800 connected to the data driver 500, and a signal controller 600, which controls the driving voltage generator 700 and the grayscale voltage generator 800. FIG. 1 shows the LC panel assembly 3 〇〇, which includes most of the signal lines Gi_Gn and DrDm, and a plurality of pixels connected to these signal lines. Each pixel 20 includes a set of switching elements Q, which are connected to these signal lines GrGn and DrDm, and are connected To a set of LC capacitors C] c and a set of storage capacitors cst. The signal lines GrGn and DrDm include most of the scanning signal lines or gate lines GrGn that transmit the line scanning signals or gate signals, and the data signal lines or data that transmit the image signals or data # numbers Line DrDm. Switching element Q has three ends 200527349
LC電容器C】c之另一電極: 考電塵。儲存電容器(^之另- 一電極被連接到共同電壓％咖或參 ;!之另一電極被連接到另一電壓，例 儲存電容器Cst之另一電極可以被連 ，參考電壓。但是， 接到相叙上方閘線(下面將被稱為“先前閘線，，）。前者型式 的儲存電容HC：st被稱為分雜線型式，並且後者型式之儲 存電容器Cst被稱為先前閘型式。 同才第2圖將概略地展示LC面板組件3〇〇之結構。為 方便起見，第2圖將展示一像素。 如第2圖之|示，LC面板組件3〇〇具有一下方面板 100、面向下方面板100之上方面板200、以及介於二面板⑽ 和200之間的LC層3。下方面板100具有問線、Gi、資料 線Dj切換元件Q、以及儲存電容器。LC電容器C】c具有 二電極，一電極是下方面板100之像素電極且另一組電極是 上方面板200之共同電極270，並且介於二電極19〇和27〇之 間的LC層3功能如介電質。 像素電極190被連接到切換元件q，並且共同電極27〇 20整體地被形成於上方面板2〇〇上且被連接到共同電壓义⑽。 此處，LC分子之配置依據藉由像素電極19〇和共同電 極270被產生之電場而被改變，並且對應地乙(：層3中之入射 光的極化被改變。由於極化被附帶於面板1〇〇和2〇〇之薄膜 (未被展示於第2圖中），此極化之改變導致入射光傳輸比率 200527349 之差量。 進一步地，被施加共同電壓之—組獨立接線形成於τ 方面板上。儲存電容队被形成於像素電極削和獨立 接線之間。在先前的閘型式中，像素電極190重疊於先前問 5線Gi-】而以絕緣層介於其間以形成儲存電容器c。 於第2圖中，金屬-氧化物半導體(M0S)電晶體被展示作 為切換元件Q之-範例。MOS電晶體藉由具有非結晶石夕或 多晶石夕之通道層的薄膜電晶體(TFT)被實施。不同於第2 圖’共同電極270也可以被形成於下方面板1〇〇上並且於 10此情況中’電極190和27G也可以被形成於下方面板上而具 有線性形狀。 紅色、綠色和藍色之色彩溏波器23〇被形成於對應至像 素電極190的上方面板200上以引動色彩顯示器。如第2圖之 15展不，雖然色彩濾波器230通常被形成於上方面板200之對 應區域上，色彩濾波器23〇也可被形成於下方面板1〇〇上之 像素電極190的上方或下方區域。 再次參看第1圖，驅動電壓產生器700產生電壓，例如， 用以V通切換元件Q之閘導通電壓v〇n，以及用以斷電切換 凡件Q之閘斷電電壓VQff 0 20 . 火階電壓產生器8〇〇產生多數個相關於LCD亮度之灰 階電壓。 閘驅動400，稱為掃瞄驅動器，被連接到面板錐 =3〇〇之閘線，並且其補償驅動電壓產生器7〇〇之閘導通電 且供應閘信號至閘線。閘信號利用閘導通電麽 11 200527349 ν〇η和閘斷電電壓v〇ff之組合而被形成。 資料驅動器500，稱為源極驅動器，被連接到LC面板 、、且件300之貝料線Di-Dm，並且其從灰階電壓產生器_而選 擇灰P自i壓且供應作為資料信號之一灰階電壓至資料線 5 DfDm 〇 信號控制器600產生控制閘驅動器400、資料驅動器 500、以及驅動電壓產生器7〇〇之操作的控制信號，並且其 供應讜等分別的對應控制信號至閘驅動器4〇〇、資料驅動器 500以及驅動電壓產生器7〇〇。 10 如第3圖之展示，一般而言，閘驅動器4〇〇具有多數個 閘驅動積體電路(IC)441-444並且資料駆動器5〇〇具有多數 個資料驅動1C 540。各ic可以相同於信號線 及薄膜電晶體Q之製造程序而被形成KLC面板組件3〇〇之 内部或外部上。 15 隨後，依據本發明一實施例之液晶顯示器（LCD)的結構 將詳細地被說明。 第3圖疋依據本發明一實施例之液晶顯示器的概略佈 局圖示。 如第3圖之展示，印刷電路板(PCB)55〇被配置在包含閘 20線〇1-611和資料線01-0111之1^面板組件300上面。PCB 550具 有電路元件，例如，信號控制器600、驅動電壓產生器700 以及灰階電壓產生器800，用以操作LCD。LC面板組件300 經由彈性印刷電路(FPC)510而電氣地且實際地被連接到 PCB 550。 12 200527349 資料FPC 510具有資料驅動IC 540、多數個資料導 440、以及多數個閘驅動信號接線通道521-524。闵达— μ馬賢料 導線440經由導體C2被連接到資料驅動1C 540以乃次， 人貝科線LC capacitor C] the other electrode of c: test the electric dust. The other capacitor of the storage capacitor (^-one electrode is connected to a common voltage% or reference; the other electrode is connected to another voltage, for example, the other electrode of the storage capacitor Cst can be connected to the reference voltage. However, connected to The upper gate line (hereinafter referred to as the "previous gate line,"). The former type of storage capacitor HC: st is called the hybrid line type, and the latter type of storage capacitor Cst is called the previous gate type. Figure 2 shows the structure of the LC panel assembly 300. For convenience, Figure 2 shows a pixel. As shown in Figure 2, the LC panel assembly 300 has the following panel 100, The lower side panel 100 faces the upper side panel 200 and the LC layer 3 between the second and second panels ⑽ and 200. The lower side panel 100 has a question line, Gi, a data line Dj switching element Q, and a storage capacitor. The LC capacitor C] c has Two electrodes, one electrode is the pixel electrode of the lower panel 100 and the other group of electrodes is the common electrode 270 of the upper panel 200, and the LC layer 3 between the two electrodes 19 and 27 functions as a dielectric. Pixel electrodes 190 is connected to the switching element q And the common electrode 2720 is integrally formed on the upper panel 200 and is connected to the common voltage sense. Here, the arrangement of the LC molecules is based on the electric field generated by the pixel electrode 19 and the common electrode 270. Changes, and correspondingly the polarization of incident light in layer B (: layer 3 is changed. Since the polarization is attached to the thin films of panel 100 and 2000 (not shown in Figure 2), this polarization This change results in a difference in incident light transmission ratio 200527349. Further, a group of independent wirings to which a common voltage is applied is formed on the τ side board. A storage capacitor team is formed between the pixel electrode cut and the independent wiring. In the previous gate In the type, the pixel electrode 190 overlaps the previous 5-line Gi-] with an insulating layer interposed therebetween to form a storage capacitor c. In Figure 2, a metal-oxide semiconductor (MOS) transistor is shown as the switching element Q -Example. The MOS transistor is implemented by a thin film transistor (TFT) with a channel layer of amorphous or polycrystalline stone. Unlike the second figure, the common electrode 270 can also be formed on the lower panel 1〇 〇On and on 10 In this case, the 'electrodes 190 and 27G may also be formed on the lower panel to have a linear shape. The red, green, and blue color wave filters 23 are formed on the upper panel 200 corresponding to the pixel electrode 190 to motivate. Color display. As shown in Figure 2-15, although the color filter 230 is usually formed on the corresponding area of the upper panel 200, the color filter 23 can also be formed on the pixel electrode 190 on the lower panel 100. The upper or lower area. Referring to FIG. 1 again, the driving voltage generator 700 generates voltages, for example, a gate-on voltage v ON for switching the V-switching element Q and a gate-off voltage for switching off the Q of each element. VQff 0 20. The fire level voltage generator 800 generates a plurality of gray scale voltages related to the brightness of the LCD. The gate driver 400, called a scan driver, is connected to the gate line of the panel cone = 300, and the gate of the compensation driving voltage generator 700 is energized and supplies a gate signal to the gate line. The gate signal is formed by using a combination of gate conduction and energization 11 200527349 ν〇η and gate power-off voltage v0ff. The data driver 500, called the source driver, is connected to the LC panel and the material line Di-Dm of the piece 300, and it selects gray P from the gray voltage generator and supplies it as the data signal. A gray-scale voltage to the data line 5 DfDm. The signal controller 600 generates control signals for controlling the operation of the gate driver 400, the data driver 500, and the driving voltage generator 700, and supplies respective corresponding control signals to the gate. The driver 400, the data driver 500, and the driving voltage generator 700. 10 As shown in Fig. 3, in general, the gate driver 400 has a plurality of gate driver integrated circuits (IC) 441-444 and the data actuator 500 has a plurality of data drivers 1C 540. Each IC can be formed inside or outside the KLC panel assembly 300 by the same manufacturing process as the signal line and the thin film transistor Q. 15 Subsequently, the structure of a liquid crystal display (LCD) according to an embodiment of the present invention will be described in detail. Fig. 3 is a schematic layout diagram of a liquid crystal display according to an embodiment of the present invention. As shown in FIG. 3, a printed circuit board (PCB) 55 is disposed on a panel assembly 300 including a gate 20 line 01-611 and a data line 01-0111. The PCB 550 has circuit elements such as a signal controller 600, a driving voltage generator 700, and a grayscale voltage generator 800 for operating the LCD. The LC panel assembly 300 is electrically and physically connected to the PCB 550 via a flexible printed circuit (FPC) 510. 12 200527349 The data FPC 510 has a data driver IC 540, a plurality of data guides 440, and a plurality of gate drive signal wiring channels 521-524. Min Da — μMa Xian material The lead 440 is connected to the data driver 1C 540 through the conductor C2.
DrDm之輸出端點，它們從資料驅動1C 540傳送像素作號 資料線DrDm。為方便起見，僅四組閘驅動信號接線通、首 521-524被展示於第3圖中，但實際上，閘驅動信號接線通 道數目是更多於五組。於本發明實施例中，信號線521傳送 一閘導通電壓，例如，信號線522傳送閘斷電電壓或閘時脈 信號，並且信號線523傳送垂直同步開始信號。而且信號線 524從信號控制器600而傳送序列資訊信號(SIS)。 信號線521-524，如同資料驅動1C 540，電氣地被連接 到PCB 550之電路元件。 四組閘驅動FPC 411-414被附於LC面板組件300之左 側，並且閘驅動1C 441-444分別地被配置於閘驅動FPC 15 411-414上。多數個閘導線420和閘驅動信號接線通道421、The output endpoints of DrDm. They send pixel-numbered data lines DrDm from the data-driven 1C 540. For the sake of convenience, only four groups of gate drive signal wiring are connected. The first 521-524 is shown in Figure 3, but in reality, the number of gate drive signal wiring channels is more than five. In the embodiment of the present invention, the signal line 521 transmits a gate-on voltage, for example, the signal line 522 transmits a gate-off voltage or a gate clock signal, and the signal line 523 transmits a vertical synchronization start signal. The signal line 524 transmits a sequence information signal (SIS) from the signal controller 600. The signal lines 521-524, like the data driving 1C 540, are electrically connected to the circuit elements of the PCB 550. Four sets of gate drive FPC 411-414 are attached to the left side of the LC panel assembly 300, and gate drives 1C 441-444 are respectively arranged on the gate drive FPC 15 411-414. A plurality of gate wires 420 and gate drive signal wiring channels 421,
422、423a、423b、以及424被形成於閘FPC 411-414上。雖 然閘驅動信號接線通道421、422、423a、423b以及424之信 號線421、422及424經由分支信號線而被連接到閘驅動IC 441-444之輸入端點，信號線423a和423b之一端點被連接到 2〇閘驅動W 441-444。上方信號線423a被連接到閘驅動1C 441-444之輸入端點，並且下方信號線423b被連接到閘驅動 1C 441-444之輸出端點。為方便起見，僅五組閘驅動信號换 線通道421、422、423a、423b以及424被展示於第3圖中’ 但是閘線數目可以被改變。 13 200527349 — 第圖之展示，像素區域藉由相交列閘線GrGn和行 貝料線D, Dm而被形成。顯示器區域d包含表示影像之多數 個像素區域。因為黑色矩陣被形成在顯示區域d之外(如第3 圖之斜線表示），顯示區域D之光茂漏可以被防止。雖然於 5頒不區域D中閘線GrGn和資料線…仏是大致地平行，當它 們成君羊地來集於顯示區域之外時κ門的距離逐漸地^妾 ' 近。Ik後匕們再次地以較顯示區域D接近的距離而大致地平行。 · 問驅動信號接線通道321a-321d、322心322d、 323a-323d、以及324a-324d被形成於LC面板組件300之顯示 馨 10區域D外面的左上方和左方邊緣上。被形成於左方上方邊緣 上之閘驅動信號接線通道32ia、322a、323a，以及324a經 由接觸點C4而電氣地被連接到資料Fpc 510之閘驅動信號 接線通道521、522、523、524，並且利用接觸點C3而被連 接到最上方閘FPC 411之閘驅動信號接線通道421、422、 15 423a、以及424。其他的閘驅動信號接線通道321b-321d、 322b-322d、323b-323d、以及324a-324d被配置在閘線GrGn 的聚集部份之間。它們經由接觸點C5和C6而連接閘FPC ^ 411-414之閘驅動信號接線通道421、422、423a、423b，以 及424至相鄰閘FPC 411-414之閘驅動信號接線通道421、 20 422、423a、423b、以及424。 同時，除了資料FPC 510之外，不包含資料驅動1c 540 之FPC(不被展示於第3圖中）可以被附於PCB 550以及LC面 板組件300。於這情況中，閘驅動信號接線通道52卜524可 以被配置於FPC上。 14 200527349 此處，LC面板組件300之閘線仏—匕、資料線D】_Dm以 及信號線521-524經由接觸點c 1-C6藉由各向異性傳導層而 被互連至FPC 411-414和510之導線420和440及信號線 321a-321d、322a-322d、323a-323d、以及324a-324d。 5 第一至第二修補線701、702及703被形成於顯示區域d 之底部外側上。第三修補線7〇3相交於資料線之端點而被絕 · 緣。同時，修補線連接槓704也被形成於相同區域上，並且 · 其相交於第一至第三修補線7〇1、7〇2及7〇3而被絕緣。第一 和第二修補線7〇1和7〇2被連接到沿著!7?(：: 411-414之連接 · 1〇接線通道而被形成於顯示區域D外部之頂部側上之修補線 (不被展示於第3圖中）。被形成於顯示區域D頂部側外面上 的修補線（不被展示於第3圖中）相交於資料線而且被絕緣。 同時，靜電散佈線601也相交於閘線之開始部份，並且 平行地被形成於第一資料線左側中。於這情況中，靜電洩 15漏線601利用兩組二極體而被連接到閘線。靜電散佈線601 相交於第一和第二修補線7〇1和7〇2而且被絕緣。 接線樣型801可以被形成於第一修補線7〇1之外面，並 鲁 且共同電壓可以被供應至接線樣型8〇1。 第4圖是第3圖LC顯示器之a部份的放大佈局圖。 >〇 颂示器區域D藉由相交閘線121和資料線m而被形 _ 成此處，資料線171之寬度在顯示區域D之外面部份被放 - 大以形成一檢視墊。檢視墊與一檢視探針接觸以檢查資料 線171是否具有缺陷。 於顯示區域D之左方，靜電散佈線6〇1相交於閘線121， 15 200527349 亚且靜電散佈線601利用兩組對應的二極體]〇1和1：)2而被連 接到閘線12卜兩組二極體之其中一組被組態，以至於前向 電流從閘線121流動至靜電散佈線謝，並且另一組被組態 以至於前向電流從靜電散佈線6〇1流動至閘線ΐ2ι。 5 當靜電被引介進入閘線之一時，靜電經由二極體D2 被傳輸至靜電散佈線601並且經由二極體01而分散性地被 散佈在所有的閘線121之上。在這靜電分散處理時，靜電可 以藉由散熱於二極體D1和D2而被排除。 一極體D1和D2具有閘電極和源電極被連接到相同接 10線之TFT結構。亦即，第一個二極體具有閘電極和源電極被 連接到靜電散佈線601且排電極被連接到閘線121之TFT結 構。第二個二極體D2具有閘電極和源電極被連接到閘線121 且排電極被連接到靜電散佈線6〇1之tft結構。 因為此等二極體D1和D2形成一通道，而僅當超出一預 15定數值之咼電壓被施加時才使電流流動，二極體D1和D2藉 由具有高電壓之靜電而形成通道，但是不因驅動LCD之掃 瞄信號電壓而形成通道。因此，閘線12ι之掃瞄信號不被傳 輸至另一閘線121。 第一至第三修補線7(Π、702以及703被形成於顯示區域 20外之絕緣基片上，並且在它們之間的第三修補線703相交該 資料線171。第一和第二修補線7〇1和7〇2藉由連接]?1>(：：之接 線通道而被被連接到形成於顯示區域D之頂部外側上之修 補線（不被展示於第3圖中）。第一、第二以及第三修補線 701、702以及703相交該修補線連接槓7〇4。 16 200527349 當資料線⑺之-被斷料，被斷開:#_171之底部 (W刀和第—修補線7〇3、第二修補線7〇3和修補線連接横 ™、修補線連接槓綱及第—和第二修補線7⑴和观之— 被連接，並且被斷開資料線171的頂部部份經由第一和第二 5 :多補線701和7〇2之-而被連接到被斷開資料線171的底部 部份。接著’不被施加至資料信號之迁迴轉換的修補線 7〇1、702以及703之部份從被施加的另—部份被斷開。此 處，接線之連接和斷開藉由發射雷射光而被進行。 為了減低由於修補線701和7〇2之電容負載，第一和第 1。一修補線701和702被形成而不相交該資料線m，並且第一 和第二修補線701和7〇2經由修補線連接槓7〇4而被連接於 相交該資料線171的第三修補線7〇3。於必要情況時’修補 線連接槓7G4可以被省略並且修補線加和搬可以直接地 相交該資料線171。 15 靜電漏損線601相交修補線701和702而且被絕緣。 隨後參考第5圖和第6圖，將說明相交結構靜電散佈線 601和修補線701及702。 因為修補線701和702以及閘線121被形成於相同層上 並且靜電散佈線601和資料線171被形成於相同層上，閘絕 、、彖層140被μ於靜電散佈線6〇1和修補線7〇1及π〕之間。因 此，靜電散佈線601和修補線7〇1利用閘絕緣層14〇被絕緣。 此外鈍態層180被形成於靜電散佈線6〇1上。 在修補線701外面，一接線通道8〇1被形成，並且接線 通這801可以供應一共同電壓至接觸上方面板上之一共同 17 200527349 電極27〇(如第2圖展示之270)之接觸球體（不被展示於第4圖 中）。在向外導線結合(OLB)墊上之修補線701和接線通道 801之間的距離是非常地短。 於此TFT陣列面板結構中，靜電通常流進入被形成於 5 TFT顯示面板最外側上之接線通道801。靜電傳送至〇LB塾 (如第3圖展示之414)上之相鄰修補線7〇1，其中修補線7〇1 和接線通道801是接近的，並且流進入相鄰修補線7〇1中。 流進入修補線701之靜電，在接近修補線連接槓7〇4相交修 補線701之前相交修補線以傳送至靜電散佈線6〇1，並且流 1〇進入靜電散佈線601之靜電被分散在整個陣列面板之上。即 使修補線7 01和靜電散佈線6 〇 1利用閘絕緣層丨4 〇被絕緣，靜 電仍具有高電壓，其可導致閘絕緣層14〇之絕緣損壞，並且 其被傳送至靜電散佈線601。 結果，由於修補線701和靜電散佈線6〇1之相交，流進 入修補線701之靜電不能穿過而進入顯示區域，並且因靜電 而招致之顯示區域D的TFT缺陷可被防止。 依據本發明，因為流動進入修補線之靜電不被傳送至 貝料線，因靜電而招致之顯示區域的薄膜電晶體缺陷可被 避免。 2〇 ，雖然已參考附圖而詳細說明本發明實施例，熟習本技 1者應了解，本發明不受限於特定的實補，並且藉由本 發明之概念而被應用之各種變化和修改將被包含在如所附 加之申請專利範圍所定義的本發明範疇之内。 【圖式簡單說明】 18 200527349 效電路圖； 第1圖疋依據本發明一實施例之液晶顯示器的透視固· 第2圖是依據本發明一實施例之液晶顯示器像素的等 第3圖是依據本發明一實施例之液晶顯示器的概略佈 5 局圖示； 第4圖是第3圖液晶顯示器之a部份的放大佈局圖； 第5圖是依據本發明一實施例之薄膜電晶體顯示器中 修補線和靜電散佈線之相交情況的佈局圖示；以及 第6圖是沿著第5圖展示之線vi_VI，所取的薄膜二極體 10 陣列面板之截面圖。 【主要元件符號說明】 3-..LC 層 400…閘驅動器 100···下方面板 440…資料導線 121…閘線 441-444…閘驅動積體電路 140···閘絕緣層 411-414…閘驅動FPC 171···資料線 500…資料驅動器 190···像素電極 540…資料驅動1C 200···上方面板 550---PCB 230···色彩濾波器 600…信號控制器 270···共同電極 601…靜電散佈線 300···液晶(LC)面板組件 700…驅動電壓產生器 321a-321d，322a-322d，323a- 701，702，703···修補線 323d，324a-324d，421，422， 704…修補線連接桿 423a，423b，424,521-524··· 800…灰階電壓產生器 閘驅動信號接線通道 801…接線樣型 19422, 423a, 423b, and 424 are formed on the gate FPC 411-414. Although the gate driving signal wiring channels 421, 422, 423a, 423b, and 424 signal lines 421, 422, and 424 are connected to the input terminals of the gate driving ICs 441-444 through branch signal lines, one of the signal line ends 423a and 423b It is connected to the 20 gate drive W 441-444. The upper signal line 423a is connected to the input terminal of the gate driver 1C 441-444, and the lower signal line 423b is connected to the output terminal of the gate driver 1C 441-444. For the sake of convenience, only five sets of brake drive signal switching channels 421, 422, 423a, 423b, and 424 are shown in Fig. 3 ', but the number of brake wires can be changed. 13 200527349 — As shown in the figure, the pixel area is formed by intersecting the gate lines GrGn and the row material lines D, Dm. The display area d includes a plurality of pixel areas representing an image. Since the black matrix is formed outside the display area d (as indicated by the slanted lines in FIG. 3), light leakage in the display area D can be prevented. Although the gate line GrGn and the data line in the 5th area D are roughly parallel, the distance between the κ gates is gradually closer when they are gathered outside the display area as a rule. After Ik, the daggers are again substantially parallel at a distance closer to the display area D. · The drive signal wiring channels 321a-321d, 322 cores 322d, 323a-323d, and 324a-324d are formed on the upper left and left edges of the display panel 10 of the LC panel assembly 300. The gate driving signal wiring channels 32ia, 322a, 323a, and 324a formed on the upper left edge are electrically connected to the gate driving signal wiring channels 521, 522, 523, 524 of the data Fpc 510 via the contact point C4, and The contact point C3 is connected to the gate drive signal wiring channels 421, 422, 15 423a, and 424 of the uppermost gate FPC 411. The other gate driving signal wiring channels 321b-321d, 322b-322d, 323b-323d, and 324a-324d are arranged between the aggregation portions of the gate lines GrGn. They are connected to the gate drive signal wiring channels 421, 422, 423a, 423b of gate FPC ^ 411-414 via contact points C5 and C6, and the gate drive signal wiring channels 421, 20 422, 424 to adjacent gates FPC 411-414, 423a, 423b, and 424. Meanwhile, in addition to the data FPC 510, FPCs (not shown in Figure 3) that do not include data drive 1c 540 can be attached to the PCB 550 and the LC panel assembly 300. In this case, the gate driving signal wiring channels 52 and 524 may be configured on the FPC. 14 200527349 Here, the gate line of the LC panel assembly 300—dagger, data line D] _Dm and the signal line 521-524 are interconnected to the FPC 411-414 through the anisotropic conductive layer through the contact points c 1-C6 The wires 420 and 440 of 510 and 510 and the signal wires 321a-321d, 322a-322d, 323a-323d, and 324a-324d. 5 The first to second repair lines 701, 702, and 703 are formed on the outer side of the bottom of the display area d. The third patch line 703 intersects at the end of the data line and is isolated. At the same time, the repair line connecting bar 704 is also formed on the same area, and it intersects with the first to third repair lines 701, 702, and 703 and is insulated. The first and second repairing lines 701 and 702 are connected to the repairing line formed on the top side outside the display area D along the connection of! 7? (:: 411-414 · 10 wiring channel). (Not shown in FIG. 3). The repairing lines (not shown in FIG. 3) formed on the outer surface of the top side of the display area D intersect with the data lines and are insulated. At the same time, the electrostatic dissipative wiring 601 also intersects At the beginning of the gate line, it is formed in parallel to the left side of the first data line. In this case, the static leakage line 601 is connected to the gate line by using two sets of diodes. The static scattered lines 601 intersect It is insulated on the first and second repair lines 701 and 702. The wiring pattern 801 can be formed outside the first repair line 701, and a common voltage can be supplied to the wiring pattern 8 〇 1. Figure 4 is an enlarged layout view of part a of the LC display in Figure 3. > 〇The display area D is formed by intersecting the gate line 121 and the data line m. Here, the data line 171 The width is placed outside the display area D-so as to form an inspection pad. The inspection pad is in contact with an inspection probe to Check whether the data line 171 has a defect. To the left of the display area D, the static electricity wiring 601 intersects with the gate wires 121, 15 200527349 and the static electricity wiring 601 uses two corresponding diodes] 〇1 and 1: ) 2 and one of the two sets of diodes connected to the gate line 12 is configured so that the forward current flows from the gate line 121 to the electrostatic dispersion line, and the other group is configured such that the forward direction A current flows from the static electricity wiring 601 to the gate line 2m. 5 When static electricity is introduced into one of the gate wires, the static electricity is transmitted to the static electricity dissipating wiring 601 via the diode D2 and is dispersedly distributed over all the gate wires 121 via the diode 01. During this electrostatic dispersing process, static electricity can be eliminated by dissipating heat to the diodes D1 and D2. The unipolar bodies D1 and D2 have a TFT structure in which a gate electrode and a source electrode are connected to the same 10-wire. That is, the first diode has a TFT structure in which a gate electrode and a source electrode are connected to the static electricity wiring 601 and a row electrode is connected to the gate line 121. The second diode D2 has a tft structure in which a gate electrode and a source electrode are connected to the gate line 121 and a row electrode is connected to the electrostatic diffusion line 601. Because these diodes D1 and D2 form a channel, and the current flows only when a voltage exceeding a predetermined value is applied, the diodes D1 and D2 form a channel by static electricity with a high voltage. However, no channel is formed due to the scanning signal voltage driving the LCD. Therefore, the scanning signal of the gate line 12m is not transmitted to the other gate line 121. The first to third repair lines 7 (Π, 702, and 703 are formed on an insulating substrate outside the display area 20, and a third repair line 703 therebetween intersects the data line 171. The first and second repair lines 7〇1 and 7〇2 are connected to the patch line formed on the outside of the top of the display area D by connecting]? 1> (:: wiring channels) (not shown in Fig. 3). First , Second and third repair lines 701, 702 and 703 intersect the repair line connecting rod 704. 16 200527349 When the data line is cut off-it is cut off and disconnected: the bottom of # _171 (W knife and the first-repair The line 703, the second repair line 703, and the repair line connection horizontal ™, the repair line connection bar and the first and second repair lines 7 and 28 are connected, and the top portion of the data line 171 is disconnected The portion is connected to the bottom portion of the disconnected data line 171 via the first and second 5: multiple supplementary lines 701 and 702. Then, the repair line 7 which is not applied to the transition of the data signal back 〇1, 702, and 703 are disconnected from the other applied. Here, the connection and disconnection of the wiring are emitted by emitting laser light. In order to reduce the capacitive load due to the repair lines 701 and 702, the first and the first. A repair line 701 and 702 are formed without intersecting the data line m, and the first and second repair lines 701 and 70. 2 is connected to the third repair line 70 that intersects the data line 171 via the repair line connecting bar 704. When necessary, the 'repair line connecting bar 7G4 can be omitted and the repair line addition and removal can directly intersect The data line 171. 15 The electrostatic leakage line 601 intersects the repair lines 701 and 702 and is insulated. Subsequently, referring to FIG. 5 and FIG. 6, the intersect structure electrostatic scattered wiring 601 and the repair lines 701 and 702 will be explained. The 702 and the gate line 121 are formed on the same layer, and the electrostatic dissipative wiring 601 and the data line 171 are formed on the same layer. And π]. Therefore, the electrostatic dissipative wiring 601 and the repair line 701 are insulated by the gate insulating layer 140. In addition, a passivation layer 180 is formed on the electrostatic dissipative wiring 601. Outside the repair line 701, a Wiring channel 801 is formed, and wiring 801 is available for A common voltage to contact one of the upper boards 17 200527349 The contact ball (not shown in Figure 4) of the electrode 27 (as shown in Figure 2) 270. Repair on the outer wire bonding (OLB) pad The distance between the line 701 and the wiring channel 801 is very short. In this TFT array panel structure, static electricity usually flows into the wiring channel 801 formed on the outermost side of the 5 TFT display panel. The static electricity is transmitted to 0LB 塾 (such as The adjacent patch line 701 on (414) shown in FIG. 3, wherein the patch line 701 and the wiring channel 801 are close to each other, and flow into the adjacent patch line 701. The static electricity that flows into the repair line 701, intersects the repair line to be transmitted to the static electricity wiring 601 before approaching the repair line connecting bar 704 to intersect the repair line 701, and the static electricity that flows into the static electricity wiring 601 is dispersed throughout Above the array panel. Even if the repair line 701 and the static electricity wiring 601 are insulated with the gate insulation layer 410, the static electricity still has a high voltage, which may cause the insulation damage of the gate insulation layer 140, and it is transmitted to the static electricity wiring 601. As a result, the static electricity flowing into the repair line 701 cannot enter the display area due to the intersection of the repair line 701 and the electrostatic scattered wiring 601, and TFT defects in the display area D caused by the static electricity can be prevented. According to the present invention, since the static electricity flowing into the repair line is not transmitted to the shell material line, the thin film transistor defects in the display area caused by the static electricity can be avoided. 20. Although the embodiments of the present invention have been described in detail with reference to the drawings, those skilled in the art should understand that the present invention is not limited to specific implementations, and that various changes and modifications that are applied by the concept of the present invention will It is included in the scope of the present invention as defined by the scope of the attached patent application. [Schematic description] 18 200527349 effect circuit diagram; Figure 1 的 Perspective of a liquid crystal display according to an embodiment of the present invention. Figure 2 is a pixel equivalent of a liquid crystal display according to an embodiment of the present invention. Figure 3 is based on this. A schematic layout of a liquid crystal display according to an embodiment of the invention is shown in FIG. 5; FIG. 4 is an enlarged layout diagram of part a of the liquid crystal display of FIG. 3; and FIG. 5 is a repair in a thin film transistor display according to an embodiment of the present invention. The layout diagram of the intersection of the lines and the electrostatic dissipative wiring; and FIG. 6 is a cross-sectional view of the thin film diode 10 array panel taken along the line vi_VI shown in FIG. 5. [Description of main component symbols] 3- .. LC layer 400 ... Gate driver 100 ... Lower panel 440 ... Data conductor 121 ... Gate line 441-444 ... Gate drive integrated circuit 140 ... Gate insulation layer 411-414 ... Gate driver FPC 171 ... Data cable 500 ... Data driver 190 ... Pixel electrode 540 ... Data driver 1C 200 ... Upper panel 550 --- PCB 230 ... Color filter 600 ... Signal controller 270 ... · Common electrode 601 ... Electrostatic wiring 300 ... · Liquid crystal (LC) panel assembly 700 ... Driving voltage generators 321a-321d, 322a-322d, 323a-701,702,703 ... · Repair lines 323d, 324a-324d, 421, 422, 704 ... repairing line connecting rods 423a, 423b, 424, 521-524 ... 800. Gray-scale voltage generator gate drive signal wiring channel 801 ... Wiring pattern 19