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TW200520210A - Method of fabricating an integrated circuit through utilizing metal layers to program randomly positioned basic units - Google Patents

Method of fabricating an integrated circuit through utilizing metal layers to program randomly positioned basic units

Info

Publication number
TW200520210A
TW200520210A TW092135189A TW92135189A TW200520210A TW 200520210 A TW200520210 A TW 200520210A TW 092135189 A TW092135189 A TW 092135189A TW 92135189 A TW92135189 A TW 92135189A TW 200520210 A TW200520210 A TW 200520210A
Authority
TW
Taiwan
Prior art keywords
basic units
integrated circuit
fabricating
metal layers
randomly positioned
Prior art date
Application number
TW092135189A
Other languages
Chinese (zh)
Other versions
TWI227057B (en
Inventor
Hsin-Shih Wang
Original Assignee
Faraday Tech Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Faraday Tech Corp filed Critical Faraday Tech Corp
Priority to TW92135189A priority Critical patent/TWI227057B/en
Application granted granted Critical
Publication of TWI227057B publication Critical patent/TWI227057B/en
Publication of TW200520210A publication Critical patent/TW200520210A/en

Links

Landscapes

  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

A method of fabricating an integrated circuit. The integrated circuit has a semiconductor body. The method includes forming a plurality of basic units with the same component characteristic on the semiconductor body, and forming at least a layout layer to program the basic units without restriction against allocation of the basic units positioned on the semiconductor body for building a clocked logic circuit and a non-clocked logic circuit.
TW92135189A 2003-12-12 2003-12-12 Method of fabricating an integrated circuit through utilizing metal layers to program randomly positioned basic units TWI227057B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW92135189A TWI227057B (en) 2003-12-12 2003-12-12 Method of fabricating an integrated circuit through utilizing metal layers to program randomly positioned basic units

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW92135189A TWI227057B (en) 2003-12-12 2003-12-12 Method of fabricating an integrated circuit through utilizing metal layers to program randomly positioned basic units

Publications (2)

Publication Number Publication Date
TWI227057B TWI227057B (en) 2005-01-21
TW200520210A true TW200520210A (en) 2005-06-16

Family

ID=35654732

Family Applications (1)

Application Number Title Priority Date Filing Date
TW92135189A TWI227057B (en) 2003-12-12 2003-12-12 Method of fabricating an integrated circuit through utilizing metal layers to program randomly positioned basic units

Country Status (1)

Country Link
TW (1) TWI227057B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI403914B (en) * 2010-03-08 2013-08-01 Mstar Semiconductor Inc Apparatus and method for preventing congestive placement

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI403914B (en) * 2010-03-08 2013-08-01 Mstar Semiconductor Inc Apparatus and method for preventing congestive placement

Also Published As

Publication number Publication date
TWI227057B (en) 2005-01-21

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Legal Events

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MK4A Expiration of patent term of an invention patent