TW200509316A - Multi-bit vertical memory cell and manufacturing method thereof - Google Patents
Multi-bit vertical memory cell and manufacturing method thereofInfo
- Publication number
- TW200509316A TW200509316A TW092122631A TW92122631A TW200509316A TW 200509316 A TW200509316 A TW 200509316A TW 092122631 A TW092122631 A TW 092122631A TW 92122631 A TW92122631 A TW 92122631A TW 200509316 A TW200509316 A TW 200509316A
- Authority
- TW
- Taiwan
- Prior art keywords
- conductive layer
- trench
- bit
- layer
- memory cell
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title abstract 2
- 238000009413 insulation Methods 0.000 abstract 4
- 239000004065 semiconductor Substances 0.000 abstract 3
- 239000000758 substrate Substances 0.000 abstract 3
Landscapes
- Non-Volatile Memory (AREA)
- Semiconductor Memories (AREA)
Abstract
The present invention provides a multi-bit vertical memory cell including following manufacturing processes: to first provide a semiconductor substrate having a trench, to form a first doped region in the semiconductor substrate on the trench bottom, to form a bit-line insulation layer on the first doped region, and to form a first conductive layer as the floating gate on the bit-line insulation layer with the first conductive layer located on the sidewall of the trench; then, to form an insulation layer on the first conductive layer and a second conductive layer as the floating gate on the insulation layer, while proceeding ion doping step onto the surface of semiconductor substrate to form a second doped region; then to form a dielectric layer on the sidewall of the first conductive layer and the second conductive layer and fill a third conductive layer into the trench as the control gate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW92122631A TWI229923B (en) | 2003-08-18 | 2003-08-18 | Multi-bit vertical memory cell |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW92122631A TWI229923B (en) | 2003-08-18 | 2003-08-18 | Multi-bit vertical memory cell |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW200509316A true TW200509316A (en) | 2005-03-01 |
| TWI229923B TWI229923B (en) | 2005-03-21 |
Family
ID=36083229
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW92122631A TWI229923B (en) | 2003-08-18 | 2003-08-18 | Multi-bit vertical memory cell |
Country Status (1)
| Country | Link |
|---|---|
| TW (1) | TWI229923B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI606578B (en) * | 2016-07-18 | 2017-11-21 | 新唐科技股份有限公司 | Non-volatile memory array and method of fabricating the same |
-
2003
- 2003-08-18 TW TW92122631A patent/TWI229923B/en not_active IP Right Cessation
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI606578B (en) * | 2016-07-18 | 2017-11-21 | 新唐科技股份有限公司 | Non-volatile memory array and method of fabricating the same |
Also Published As
| Publication number | Publication date |
|---|---|
| TWI229923B (en) | 2005-03-21 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101281886B (en) | Recessed gate MOS transistor device and method of making same | |
| CN100440517C (en) | Semiconductor device with increased channel length and manufacturing method thereof | |
| TW554540B (en) | A semiconductor memory and its production process | |
| JP2008536336A5 (en) | ||
| EP3017476A1 (en) | Formation of self-aligned source for split-gate non-volatile memory cell | |
| KR101935007B1 (en) | Semiconductor device and method for manufacturing the same | |
| TW200518268A (en) | Improved method for manufacturing a 2-transistor memory cell, and improved memory cell thus obtained | |
| CN100452358C (en) | Method of manufacturing a flash memory device | |
| TWI264114B (en) | Nonvolatile two-transistor semiconductor memory cell and associated fabrication methods | |
| TW200629484A (en) | Nonvolatile memory cell device and fabrication method thereof | |
| TW200605272A (en) | Single transistor dram cell with reduced current leakage and method of manufacture | |
| WO2003067639A3 (en) | Method for producing a memory cell | |
| KR100481177B1 (en) | A semiconductor device reducing a cell pad resistance and the fabrication method thereof | |
| KR101160036B1 (en) | Method for forming semiconductor device | |
| KR20070114463A (en) | Semiconductor device having self-aligned contact plug and manufacturing method thereof | |
| TW200509316A (en) | Multi-bit vertical memory cell and manufacturing method thereof | |
| TW334618B (en) | The multi-levels ROM and its manufacturing method | |
| CN100527388C (en) | Method of manufacturing a flash memory device | |
| TW200607080A (en) | Flash memory cell and fabricating method thereof | |
| TW357456B (en) | Method of manufacturing a trench storage capacitor embedded in a semiconductor substrate | |
| KR101087889B1 (en) | Manufacturing Method of Semiconductor Device | |
| CN101388415A (en) | Non-volatile memory and preparation thereof | |
| TW200620482A (en) | Memory cell with reduced DIBL and VSS resistance | |
| TW200520162A (en) | Method for forming a self-aligned buried strap in a vertical memory cell | |
| KR970053925A (en) | Manufacturing Method of Flash Memory Cell |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MK4A | Expiration of patent term of an invention patent |