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TW200425300A - Method of manufacturing semiconductor device - Google Patents

Method of manufacturing semiconductor device Download PDF

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TW200425300A
TW200425300A TW93112231A TW93112231A TW200425300A TW 200425300 A TW200425300 A TW 200425300A TW 93112231 A TW93112231 A TW 93112231A TW 93112231 A TW93112231 A TW 93112231A TW 200425300 A TW200425300 A TW 200425300A
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nitrogen
atmosphere
manufacturing
semiconductor device
patent application
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TW93112231A
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Chinese (zh)
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TWI239048B (en
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Mitsuaki Hori
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Fujitsu Ltd
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Abstract

The present invention provides a manufacturing method for semiconductor device, which can eliminate the penetration of boron gate insulative film from ion injection into gates, and also eliminate the reduction of mobility of channel areas. The manufacturing method according to the present invention includes the following steps: a gate insulative layer forming process, for forming the gate insulative layer on the active area of the semiconductor substrate; a nitrogen introduction process for introducing nitrogen from the surface of the gate insulative layer with active nitrogen; and, an annealing process for conducting the annealing process in the NO gas environment, so as to maintain high concentration distribution of nitrogen on the surface during introducing nitrogen into the gate insulative layer, and maintain the low concentration distribution at the interface to the semiconductor substrate.

Description

200425300 玖、發明說明: 【發明所屬之技辦領城】 發明領域 本發明,係關於半導體裝置之製造方法,特別,關於 5具有含氮之閘絕緣膜的半導體襄置之製造方法。 發明背景 為了提高半導體積體電路之積體度,及動作速度,而 將MOSFET(金屬半導體場效應電晶體)小型化,及將閉緣膜 1〇薄膜化。閘絕緣膜上所形成之閑極,一般而言,由多晶石夕 層’或多晶石夕層與魏物之疊層所形成。多晶石夕層,通常, 與源/沒區域同時被離子注入雜f。在表面通道型p通道 MOSFET之閘極。源/沒區極’離子注入有p型離質。 當閘絕緣膜變薄時’離子注入於表面通道型p通道 15 MOSFET之閘極的p型雜質即棚,即穿透閉絕緣膜,而產生 到達通到區域之現象。若棚被注入n型區域即通道區域,則 不只使閾值變動,且使移動度劣化。 導入氮於閘絕緣膜事宜對於抑制硼之穿透有六丈之事 為眾所熟知。為了向氧化矽層中導入氮, 20 而在NH3氣體 NO氣體、Νβ氣體等之氮化性氣體氛圍氣 间礼中碡電阻加熱 燈加熱來加熱矽基板之方法,已為眾所周4 门知。使用氮電漿 將更高濃度之氮導入於氧化矽膜表面之方法, ^ 知。 也已為眾 閘極與通道區200425300 发明 Description of the invention: [Leadership of the technical office to which the invention belongs] FIELD OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device having a nitrogen-containing gate insulating film. BACKGROUND OF THE INVENTION In order to improve the integration degree and operating speed of semiconductor integrated circuits, MOSFETs (Metal Semiconductor Field Effect Transistors) are miniaturized and the closed-edge film 10 is thinned. Generally, the idler electrode formed on the gate insulating film is formed by a polycrystalline silicon layer 'or a laminated layer of polycrystalline silicon layer and Wei Wu. The polycrystalline layer is usually ion-implanted with impurity f at the same time as the source / nano area. Gate of surface channel type p-channel MOSFET. Source / inverted region 'ion implantation is p-type. When the gate insulating film becomes thin, the ion implanted into the gate electrode of the surface channel type p-channel 15 MOSFET, that is, the p-type impurity, that is, the shed, penetrates the closed insulating film, and then reaches the region. When the shed is injected into the n-type region, that is, the channel region, not only the threshold value is changed, but the mobility is also deteriorated. The introduction of nitrogen into the gate insulating film is well known to inhibit the penetration of boron. In order to introduce nitrogen into the silicon oxide layer, a method of heating a silicon substrate by heating with a resistance heating lamp in a nitric gas atmosphere such as NH3 gas, NO gas, Nβ gas, etc. has been well known. . A method for introducing a higher concentration of nitrogen onto the surface of a silicon oxide film using a nitrogen plasma is known. Gate and channel area

當閘絕緣膜一變薄,隧道電流即通流於 5 200425300 5 域間,使閘洩漏增加之現象也 ^ ^ _ 匕為+所周知。若使用電容 率更咼之咼電容率絕緣膜, Θ代虱化矽之閘絕緣膜(之一 邛分),則可一面把反轉電容換 付私谷換异胺厚變薄,一面把物理膜 厚弄厚,抑制閘洩漏電流。氮卜 一 虱化虱化矽,一般而言,電容 率高於氧化矽,所以對於一面 丁、面抑制反轉電容換算膜厚,一 10 面把物理性膜厚變厚也有效。 特開2002-198531號,提案有··藉由遠距電聚氮化處 ,,將氮導入於形成在石夕基板上之氧化石夕的問絕緣膜,接 著以800C〜1100C之溫度,在n2〇氛圍氣中將閘絕緣膜氧 化氮化退火,藉此使氮再分佈,形成具有均―氮潰度之問 、、色緣膜事。且揭鉻一種形成6at%以上,例如8at%、1〇at%之 均氣/辰度的閘纟巴緣膜,藉此得以獲取長壽命、高可靠性 之電晶體。When the gate insulation film becomes thinner, the tunnel current flows through the 5 200425300 5 domain, and the phenomenon that the gate leakage increases is also known as ^ ^ _. If you use a dielectric permittivity insulating film with a higher permittivity, and a gate insulating film of Θ generation silicon (one cent), you can change the thickness of the inverting capacitor to the thickness of the isoamine and change the physical thickness. The film thickness is thickened to suppress the gate leakage current. Nitrogen oxides, lice and lice silicon, in general, the permittivity is higher than that of silicon oxide, so it is effective to reduce the physical film thickness on one side and the other side to suppress the inversion of the capacitance. Japanese Patent Application Laid-Open No. 2002-198531 proposes to introduce nitrogen into a silicon oxide insulating film formed on a stone substrate through a long-distance galvanic polynitride, and then at a temperature of 800C to 1100C at The gate insulating film is oxidized and annealed in an atmosphere of n20, thereby redistributing the nitrogen, and forming a film with a uniform-nitrogen collapse. In addition, chrome is used to form a gate edge film with an average gas / age of 6at%, such as 8at% and 10at%, so as to obtain a long-life, high-reliability transistor.

在此,所謂遠距電漿氮化係指,在與收容有基板之處 15理室不同之另外電漿產生室内,藉微波等來產生氮電漿, 將活性氮搬運至處理室來進行氮化之處理而言。 若用N2〇氛圍氣來進行退火,則可考慮到n2〇氣體之一 部分分解成N2、〇2、NO等,從而在控制氧化膜厚增加量、 氮濃度增加量之晶圓面内之均一性,晶圓間之均一性方 20 面,可能產生問題。 特開2002-110674號,更提案有:由於氮—進入Si基板 側之界面附近,MOST(MOS Transister:金氧半導體電晶體) 之移動度即降低’所以為了抑制^基板界面附近之氮濃 度,及減低閘洩漏電流,而導入許多氮事宜。就是提案有··Here, the so-called remote plasma nitriding means that in a plasma generating chamber different from the 15 chambers where the substrate is housed, a nitrogen plasma is generated by microwaves or the like, and the active nitrogen is transferred to a processing chamber for nitrogen. In terms of processing. If the annealing is performed in an N2O atmosphere, a part of the n2O gas may be considered to be decomposed into N2, 02, NO, etc., so as to control the uniformity in the wafer surface by controlling the increase in the oxide film thickness and the increase in nitrogen concentration. The 20-side uniformity between wafers may cause problems. Japanese Patent Application Laid-Open No. 2002-110674 further proposes that: as nitrogen enters near the interface on the Si substrate side, the mobility of MOST (MOS Transister: metal-oxide semiconductor transistor) decreases, so in order to suppress the nitrogen concentration near the substrate interface And reduce the gate leakage current, and introduce many nitrogen matters. There are proposals ...

6 200425300 在預先導八离+ ^ Μ ★石夕氧氮化m,進行使用氮氣雕 化’精此抑制狁 之自由基氮 附近之氮之導,並抑制向-基板界面 【發明内面之氛壤度事宜。 5 發明概要 本發明之目的,係在於提供一種具有薄閑 有優點特性之MOSFET的半導體裝置之製造方去 、,且 本發明之其他目的係在於,提供一種可抑^離子、、主入 10 於閘極之狀義緣膜穿透,且,抑制通道區域之移動 降低的半導體裝置之製造方法。 夕又 依據本發明之第一觀點,提供半導體之製造方法,並 包含有: 彳、、 閘絕緣層形成工程,係在半導體基板之活性區域上, 形成閘絕緣層; 氮導入工程,係藉由活性氮從上述閘絕緣層表面側導 入氮;及 退火處理工程,係在NO氣體氛圍氣中施行退火處理, 以便在導入有氮之閘絕緣層内,在表面側保持氮之高濃度 分佈,並在同半導體基板之界面保持低濃度分佈。 20 圖式簡單說明 第1A〜1F圖為斷面圖及圖表,係用來說明本發明者所 進行之實驗及其結果。 第2A〜2D圖為斷面圖及圖表,係用來說明本發明者所 進行之實驗及其結果。 200425300 第3A、3B圖為表及圖表,係顯示本發明所進行的其他 實驗之條件及結果。 ^ 第4A、4B圖為表及圖表,係顯示本發明者所進行的更 其他實驗之條件及結果。 5 第5A〜5D圖為半導體基板之斷面圖,係用來說明依據 本發明實施例之半導體装置之製造方法。 第6A、6B圖為表及圖表,係顯示本發明者所進行的其 他實驗之條件及結果。 第7A、7B、7C圖為斷面圖,係概略地顯示遠距電繁礼 1〇化裝置,去耦RF氮電漿裝置之構成,及概略地顯示使用高 K材料之閘絕緣層之構成。 L實施方式;3 較佳實施例之詳細說明 若把氮導入於氧化矽膜,則在對於閘極之硼之離子注 15 入時,可有效地防止硼之閘絕緣膜之穿透。然而,隨著問 絕緣膜之變薄,而變成難以防止硼之穿透,導致删達至間 絕緣膜與石夕基板之界面。删一旦到達通道區域,即令移動 鲁 度降低。又,界面中之硼濃度易成為不均等。 將由電漿所產生之活性氮導入於氧化矽膜或氧化氮化 1 2〇 矽膜,藉此可取得絕緣膜表面及膜中具有峰值之氮濃度分 佈。藉著使用此種電漿氮化,一面抑制與基板之界面中的 氮濃度,一面可導入更多之氮。高氮濃度可有效地抑制硼 之穿透。 又,導入更多之氮,藉此可把絕緣膜之電容率弄大, 8 200425300 一面把反轉電容換算厚(Teff)壓薄,一面使物理性膜厚變 更,藉此可有效地抑制閘之漏電流。 將絕緣膜與矽基板之界面中之氮濃度壓低,藉此可抑 制通道區域中之移動度之降低。又,可有效地抑制 5 NBTI(negative bias temperature instability :負偏壓溫度不務 定性)特性之劣化。又,NBTI特性為加大應力使溫度上升時 之劣化特性。 使氮電漿產生於自基板離開之場所並導入活性氮於基 板之技術,叫做對基板不添加損傷之表面無損傷製程。 1〇 树明者認為:儘管將錢中職生之活性氮導入於 一從電漿隔開配置之矽基板的絕緣膜,恐也有可能對於基 板添加某種之損傷。為了恢復此損傷而在比氮導入工程^ 高之溫度中退火處理必有效。於是調查了由退火處理= 成之影響。 驗之樣品製作工程。 206 200425300 Pre-guided eight-off + ^ M ★ Shi Xi oxynitride m, using nitrogen carving to refine the suppression of nitrogen in the vicinity of the free radical nitrogen, and to the-substrate interface [invention of the inner surface of the soil Degree matters. 5 SUMMARY OF THE INVENTION The object of the present invention is to provide a semiconductor device manufacturing method for a MOSFET with thin and advantageous characteristics, and another object of the present invention is to provide a ionic, The gate electrode is a method for fabricating a semiconductor device that penetrates the edge film and suppresses a decrease in the movement of the channel region. In accordance with the first aspect of the present invention, a method for manufacturing a semiconductor is provided, which includes: (i) a gate insulating layer forming process for forming a gate insulating layer on an active region of a semiconductor substrate; (ii) a nitrogen introduction project through Active nitrogen is introduced into nitrogen from the surface side of the above-mentioned gate insulation layer; and the annealing process is performed in an atmosphere of NO gas in order to maintain a high concentration distribution of nitrogen on the surface side in the gate insulation layer with nitrogen introduced, and Low concentration distribution is maintained at the interface with the semiconductor substrate. 20 Brief Description of Drawings Figures 1A to 1F are sectional views and diagrams, and are used to explain the experiments and results performed by the inventors. Figures 2A to 2D are sectional views and diagrams, and are used to explain the experiments performed by the inventors and their results. 200425300 Figures 3A and 3B are tables and charts showing conditions and results of other experiments performed by the present invention. ^ Figures 4A and 4B are tables and diagrams showing conditions and results of more experiments performed by the inventors. 5 Figures 5A to 5D are cross-sectional views of a semiconductor substrate, and are used to explain a method for manufacturing a semiconductor device according to an embodiment of the present invention. Figures 6A and 6B are tables and graphs showing conditions and results of other experiments performed by the present inventors. Figures 7A, 7B, and 7C are cross-sectional views that schematically show the structure of a remote electric gifting device, a decoupling RF nitrogen plasma device, and the structure of a gate insulation layer using a high-K material. . L embodiment; 3 Detailed description of the preferred embodiment If nitrogen is introduced into the silicon oxide film, the gate insulating film of boron can be effectively prevented from penetrating when the gate is implanted with boron ion implantation. However, with the thinning of the insulating film, it becomes difficult to prevent the penetration of boron, which leads to the interface between the insulating film and the Shixi substrate. Once the deletion reaches the channel area, it will reduce the mobile robustness. In addition, the boron concentration at the interface tends to be uneven. The active nitrogen generated by the plasma is introduced into a silicon oxide film or a silicon nitride oxide silicon film, thereby obtaining a nitrogen concentration distribution having a peak on the surface of the insulating film and in the film. By using such plasma nitriding, more nitrogen can be introduced while suppressing the nitrogen concentration in the interface with the substrate. High nitrogen concentration can effectively inhibit the penetration of boron. In addition, by introducing more nitrogen, the permittivity of the insulating film can be increased. 8 200425300 While reducing the reverse capacitance conversion thickness (Teff), the physical film thickness can be changed while suppressing the gate effectively. Leakage current. By reducing the nitrogen concentration in the interface between the insulating film and the silicon substrate, the decrease in the mobility in the channel region can be suppressed. In addition, degradation of 5 NBTI (negative bias temperature instability) characteristics can be effectively suppressed. The NBTI characteristic is a degradation characteristic when the temperature is increased by increasing the stress. The technique of generating nitrogen plasma at a place away from the substrate and introducing active nitrogen to the substrate is called a non-damaging surface process without adding damage to the substrate. 10 Shumingzhe believes that although the active nitrogen of Qian Zhongzhong's students is introduced into an insulating film of a silicon substrate arranged from the plasma, it is possible to add some kind of damage to the substrate. In order to recover this damage, the annealing treatment must be effective at a higher temperature than the nitrogen introduction process ^. The effect of annealing treatment was investigated. Inspection of the sample production process. 20

如第1A圖所示,在石夕基板!之表面形成用來覆^ =罩’並對梅1進行各向異性姓刻,形二 離用溝2。堆積氧化妙等之絕緣層,以填補元件分離㈣ 猎化學機械研磨(CMP)來除去石夕基板球面上之無用的^ 層’藉此形成-贱溝隔_(ST1)而紅元件分離【 3,其中’該淺漢隔離膜(ST1)係埋入絕緣膜於溝内而成 "如第1B圖所示,在赋之氧氛圍氣中,將厚h 之乳化膜5形成於⑦基板!之活性區域4表面。X · 9 "U4253〇〇 如第1C圖所示,從用1.5W微波來激勵之氮電漿導出活 性氮,利用此活性氮,在45(rc之氛圍氣中將氮導入於閘絕 、、膜5。氮被導入於氧化膜表面後,成為氮化氧化石夕膜&。 使用遠距電漿氮化裝置來導入之活性氮,此遠距電漿氮化 5裳置可從美國加州聖大克拉(寸^夕夕今今)阿布雷特馬特 里阿爾公司(77。今彳卜、7于"7小只社)取得。 第7Α圖,係顯示遠距電漿氮化裝置之概略構成。將Μ] 氣體導入電漿產生室21,使之產生氮電漿。從氮電漿產生 1〇 •〖生氮(自由基)’供給反應室22内。在反應室2中,備有一 含有多數燈之燈加熱裝置23,可加熱晶圓24。 如第1D圖所示,在105(rc之氮氛圍氣中進行退火處 理,使因活性氮之導入而產生之基板之損傷恢復。氮化氧 化矽膜5x,即在退火處理下成為氮化氧化矽膜巧。 如第1E圖所示,在閘絕緣膜上,藉⑽來堆積厚产 15 _nm之多w層’並使用保護層圖案來圖案形成㈣二 灿ng),藉此形成了閘長〇.5以^抑m左右之間極6。閘 絕緣膜5y也被圖案形成後,成為閘絕緣膜5z。 待把閘極形成圖案之後,離子注入P型雜質(即B) ’形 成了擴展區域7。其後,藉由化學氣相堆積(cvd)將厚产大 2〇約60細之氧化石夕膜堆積於基板上,以便覆蓋問極接^進 行反應性離子姓刻,以除去平坦面上之氧化㈣,只在問 極壁上留下側壁隔片8。 甲 側壁隔片8形成後’進一步,離子注入P型雜質B,形成 了高濃度祕區域9。在離子注人卫程時,也對於閘極6離 10 200425300 子注入p型雜質B。其後,形成層間絕緣膜,接著,形成用 來露出源/汲區域,閘極之開口,以形成電極。藉此取得 樣品S1。 又’為了比較而在第lc圖所示之活性氮導入工程之 5後,不進行第1D圖所示之退火處理,如第1E圖所示,製作 了形成有MOSFET之比較樣品S2。 第1F圖為圖案,係顯示所製作之二種之特 性。圖中,橫軸係以單位V表示從閘電壓^^減去閾值之 Vq-Vth。縱軸係以單位㈤以^^表示將反轉電容換算膜η仃 10乘於相互電導Gm後,再乘積通道區域之寬%與長度乙之比 W/L的規格化相互電導。相互電導不管閘絕緣膜之厚度及 通道區均之大小為何,均被規格化。 活性氮導入後,在氮氛圍氣中以l〇50°C之溫度進行退 火處理之樣品S1之特性S1,係表示一種與未進行氮氛圍氣 15中之退火處理的幻之特性S2比較,在大致全區域有更高之 相互電導。這是很清楚地顯示M0SFET之特性在退火處理 下提高。此可認為其結果提高了載體之移動度及提高了飽 和電流。 如此進行後,雖判明了活性氮之導入後藉著進行退火 20處理,而提高電晶體之特性事宜,但進一步調查了特性之 提高依退火處理之條件而如何變化事宜。作為退火處理之 氛圍氣用者,使用了氮(N2)、一氧化氮_)、氧(〇2)。 首先,藉由與第1A圖所示之工程同樣之工程,在矽基 板形成了元件分離區域3。接著,藉由與第1B圖所示之工程 11 5 =樣之工程’在溫度航之◦相氣中將絲板熱氧化形 战了厚度1.2nm之閘氧化膜5。 样卜 土十皿/又了與第1C圖所示之工程斤 =氮化在導人氮之階段,閘絕緣狀膜厚,係名 、助橢圓儀之測定下,為1.457nm 圍^第2A圖所示,對於第三樣品幻,在導人氮後之氮氛 2中進行了删。(:线讀理。此敎纽為不活性氣 體中之退火處理。 10As shown in Figure 1A, on Shixi substrate! The surface is formed to cover ^ = cover ', and an anisotropic surname engraving is performed on Mei 1 to form a groove 2 for separation. Accumulate insulating layers such as oxides to fill the element separation. 猎 Chemical mechanical polishing (CMP) to remove useless ^ layers on the spherical surface of Shixi substrate 'to form-base gap_ (ST1) and red element separation [3 "The shallow Han isolation film (ST1) is formed by burying an insulating film in a trench" as shown in Fig. 1B. In an oxygen-added atmosphere, an emulsified film 5 having a thickness of h is formed on a substrate. Active surface 4 surface. X · 9 " U4253〇〇 As shown in Fig. 1C, the active nitrogen is derived from a nitrogen plasma excited with 1.5W microwave, and this active nitrogen is used to introduce nitrogen into the gate in the atmosphere of 45 (rc, And film 5. After nitrogen is introduced on the surface of the oxide film, it becomes a nitrided oxide stone film &. Active nitrogen introduced using a remote plasma nitriding device. This remote plasma nitriding can be obtained from the United States. Acquired from Santa Clara, Calif. (Inch ^ Xi Xi Jin Jin) by Abret Material Company (77. Today, 7 Yu & 7 small companies). Figure 7A shows the remote plasma nitriding The general structure of the device. The M] gas is introduced into the plasma generation chamber 21 to generate a nitrogen plasma. The nitrogen plasma generates 10 • [nitrogen-generating (radical) 'is supplied to the reaction chamber 22. In the reaction chamber 2 A lamp heating device 23 containing a large number of lamps is provided to heat the wafer 24. As shown in FIG. 1D, annealing treatment is performed in a nitrogen atmosphere of 105 (rc) to cause damage to the substrate caused by the introduction of active nitrogen. Recovery. The silicon nitride oxide film 5x, that is, becomes a silicon nitride oxide film under annealing treatment. As shown in Figure 1E, the gate is insulated On the film, as many layers as 15 μm thick are deposited by using ⑽ and a protective layer pattern is used to pattern the ㈣2 灿 ng), thereby forming a gate length of 0.5 to 6 m. Gate After the insulating film 5y is also patterned, it becomes the gate insulating film 5z. After the gate is patterned, the P-type impurity (ie, B) is ion-implanted to form the extended region 7. After that, the chemical vapor deposition (cvd) ) Stack a large thickness of about 60 fine oxide stone film on the substrate so as to cover the interfacial electrode ^ and carry out reactive ion engraving to remove the plutonium oxide on the flat surface, leaving only on the interfacial wall Side wall spacers 8. After the formation of the side wall spacers 8, the P-type impurity B was ion-implanted to form a high-concentration secretion region 9. In the ion implantation process, the gate 6 was also implanted with p-type 10 25 025 300 sub-types. Impurity B. Thereafter, an interlayer insulating film is formed, and then an opening for exposing the source / drain region and the gate electrode is formed to form an electrode. Thereby, a sample S1 is obtained. The activity shown in FIG. After the nitrogen introduction process 5, the annealing treatment shown in FIG. 1D is not performed, as shown in FIG. 1E A comparative sample S2 was fabricated with a MOSFET formed. Figure 1F is a pattern showing the characteristics of the two types produced. In the figure, the horizontal axis represents Vq-Vth minus the threshold value from the gate voltage ^^ in the unit V. Vertical The axis system is expressed in units ㈤ ^^. Multiplying the inversion capacitance conversion film η 仃 10 by the mutual conductance Gm, then multiplying the normalized mutual conductance of the ratio of the width% of the channel area to the length B by W / L. The thickness of the insulating film and the size of the channel area are all standardized. After the introduction of the active nitrogen, the characteristics S1 of the sample S1 which is annealed in a nitrogen atmosphere at a temperature of 1050 ° C is a kind of Compared with the characteristic S2 of the annealing treatment in the nitrogen atmosphere 15, the mutual conductance is higher in almost the entire area. This clearly shows that the characteristics of the MOSFET are improved by the annealing treatment. This can be considered as a result of improving the carrier mobility and increasing the saturation current. After doing so, although it was identified that the characteristics of the transistor were improved by annealing 20 after the introduction of the active nitrogen, the matter of how the improvement of the characteristics was changed according to the conditions of the annealing treatment was further investigated. As the atmosphere users for the annealing treatment, nitrogen (N2), nitric oxide (N), and oxygen (O2) were used. First, by the same process as the process shown in FIG. 1A, an element isolation region 3 is formed on a silicon substrate. Next, by the same process as shown in Fig. 1B, 11 5 = the same process, the wire plate was thermally oxidized in the phase air temperature to form a gate oxide film 5 having a thickness of 1.2 nm. The sample weight is shown in Figure 1C and the engineering weight shown in Figure 1C = nitriding at the stage of introducing nitrogen, the gate insulation-like film thickness, as measured by the name and elliptical instrument, is 1.457nm around ^ 2A As shown in the figure, the third sample was deleted in nitrogen atmosphere 2 after introducing nitrogen. (: Line reading theory. This button is an annealing treatment in an inactive gas. 10

第2B圖所示,對於第四樣品S4,在導人氮後之氮氛 圍氣中進仃了 950°C之退火處理。此退火處理,係伴隨著氮 化之退火處理者。其後,在氮氛圍氣中進行了忉刈它退火 处理。在此階段’用橢圓儀來測定之閘絕緣膜之膜厚為 •538nm。與第三樣品相較,發現對第四樣品追加有N〇中 15 之退火處理。在^^〇中因退火處理而增加之膜厚為化㈨以㈤。As shown in Fig. 2B, the fourth sample S4 was annealed at 950 ° C in a nitrogen atmosphere after introducing nitrogen. This annealing treatment is an annealing treatment accompanied by nitrification. Thereafter, it was annealed in a nitrogen atmosphere. At this stage ', the film thickness of the gate insulating film measured with an ellipsometer was • 538 nm. Compared with the third sample, it was found that an annealing treatment of No. 15 in No. 15 was added to the fourth sample. The film thickness increased due to the annealing treatment in ^^ 〇 is ㈨ to ㈨.

如第2 C圖所示,對於第五樣品S 5,在氮導入後之氧(〇 2) 氛圍氣中進行了 1〇〇〇〇c之退火處理。此退火處理,係伴隨 著氧化之退火處理者。其後,在氮氛圍氣中進行了 1〇5〇t: L火處理。與弟二樣品相較,發現對弟五樣品追加有〇2 中之退火處理。 20 又,各退火處理,係藉快速熱退火RTA來進行,只要 極端之時間。其後形成了與第第二樣品同樣的絕緣閘 極、源/汲區域。 第2D圖為圖表,係顯示所製作之第三、第四及第五樣 品之特性。橫軸及縱輛係與第ιρ_同一。 12 5 與第-樣品在閘絕緣膜之厚度、活性氮導入時之溫度 方面有若干差異之第三樣品S3之特性S3,係與_圖之^ ㈣大致相同。活性氮導入後在NO氛圍氣中進行了赋 之(氮化、氧化)退火處理之樣品以之特性以,係顯示明顯 之提南。活性氮導入後在氧氛圍氣中進行了麵。(:之(氧化) 退火處理之樣品S5之S5,係顯示兩者之中間特性。 10As shown in FIG. 2C, the fifth sample S5 was subjected to an annealing treatment of 10,000 ° C in an oxygen (02) atmosphere after nitrogen introduction. This annealing treatment is an annealing treatment accompanied by oxidation. Thereafter, a 1050 t: L fire treatment was performed in a nitrogen atmosphere. Compared with the second sample, it was found that an additional annealing treatment in the second sample was added to the second sample. 20 Moreover, each annealing process is performed by rapid thermal annealing RTA, as long as it is an extreme time. Thereafter, the same insulated gate and source / drain regions as in the second sample were formed. Figure 2D is a chart showing the characteristics of the third, fourth, and fifth samples. The horizontal axis and vertical vehicle are the same as the first ιρ_. The characteristic S3 of the third sample S3, which has some differences in the thickness of the gate insulating film and the temperature when the active nitrogen is introduced from the first sample, is approximately the same as ^ in the figure. The characteristics of the samples which were annealed (nitrided, oxidized) and annealed in the NO atmosphere after the introduction of active nitrogen showed a significant improvement. After the introduction of the active nitrogen, it was surfaced in an oxygen atmosphere. (: The (oxidation) annealing S5, S5 shows the intermediate characteristics of the two. 10

歸納此等之結果,清楚地顯示活性氮導入後進行退火 處理的話相互電導即提高。儘管在氧氛圍氣中進行退火處 理’與氮氛輯巾之退*處理之情況啸起來相互導電會 提南’但進-步在NO氛圍氣中之氮化氧化退火進行時為相 互導電變為最高。 這疋因為發明者認為,若依N〇氛圍氣中之退火,基板 側之界面附近有則效地形成矽一氧一氮(Si_〇_N)結合。Summarizing these results, it is clearly shown that the mutual conductance increases when the annealing treatment is performed after the introduction of active nitrogen. Although the annealing treatment in the oxygen atmosphere 'and the retreat of the nitrogen atmosphere and the treatment of the towels will make each other conductive, it will raise the south', but when the nitriding oxidation annealing in the NO atmosphere is carried out, it becomes conductive to each other. highest. This is because the inventor believes that if annealing is performed in a No atmosphere, a silicon-oxygen-nitrogen (Si_O_N) bond is effectively formed near the interface on the substrate side.

但,在氧化性或氮化氧化性氛圍氣中之退火處理,可 15使其產生基板之變化,或氮化氧化,使閘絕緣膜變厚。若 作有效閘絕緣膜厚2nm以下之電晶體時,膜厚增加少<Ν〇 氣圍氣中之退火處理應較為適宜。由NO氣體氛圍氣中之退 火處理所達成之絕緣膜之增加,宜為〇.2nm以下。若要取得 厚度1.7nm以下之閘絕緣膜時,初始氧化膜宜作成1·5ηιη以 20 下。 如在習知技術所述,已提案有在矽氧氮化膳導入活性 氮(自由基)。本發明者’係在具有由下述二種製造方法所形 成之絕緣膜之半導體裝置中,進行了可靠性評估即 TDDB(time dependent dielectric breakdown)之測定。(1),(2)之 13 200425300 製造方法ic杉w τ、氧化膜厚、活性氮導入、no熱處理、 n2處理,雖說輪流次序有所不同,但各處理内容卻為同一者。 (1) 待形成了熱氧化膜後,用NO氣體氛圍氣加以熱處 理,然後藉活性氮來導入氮,接著,用仏氣體氛圍氣來熱 5 處理之閘絕緣膜;及 (2) 待形成了熱氧化膜後,用活性炭來導入氮,然後在 NO氣體氛圍氣中熱處理,進而用比其更高溫之仏氣體氛圍 氣來進行熱處理之閘絕緣膜。 當以上述測定來比較應力外加後在判定基準以下之成 10 品率時’(1)之樣品雖為0% ’但(2)之樣品卻為88% ’兩者產 生了大差距。 即,(2)之樣品,具有與(1)之樣品大致同樣之在絕緣膜 中之氮分佈,但在可靠性方面之效果之差距卻很大。本發 明者認為此理由為:在活性氮導入處理後進行之NO氛圍氣 15 之熱處理下,在基板側之界面附近高效率地形成矽-氧-氮 (Si-Ο-Ν)結合。 又,在NO氛圍氣中之退火後,其所以進行了更高溫之 N2氣體氛圍氣之熱處理,是為了改善NBTI特性而做者,並 非必須之工程。 20 就電漿氮化裝置來說,除了遠距電漿裝置以外,已知 可從同一美國加州聖大克拉(寸 > 夕夕今今)阿布雷特馬特 里阿爾公司(7 7°今彳社)取得之去耦RF氮 電漿裝置。 第7B圖,係概略地顯示去耦RF氮電漿裝置之構成。在 14 200425300 此裝置方面,藉由設在反應室25頂部上之線圈26之RF激 勵,使氮電漿產生,其中反應室25係在下部收容樣品27。 氮電漿只在沿著反應室之上壁的,離樣品27之區域内產 生。以下,將此裝置略稱為DPN。 ' 5 使用DPN氮化裝置,形成二種之樣品。 、 第3A圖,係顯示二種類之樣品S6、S7及比較用之樣品 S8之製作條件。 首先藉由與第ΙΑ、1B圖所示工程同樣之工程,在9〇〇 °C之氧氛圍氣中,使用燈退火裝置來成膜一厚度〇.85nm之 0 10氧化矽膜。其後,在DPN裝置内用RF電力7〇〇W來激勵氮電 漿’接著在室溫氛圍氣中將活性氮導入於一配置在下方之 基板之氧化秒膜。 對於第六樣品S6 ’待在l〇〇〇°C之減壓氧氛圍氣中進行 氧化退火處理(RTO)之後,在l〇5〇°C之氮氛圍氣中進行了退 15 火處理(RTA)。 對於第七樣品S7,活性氮導入後在950°C之NO氣體氛 圍氣中進行了氮化氧化退火處理(RTNO),接著,在i〇50°C ® 之氮氛圍氣中進行了退火處理(RTA)。為了比較,而只用氧 化矽膜來形成閘極之樣品S8,也製作了二類。 、 第3B圖,係顯示此等樣品之測定結果。橫轴係以單位 ,^ m表示反轉電谷換异膜厚Teff。縱軸係以單位(A/cm2)表示 閑漏電流V只用氧化矽膜來形成閘絕緣膜之樣品S8之特性 S8 ’係用X符號表示的2點;外插時便成為直線。 第6樣品S6之特性S6,係位於比較樣品8之特性S8之 15 200425300 τ,顯示可減少閘漏電流。 第七樣品S7之測定點S7,為NO中之氮化氧化退火處 理,其氧化被抑制,比測定點S6還薄。又,比特性S8更存 在於下方,顯示與樣品S6同樣可減低閘漏電流。 、 5 於第3B圖之特性,閘漏電流之減低程度係就兩個樣品 ·. S6、S7來說大致同等。樣品8,係將有效閘絕緣膜厚作成 0.013nm之薄厚。又,具有優異之相互電導。就半導體之特 性來說’在閘長度40nm之MOS電震體方面可提高飽和電流 3.6% 〇 φ 10 再者,藉由二次離子質量分析(SIMS),調查了在導入 有活生氮之閘絕緣膜之氮如何分佈之問題。使用DPN作為 活性氮導入裝置,在氧氛圍氣中,及NO氛圍氣中進行了活 性氮導入後之退火處理。 第4A圖之表,係顯示二種類之樣品之製作工程。第九 15樣品S9,係在900 °C氧氛圍氣中藉由燈退火裝置將厚度 〇.8nm之氧化矽膜成膜,然後利用700W之去耦rf氮電漿在 室溫氛圍氣中導入(DPN)活性氮於閘氧化膜中。其後,在 · iooo°c之減壓氧氛圍氣中進行退火處理(rT0),接著在1050 °C之氮氛圍氣中進行退火處理(RTA)。 20 第十樣品S10,係與第九樣品S9同樣形成厚度〇·8ηιη之 氧化矽膜,藉由DPN裝置導入活性氮之後,進行95〇t: 2ν〇 一 氣體氛圍氣中之退火處理,進而在105〇t之氮氛圍氣中進 行了退火處理(RTA)。 苐4B圖為圖表’係顯示此等二種類之樣品之測定結 16 200425300 果。轴係以單位nm表示距自表面之、/朱度’縱轴係以單位 (at〇ms/CC)表示所測定之氮濃度。在氧氛圍氣中進行退火處 理之樣品之特性S9,係在表面附近具有更高之峰值,與深 度同時逐地減少氮濃度。雖在測定範圍内顯示1位數以上之 ' 5 氮濃度之變化,但中途却存在閘絕緣膜與石夕基板之界面。 · 氮化氧化膜之膜厚為1.324nm ;氮濃度之峰值為 8.6at% ;與基板之界面中的氮濃度為3.6 at%。在界面之氮 濃度為峰氮濃度之"2以下。 活性氮導入後在NO氛圍中進行退火處理之樣品S10之 鲁 10特性S10為:其表面側之峰值擴大成某程度之平坦,但由活 性氮之導入而成之氧分佈與由NO氛圍氣中之退火而起之 氮分佈必被含在裡面。其後顯示比特S9高一點之氮濃度, 门日守P返✓朱度而減少之趨向,更顯示從某深度之位置形成與 特性S9同樣之分佈。 氮化氧化膜之膜厚為1.174nm ;氮濃度之峰值為 7-6at%;與基板之界面中之氮濃度為4 9at%。若使氮化氧化 '之尽度增加,則可將基板界面之氮濃度作成峰氮濃度之 修 1/2以下。基板與界面之氮濃度,均為5 at%。 卜從把表面側之氮濃度作成更高,及把跟基板之界面之 、 氮/辰度作成更低之觀點著眼時,〇2等之氧化性氛圍氣中之 退火較為合適。但膜厚之增加卻是大於在氧化氛圍氣中退 … 火日t之增加。從把氮化氧化膜之厚度壓薄,及形成具有優 異驅動力之電晶體的觀點論之,NQ等之氮化氧化性氛圍氣 中之退火較為合適。 17 峰值Γ卩—敎結果,氮漢度均在閘概縣面側具有 罙度而向同絲板之界面持續減少。因此,可知: ’多ϊ之氮導人於閑絕緣膜中,可有效地抑制删However, annealing treatment in an oxidizing or nitriding oxidizing atmosphere can cause a change in the substrate, or nitriding oxidation, to make the gate insulating film thicker. If it is used as a transistor with an effective gate insulation film thickness of 2nm or less, the annealing treatment in a surrounding gas with a small increase in the film thickness should be more suitable. The increase of the insulating film achieved by the annealing treatment in the NO gas atmosphere should preferably be 0.2 nm or less. To obtain a gate insulation film with a thickness of 1.7nm or less, the initial oxide film should be made 1.5 to 20nm. As described in the prior art, it has been proposed to introduce active nitrogen (free radicals) into a silicon oxynitride diet. The inventor's measured the reliability of a semiconductor device having an insulating film formed by the following two manufacturing methods, that is, TDDB (time dependent dielectric breakdown). (1), (2) of 13 200425300 Manufacturing method ic fir w τ, oxide film thickness, active nitrogen introduction, no heat treatment, n2 treatment, although the order of rotation is different, each treatment content is the same. (1) After the thermal oxide film is formed, heat-treat it with NO gas atmosphere, then introduce nitrogen by active nitrogen, and then heat the gate insulation film treated with krypton gas atmosphere 5; and (2) to be formed After thermally oxidizing the film, activated carbon is used to introduce nitrogen, and then heat treatment is performed in a NO gas atmosphere, and then a gate insulation film is subjected to heat treatment with a higher temperature thoron gas atmosphere. When the above measurement is used to compare the 10 rate of the product below the criterion after the stress is applied, the sample of (1) is 0%, but the sample of (2) is 88%. This results in a large gap. That is, the sample of (2) has a nitrogen distribution in the insulating film that is approximately the same as that of the sample of (1), but there is a large difference in the effect of reliability. The inventors believe that this reason is that under the heat treatment of NO atmosphere 15 after the active nitrogen introduction treatment, a silicon-oxygen-nitrogen (Si-O-N) bond is efficiently formed near the interface on the substrate side. In addition, after annealing in a NO atmosphere, the heat treatment in a higher temperature N2 atmosphere was performed in order to improve the characteristics of NBTI, and it is not a necessary process. 20 As far as plasma nitridation devices, in addition to remote plasma devices, it is known to be available from the same company in Santa Clara, California (Inch > Xi Xi Jin Jin) Abret Material (7 7 ° present彳 社) obtained decoupling RF nitrogen plasma device. Fig. 7B is a schematic diagram showing the structure of a decoupling RF nitrogen plasma device. In terms of this device, 14 200425300, a nitrogen plasma is generated by RF excitation of a coil 26 provided on the top of the reaction chamber 25, and the reaction chamber 25 houses a sample 27 in the lower part. Nitrogen plasma was generated only in the area along the upper wall of the reaction chamber, away from sample 27. Hereinafter, this device is referred to as a DPN. '5 Using a DPN nitriding device, two samples were formed. Figure 3A shows the production conditions of two types of samples S6, S7 and comparison sample S8. First, through the same process as that shown in Figures IA and 1B, a lamp annealing device was used to form a silicon oxide film with a thickness of 0.85 nm in an oxygen atmosphere at 900 ° C. Thereafter, the plasma plasma was excited with RF power of 700 W in the DPN device, and then the active nitrogen was introduced into the oxide second film of a substrate disposed below in a room temperature atmosphere. After the sixth sample S6 ′ was subjected to oxidation annealing treatment (RTO) in a reduced pressure oxygen atmosphere at 1000 ° C, an annealing treatment (RTA) was performed in a nitrogen atmosphere at 105 ° C. ). For the seventh sample S7, nitriding oxidation annealing (RTNO) was performed in a NO gas atmosphere at 950 ° C after the introduction of active nitrogen, and then an annealing treatment was performed in a nitrogen atmosphere at i50 ° C ® ( RTA). For comparison, sample S8, which uses only a silicon oxide film to form the gate electrode, has also been made into two types. Figure 3B shows the measurement results of these samples. The horizontal axis is in units, ^ m represents the inversion electric valley change film thickness Teff. The vertical axis is expressed in units (A / cm2). The characteristics of the sample S8 where the gate leakage film V is formed of a silicon oxide film using only a silicon oxide film. S8 ′ are two points represented by the X symbol; when extrapolated, it becomes a straight line. The characteristic S6 of the sixth sample S6 is located at 15 200425300 τ of the characteristic S8 of the comparative sample 8, which shows that the gate leakage current can be reduced. The measurement point S7 of the seventh sample S7 is a nitriding oxidation annealing treatment in NO, and its oxidation is suppressed and is thinner than the measurement point S6. In addition, it is lower than the characteristic S8 and shows that the gate leakage current can be reduced similarly to the sample S6. 5 In the characteristics of Fig. 3B, the reduction degree of brake leakage current is about the same for the two samples. S6 and S7. Sample No. 8 was made with an effective gate insulation film thickness of 0.013 nm. In addition, it has excellent mutual conductance. Regarding the characteristics of semiconductors, the saturation current can be increased by 3.6% in MOS electro-oscillators with a gate length of 40 nm. Φφ 10 Furthermore, by introducing secondary ion mass analysis (SIMS), investigations have been conducted on the introduction of gates with active nitrogen. How to distribute the nitrogen of the insulating film. DPN was used as the active nitrogen introduction device, and annealing was performed after the introduction of active nitrogen in an oxygen atmosphere and a NO atmosphere. The table in Figure 4A shows the production process of two types of samples. The ninth 15 sample S9 was formed into a silicon oxide film with a thickness of 0.8 nm by a lamp annealing device in an oxygen atmosphere at 900 ° C, and then introduced into a room temperature atmosphere using a 700 W decoupled rf nitrogen plasma ( DPN) active nitrogen in the gate oxide film. Thereafter, annealing treatment (rT0) was performed in a reduced-pressure oxygen atmosphere at iooo ° C, and then annealing treatment (RTA) was performed in a nitrogen atmosphere at 1050 ° C. 20 The tenth sample S10 is the same as the ninth sample S9, and a silicon oxide film with a thickness of 0.8 nm is formed. After introducing active nitrogen through a DPN device, an annealing treatment in a gas atmosphere of 950 t: 2v0 is performed, and then An annealing treatment (RTA) was performed in a nitrogen atmosphere of 1050 t. Figure 4B is a graph 'showing the measurement results of these two kinds of samples. The axis system represents the distance from the surface in units of nm, and the vertical axis system represents the measured nitrogen concentration in units (at 0 ms / CC). The characteristic S9 of the samples annealed in an oxygen atmosphere has a higher peak near the surface and reduces the nitrogen concentration one by one at the same time as the depth. Although the change in the nitrogen concentration of '5 with a single digit or more was displayed in the measurement range, there was an interface between the gate insulating film and the Shi Xi substrate in the middle. · The thickness of the nitrided oxide film is 1.324nm; the peak of the nitrogen concentration is 8.6at%; the nitrogen concentration in the interface with the substrate is 3.6at%. The nitrogen concentration at the interface is less than " 2 of the peak nitrogen concentration. The characteristic S10 of the sample S10 which is annealed in the NO atmosphere after the introduction of active nitrogen is: the peak on the surface side is expanded to a certain level, but the distribution of oxygen resulting from the introduction of active nitrogen and the atmosphere in the NO atmosphere The nitrogen distribution resulting from the annealing must be contained in it. After that, it shows that the nitrogen concentration of bit S9 is a little higher, and the trend of decrease in the number of gates is reduced. It also shows that the same distribution as that of characteristic S9 is formed from a certain depth position. The thickness of the nitrided oxide film is 1.174nm; the peak of the nitrogen concentration is 7-6at%; the nitrogen concentration in the interface with the substrate is 49at%. If the degree of nitriding oxidation is increased as much as possible, the nitrogen concentration at the interface of the substrate can be adjusted to be less than 1/2 of the peak nitrogen concentration. The substrate and interface nitrogen concentrations were both 5 at%. From the viewpoint of making the nitrogen concentration on the surface side higher and the nitrogen and temperature at the interface with the substrate lower, annealing in an oxidizing atmosphere such as 0 2 is more appropriate. However, the increase in film thickness is greater than the decrease in the oxidation atmosphere. From the standpoint of reducing the thickness of the nitrided oxide film and forming a transistor having an excellent driving force, annealing in a nitrided oxidizing atmosphere such as NQ is more appropriate. 17 Peak Γ 卩 — 敎 As a result, the nitrogen content has a 罙 degree on the face side of Zhaji County, and the interface to the same wire plate continues to decrease. Therefore, it can be seen that: ′ multi-nitrogen nitrogen is introduced into the leisure insulating film, which can effectively suppress deletion.

同時財基板之界面之氯濃度宜抑制至5挪以下 制通道區域中移動度之降低。 P 再者,㈣餘氧切狀表㈣近導人有活性氮, =去輕RF電漿之激勵能從7_降下至5簡之條件進行 了貫驗。At the same time, the chlorine concentration at the interface of the substrate should be suppressed to a decrease in the mobility in the control channel area of 5 or less. P In addition, the residual oxygen-cutting surface has been shown to have active nitrogen, which has been tested under the conditions that the excitation energy of the light RF plasma can be reduced from 7 to 5.

的—帛6A圖之表,係概略地顯示三種類之製作工程。第十 樣。DS11係、在900C之氧氛圍氣中,藉由燈退火農置 W度〇.8nm之氧化賴加以成膜,利用5娜之氮 電:在室溫氛圍氣中,在沒有偏壓電場下將活性氮導入於 閘氧化膜中(刪)。其後在1()_之減壓氧錢氣中進行退 火處理(RTO),進而在1050t之氮氛圍氣中進行退火 15 (RTA)。-The table of Figure 6A shows three types of production processes. Tenth. DS11 series, in a 900C oxygen atmosphere, the film was formed by anneal with a degree of oxidation of 0.8 W at a wavelength of 0.8 nm, using a nitrogen gas of 5 nanometers: in a room temperature atmosphere without a bias electric field Active nitrogen is introduced into the gate oxide film (deleted). Thereafter, annealing (RTO) was performed in a reduced-pressure oxygen gas of 1 () _, and then annealing 15 (RTA) was performed in a nitrogen atmosphere of 1050t.

*第十二之樣品S12,係第十一之樣品同樣,在9〇〇〇c氧 汛圍氣中,#由燈退火裝置將厚度08nm之氧化石夕膜加以成 膜’利用500W之去麵RF氮電聚在室溫氛圍氣中將活性氮導 入於閘氧化膜中(DPN)。其後,在95〇t之減壓N〇氛圍氣中 20進行了退火處理(RTNO),進而在!〇5〇t之氮氛圍氣中進行 了退火處理(RTA)。 第十三之樣品S13,係與第十一之樣品同樣,在9〇〇它 氧氛圍氣中,藉由燈退火裝置將厚度〇.8nm之氧化矽膜加以 成膜,利用500W之去耦RF,RF氮電漿在室溫氛圍氣中將 18 200425300 活性氮導入於間氧化膜中(DPN)。其後,在1〇〇(rc之減壓氧 氛圍氣中進行退火處理(RTO),進而在95〇。〇之減壓N〇氛圍 氣中進行退火處理(RTNG),接著在咖“氮氛圍氣中進 行了退火處理(RAT)。在NO氛圍氣中之退火處理後,其所 5以用高溫進行RTA者,是為了 NBTI特性之改性之改善,並 非為必須之工程。 第6B圖,係顯不三種類之樣品之測定結$。橫轴係| 示距自表面之深度,以單位nm表示;縱軸係以單位(at〇m/cc) 表示所測定的氮濃度。^ 1〇 錢氛圍氣中進行了退火處理之第十-樣品S11之特 性S11,係表面附近具有更高之峰值,炭濃度即隨著深度漸 漸地減少。在測定範圍内表示i位數以上之氮濃度變化。閘 絕緣膜與矽基板之界面係在存於中途。 氮化氧化膜之膜厚為L189nm,氮濃度之峰值為 I5 7.5at%;與基板之界面中之氮濃度為a挪。在界面之氮 濃度為峰氮濃度的1/2以下。 活性氮導入後,在NO氛圍氣中進行退火處理之第十二 鲁 木八。<^12之特性S12,係在表面附近之峰值增加了一些,並 擴大。其後’雖顯示比特性S11高一點之氮濃度中,顯示了 20隨深度減少之趨向,但接近界面時氮量便增加,顯示在表 面與界面附近表面具有兩個峰之特徵性之分佈。助氛圍氣 中之退火處理,似乎傾向㈣氮導人於與基板之界㈣近。 氮化氧化膜之膜厚為L17〇nm ;氮濃度之峰值為 7.8at% ;與基板之界面中之氮濃度為4.8 at%。 19 活性氮導入後,繼氧氛圍氣之退火來進行NO氛圍氣退 火之弟十三樣品S13之特性S13,其表面側之峰值係與氧退 火之樣品之S13之特性S13同等。雖看起來與S11之特性有差 距,但這是二次離子質量分析(SIMS)之測定誤差内之差 異。從而可確認;如接近界面氮量即增加,界面在N〇氛圍 氣中有效地被氮化。 氮化氧化膜之膜厚為氮濃度之峰值為74 at% ;與基板之界面中之氮濃度為2.4 at%。 儘管活性氮導入後,在NO氛圍氣中進行退火處理,以 改善特性,但在與基板之界面之氮濃度可抑制在5 at%以 下。選擇條件,藉此可將在界面之氮濃度作成在表面之氮 7辰度之1/2以下。從樣品S12、S13之特性S12、S13,分別控 制氮分佈及借助NO氛圍氣中進行退火處理之氮分佈,藉此 判明可實現各種氮分佈。可在不太變形藉由活性氮導入之 分佈形狀下,藉NO氛圍氣中退火將氮導入於界面附近。也 容易實現依在閘絕緣膜表面與基板之界面不同之請求而不 同之氮濃度。 第5A〜5D圖為根據以上之實驗結果的斷面圖,顯示依 據本發明實施例之製造方法。 如第5A圖所示,藉ST1將元件分離區域3形成於矽基板 1。在ST1之元件分離區域所劃定之活性區域中,進行所需 之離子注入,形成η型阱4η、p型阱4p。又,雖只顯示了兩 個阱,但同時可形成多數個拼。 在露出之矽基板表面進行800。〇之熱解法氧化(pyr〇 5 仆為二 1 Γ°η,形成厚度7細之氧化頻11。該熱解法氧 ㈣使氫燃燒之氛圍氣來進行氧化之方法。厚 度7nm之閘氧化媒,便成為用來製作動作電壓3V左右之 MOSFET(金氧半導體場效應電晶體)之閘絕緣膜。 ,製作絲進行低電壓動作之MQSFET之活性區域方 面、,精_來除所成長的氧化補在965。(:之氧氛圍氣 中進魏氧化,%成厚度Unm之氧化賴丨2。厚度Μ細 碭氧化膜例如’成為用來製作動作電壓1〜1.2V左右之 MOSFET之閘絕緣膜。 ^ ^ 右在矽基板表面存在自然氧化 W在氫自由基等之還原性氛圍氣除去自然氧化膜也* The twelfth sample S12 is the same as the eleventh sample. In the 9000c oxygen flood gas, #the oxide annealing film with a thickness of 08 nm is formed by a lamp annealing device. RF nitrogen electropolymerization introduces active nitrogen into the gate oxide film (DPN) in a room temperature atmosphere. After that, an annealing treatment (RTNO) was performed in a reduced-pressure NO atmosphere 20 of 95 ° T, and the temperature was further reduced. Annealing treatment (RTA) was performed in a nitrogen atmosphere of 0.05 t. The thirteenth sample S13 is the same as the eleventh sample. The silicon oxide film with a thickness of 0.8 nm was formed by a lamp annealing device in a 900-degree oxygen atmosphere, and a 500W decoupling RF was used. , RF nitrogen plasma introduced 18 200425300 active nitrogen into the interlayer oxide film (DPN) in a room temperature atmosphere. Thereafter, annealing treatment (RTO) was performed in a reduced-pressure oxygen atmosphere at 100 ° (rc), and then annealing treatment (RTNG) was performed in a reduced-pressure atmosphere of 95.0 ° C, followed by a nitrogen atmosphere. Annealing treatment (RAT) was performed in the air. After annealing treatment in the NO atmosphere, those who perform RTA at high temperature are for the purpose of improving the characteristics of NBTI, and are not a necessary process. Figure 6B, The measurement results are shown for three types of samples. The horizontal axis | shows the depth from the surface in units of nm; the vertical axis shows the measured nitrogen concentration in units (at 0 m / cc). ^ 1〇 The tenth-sample S11, which has been annealed in the atmosphere of money, has the characteristic S11, which has a higher peak near the surface, and the carbon concentration gradually decreases with the depth. Within the measurement range, the nitrogen concentration above the i-bit number changes. The interface between the gate insulating film and the silicon substrate is halfway there. The film thickness of the nitrided oxide film is L189nm, and the peak of the nitrogen concentration is I5 7.5at%; the nitrogen concentration in the interface with the substrate is a. The nitrogen concentration is less than 1/2 of the peak nitrogen concentration. After the introduction of active nitrogen, in a NO atmosphere The twelfth Lumba with annealing treatment. ≪ ^ 12's characteristic S12, the peak near the surface increased a little, and expanded. After that, although it showed a higher nitrogen concentration than characteristic S11, it showed 20 As the depth decreases, the amount of nitrogen increases when approaching the interface, showing a characteristic distribution of two peaks on the surface and the surface near the interface. The annealing treatment in the atmospheric atmosphere seems to favor the nitrogen in the boundary with the substrate The thickness of the nitrided oxide film is L170nm; the peak of the nitrogen concentration is 7.8at%; the nitrogen concentration at the interface with the substrate is 4.8at%. 19 After the introduction of active nitrogen, annealing is performed after the oxygen atmosphere. The characteristics S13 of the sample S13 of the younger brother who performed annealing in the NO atmosphere, the peak value on the surface side is the same as the characteristic S13 of the sample S13 in oxygen annealing. Although it seems to be different from the characteristic of S11, this is the secondary ion mass. The difference within the measurement error of the SIMS can be confirmed; if the amount of nitrogen near the interface is increased, the interface is effectively nitrided in the atmosphere of NO. The film thickness of the nitrided oxide film is a peak nitrogen concentration of 74. at%; interface with substrate The nitrogen concentration in the substrate is 2.4 at%. Although the active nitrogen is annealed in a NO atmosphere to improve the characteristics, the nitrogen concentration at the interface with the substrate can be suppressed to 5 at% or less. The conditions are selected to thereby The nitrogen concentration at the interface can be made less than 1/2 of 7 degrees of nitrogen on the surface. From the characteristics S12 and S13 of the samples S12 and S13, the nitrogen distribution is controlled and the nitrogen distribution annealed in the NO atmosphere is used. This judgment can realize various nitrogen distributions. The nitrogen can be introduced near the interface by annealing in a NO atmosphere under the shape of the distribution that is not deformed by the introduction of active nitrogen. It is also easy to realize that the interface between the gate insulation film and the substrate is different The request varies with the nitrogen concentration. Figures 5A to 5D are cross-sectional views based on the above experimental results, showing a manufacturing method according to an embodiment of the present invention. As shown in FIG. 5A, the element isolation region 3 is formed on the silicon substrate 1 by ST1. In the active region defined by the element isolation region of ST1, a desired ion implantation is performed to form an n-type well 4n and a p-type well 4p. Also, although only two wells are shown, a plurality of tiles can be formed at the same time. Perform 800 on the exposed silicon substrate surface. 〇The pyrolysis oxidation (pyr05 is 2 1 Γ ° η, forming an oxidation frequency 11 with a thickness of 7 fines. This pyrolysis method uses oxygen to oxidize the atmosphere of hydrogen combustion. The gate oxidation medium with a thickness of 7nm, It becomes a gate insulating film for making MOSFETs (metal oxide semiconductor field effect transistors) with an operating voltage of about 3V. In the active area of the MQSFET for the low-voltage operation of the wire, the growth of the oxide is refined 965. (: Oxidation in the oxygen atmosphere, the oxide thickness of the thickness of Unm is 2. The thickness M thin oxide film, for example, is used as a gate insulating film for making MOSFETs with an operating voltage of about 1 to 1.2V. ^ ^ Right there is natural oxidation on the surface of the silicon substrate. The natural oxide film is also removed in a reducing atmosphere such as hydrogen radicals.

10 而可形成良質之氧化矽膜。 可。藉著氧化清淨之矽表面 雖次明了形成具有二種厚度之閘絕緣膜的情況,但形 成三種以上之厚度的閘絕緣層也可。 15 20 在此氧化下,先所形成之厚氧化石夕膜11也成長若干。 而具有薄閘絕緣膜12之陕,也形成11型及ρ型。10 A good silicon oxide film can be formed. can. Although the surface of the silicon which has been cleaned by oxidizing is known to form a gate insulating film having two thicknesses, it is possible to form a gate insulating layer having three or more thicknesses. 15 20 Under this oxidation, the thick oxide stone film 11 formed earlier also grows a few. Shaanxi with thin gate insulation film 12 also forms 11-type and ρ-type.

如第5圖所不,利用由1.5kw之微波所得之rpn氮電 漿,在55CTC之氛圍氣中將活性氮導入於閘絕緣膜n、12。 導入活性氮,使閘絕_成為氮化氧切膜ηχ、12χ。 如第5C®所示,在95(rc之而氣體氛圍氣中進行退火 處理。藉由NO氣體進一步將閘絕緣膜氧氮化,使損傷恢 復。像這樣進行之後,形成閘絕緣膜lly、12y。接著,為 了抑制NBTI特性之劣化,而在氮氛圍氣中進一步進行高溫 之退火處理也可。 其後,在閘絕緣膜上形成1〇〇nm之多晶矽層,使用保 21 200425300 護層圖案,來圖案形成為所 形成閘長40nm之閘極。 需之閘長。在薄閘絕緣膜12y上 、、如第5D®所tf’將用來選擇施有圖案形紅閘極及n 區域’ pit返區域的保護層遮罩作為遮罩,進行口型雜 5質、Ρ型雜質之離子注入,以製作擴展區域π)。其後, 隹積厚度大約60nm之氧切膜,進行rie,藉此形成側壁As shown in Fig. 5, the active nitrogen was introduced into the gate insulating films n, 12 in an atmosphere of 55CTC by using an RPN nitrogen plasma obtained from a 1.5kw microwave. Active nitrogen was introduced to make the gate insulator _x and 12x an oxygen nitride cut film. As shown in Section 5C®, annealing is performed in a gas atmosphere of 95 ° C. The gate insulating film is further oxynitrided with NO gas to restore damage. After performing this process, the gate insulating films 1ly, 12y are formed. Next, in order to suppress the degradation of NBTI characteristics, further annealing at a high temperature may be performed in a nitrogen atmosphere. Thereafter, a 100 nm polycrystalline silicon layer is formed on the gate insulation film, and a protective layer pattern of 20042125300 is used. The gate pattern is formed to form a gate with a gate length of 40 nm. The gate length is required. On the thin gate insulating film 12y, tf 'as described in 5D® will be used to select a patterned red gate and n region' pit. The protective layer mask of the return region is used as a mask, and ion implantation of the mouth-type impurity and P-type impurity is performed to make the extended region π). Thereafter, an oxygen-cut film was deposited with a thickness of about 60 nm, and rie was performed to form a sidewall.

隔片8。❹絲分_極(具有側壁隔>〇及η通道區域、P 通道區域之保護層遮罩,將_雜質、ρ型雜質離子注入, 形成源/汲區域9η、9ρ。 10 錄’在依需要而露出之秒表面,進行%化物化,藉 層間絶緣膜來覆盍。然後,在層間絕緣膜2形成開口,形成 引出插頭’進而形成必需要之布線、層間絕緣膜。 如此進打之後,具有薄閘絕緣層及厚問絕緣層,在薄 問絕緣層也抑_之穿透,1,形成已抑制通道區域之移 15動度之降低的CMOS積體電路。 -pi仄。丄往卜Spacer 8. Filament separation poles (with sidewall spacers> 0 and η channel area, P channel area protective layer mask, _ impurities, p-type impurities are ion implanted to form source / drain regions 9η, 9ρ. 10 Record '在 依If necessary, the exposed second surface is chemically converted and covered with an interlayer insulating film. Then, an opening is formed in the interlayer insulating film 2 to form a lead-out plug, thereby forming necessary wiring and an interlayer insulating film. With a thin gate insulation layer and a thick interlayer insulation layer, the penetration of the thin interlayer insulation layer is also suppressed, 1, to form a CMOS integrated circuit that has suppressed the movement of the channel region by 15 degrees of movement reduction. -Pi 仄. 仄 往Bu

_ •'付別 JL/IUIU 之溥有效閘絕緣膜厚’可防止硼之穿透,且可抑制通$ 域之移動度減低之半導體裝置。 20_ • 'Fujitsu JL / IUIU's effective gate insulation film thickness' can prevent the penetration of boron, and can suppress the reduction of the mobility of semiconductor devices. 20

像這樣,若依據上述之實施例,則可在問絕緣膜^ 入表面側較高,在與矽基板之界面較低之氣濃度,扣 之閘絕緣膜穿透,且抑制通道區域巾之移動度減低。 雖依據以上之實施例說明本發明,但本發明並不丹 於此等實施例。例如,隨目的,而使用用不糾生氣體利 之NO中之退火,以替代冊中之氮化氧化^也可。^ 22 200425300 形成於半導體基板上之絕緣膜用者,可形成含有以下 之氮的f化氧化石夕膜,以替代氧化石夕膜也可。在氮化氧化 矽膜上®層具有高電容率之高k材料之膜也可。 第7C圖,係顯不疊層有high_k(高電容率)材料之膜的構 成high姆料具有顯著地大於氧化石夕之電容率。例如,於 ㈣板3G表面,在75Gt之氧氛圍氣中藉燈退火裝置來成膜 厚度〇.58nm之氧化矽膜31,並藉由5〇〇冒之去耦只^^氮電漿在 室溫氛圍氣中將活性氮導入於閘氧化膜中(DpN)。其後,進 行900 C之NO氣體氛圍氣中之退火處理(RTN〇),進而進行 ίο 了 i〇5〇°c氮氛圍氣中之退火處S(RTA)。此氮化氧化膜厚為 0.80nm。在底子氧化膜厚,電漿氮化強度、N〇氣體退火溫 度,時間等之調整下,進一步薄膜化應該也可能。在此氧 化氮化膜上,形成Al、Hf、Zr等之氧化膜,該等之氧化矽 酸鹽膜等high-k(高電容率),藉此防止半導體基板與高電容 15率材料之反應,且,可提供優異可靠性及驅動能力之閘絕 緣膜。 可其他各種之變更、修飾、組合,對該業而言,是顯 而易知者。 產業上之可利用性 2〇 適合於特別微細化之MOS電晶體。 【阐式簡單說明】 第1A〜1F圖為斷面圖及圖表,係用來說明本發明者所 進行之實驗及其結果。 第2A〜2D圖為斷面圖及圖表,係用來說明本發明者所 23 200425300 進行之實驗及其結果。 第3A、3B圖為表及圖表,係顯示本發明所進行的其他 實驗之條件及結果。 第4A、4B圖為表及圖表,係顯示本發明者所進行的更 ' 5 其他實驗之條件及結果。 ' 第5A〜5D圖為半導體基板之斷面圖,係用來說明依據 本發明實施例之半導體裝置之製造方法。 第6A、6B圖為表及圖表,係顯示本發明者所進行的其 他實驗之條件及結果。 10 第7A、7B、7C圖為斷面圖,係概略地顯示遠距電漿氮 化裝置,去耦RF氮電漿裝置之構成,及概略地顯示使用高 K材料之閘絕緣層之構成。 【圖式之主要元件代表符號表】 1...碎基板 6 ···閘極 2…溝 7…擴展區域 3...元件分離區域 7p,7n…擴展區域 4…活性區域 8...側壁隔片 4η···η型解 9…源/ί及區域 4ρ···ρ型阱 9η,9ρ…源/沒區域 5...閘氧化膜 11,12…閘絕緣膜 5x,5y,llx,12x···氮化氧化石夕膜 lly…閘絕緣膜 6...閘極 12y…閘絕緣膜 5y···閘絕緣膜 Ig...閘漏電流 5z...閘絕緣膜 S1-S10...樣品 24 200425300As such, according to the above-mentioned embodiment, the insulating film may have a higher entrance surface side, a lower gas concentration at the interface with the silicon substrate, a snap gate insulating film penetrates, and the movement of the towel in the channel area may be suppressed. Degree decreases. Although the present invention has been described based on the above embodiments, the present invention is not limited to these embodiments. For example, depending on the purpose, it is possible to use the annealing in NO with non-producing gas instead of nitriding oxidation in the book. ^ 22 200425300 For users of insulating films formed on semiconductor substrates, it is possible to form f-type oxide oxide films containing the following nitrogen instead of oxide oxide films. A film of high-k material with a high permittivity on the silicon nitride oxide film can also be used. Fig. 7C shows that the high-layer material composed of a film not laminated with high_k (high permittivity) material has a permittivity that is significantly larger than that of oxidized stone. For example, a silicon oxide film 31 having a thickness of 0.58 nm is formed on a 3G surface of a slab by a lamp annealing device in an oxygen atmosphere of 75 Gt, and only ^^ nitrogen plasma is used in the chamber by decoupling by 500. Active nitrogen was introduced into the gate oxide film (DpN) in a warm atmosphere. After that, an annealing treatment (RTN0) in a NO gas atmosphere at 900 C was performed, and then an annealing area S (RTA) in a nitrogen atmosphere at 105 ° C was performed. This nitride oxide film has a thickness of 0.80 nm. Under the adjustment of substrate oxide film thickness, plasma nitriding strength, NO gas annealing temperature, time, etc., further thinning should be possible. On this oxynitride film, oxide films such as Al, Hf, Zr, etc., and high-k (high permittivity) oxide silicate films are formed to prevent the semiconductor substrate from reacting with the high-capacitance 15-rate material. And, it can provide gate insulation film with excellent reliability and driving ability. Various other changes, modifications, and combinations are obvious to the industry. Industrial Applicability 20 It is suitable for MOS transistors that are particularly miniaturized. [Explanation of explanation] Figures 1A to 1F are sectional views and diagrams, which are used to explain the experiments and results performed by the inventors. Figures 2A to 2D are sectional views and diagrams, and are used to explain the experiments conducted by the inventor and the results thereof. Figures 3A and 3B are tables and diagrams showing conditions and results of other experiments performed by the present invention. Figures 4A and 4B are tables and charts showing conditions and results of other experiments performed by the inventors. '' FIGS. 5A to 5D are cross-sectional views of a semiconductor substrate, and are used to explain a method of manufacturing a semiconductor device according to an embodiment of the present invention. Figures 6A and 6B are tables and graphs showing conditions and results of other experiments performed by the present inventors. 10 Figures 7A, 7B, and 7C are cross-sectional views that schematically show the structure of a remote plasma nitriding device, a decoupled RF nitrogen plasma device, and the structure of a high-K gate insulation layer. [Representative symbol table of main elements of the figure] 1 ... broken substrate 6 ... gate 2 ... groove 7 ... extended area 3 ... element separation area 7p, 7n ... extended area 4 ... active area 8 ... Side wall spacer 4η ··· η-type solution 9… source / ί and region 4ρ ··· ρ-type well 9η, 9ρ ... source / non-region 5 ... gate oxide film 11,12 ... gate insulation film 5x, 5y, llx, 12x ... Nitrided oxide stone film lly ... Gate insulating film 6 ... Gate 12y ... Gate insulating film 5y ... Gate insulating film Ig ... Gate leakage current 5z ... Gate insulating film S1 -S10 ... Sample 24 200425300

Vg…閘電壓 Gm…變換電導Vg ... gate voltage Gm ... transformed conductance

Vth...閾值 25Vth ... threshold 25

Claims (1)

200425300 拾、申請專利範圍: 1. 一種半導體裝置之製造方法,包含有: 閘絕緣層形成工程,係在半導體基板之活性區域 上,形成閘絕緣層; 5 氮導入工程,係藉由活性氮從上述閘絕緣層表面側 導入氮;及 退火處理工程,係在前述半導體基板施行NO氣體 氛圍氣中之退火處理。 2. 如申請專利範圍第1項所述之半導體裝置之製造方法, 10 其中: 前述活性氮,係由自由基氮或電漿所產生的氮。 3. 如申請專利範圍第1項所述之半導體裝置之製造方法, 其更包含: 退火處理施行工程,係在前述NO氛圍氣中施行退 15 火處理之後,在更高溫之不活性氣體中施行退火處理。 4. 如申請專利範圍第1項所述之半導體裝置之製造方法, 其中: 在前述NO氣體氛圍氣中之退火處理下之閘絕緣膜 之膜厚增加為〇.2nm以下。 20 5.如申請專利範圍第1項所述之半導體裝置之製造方法, 其中: 在前述NO氣體氛圍氣中之退火處理,係在比氮導 入工程中之基板溫度更高溫之NO氣體氛圍氣中進行, 該氮係藉活氮來導入。 26 200425300 6. 如申請專利範圍第1項所述之半導體裝置之製造方法, 其中: 在前述NO氣體氛圍氣中之退火處理,係在由不活 性氣體所稀釋之NO氣體氛圍氣中進行,該不活性氣體 5 包含有N2、Ar、He之任一。 7. 如申請專利範圍第1項所述之半導體裝置之製造方法, 其更包含: 退火施行工程,係在前述NO氣體氛圍氣中之退火 處理前,在氧氛圍氣中或由不活性氣體所稀釋的氧氛圍 10 氣中施行退火。 8. 如申請專利範圍第1項所述之半導體裝置之製造方法, 其中: 形成在前述活性區域上之閘絕緣層,係將前述半導 體基板表面熱氧化來形成的絕緣層,厚度為1.5nm以下。 15 9.如申請專利範圍第1項所述之半導體裝置之製造方法, 其中: 前述閘絕緣層,係在與前述半導體基板之界面含有 3at%以下之微量氮的氧氮化層。 10. 如申請專利範圍第1項所述之半導體裝置之製造方法, 20 其中: 在前述NO氣體氛圍氣中施行退火處理後的氮濃度 為5at%以下,此氮濃度為在該閘絕緣層之半導體基板與 界面之濃度。 11. 如申請專利範圍第1項所述之半導體裝置之製造方法, 27 200425300 其更包含: 自然氧化膜除去工程,係在前述半導體基板表面之 熱氧化工程前,在還原性氛圍氣中將半導體基板加以退 火處理,以除去自然氧化膜。 5 12.如申請專利範圍第1項所述之半導體裝置之製造方法, 其中: 在前述半導體基板之活性區域上形成閘絕緣層之 工程,係依區域而形成厚度不同之絕緣層。 10 28200425300 Scope of patent application: 1. A method for manufacturing a semiconductor device, including: a gate insulating layer forming process, which forms a gate insulating layer on the active area of a semiconductor substrate; 5 a nitrogen introduction project, which uses active nitrogen to Nitrogen is introduced on the surface side of the gate insulation layer; and the annealing process is an annealing process in a NO gas atmosphere on the semiconductor substrate. 2. The method for manufacturing a semiconductor device as described in item 1 of the scope of the patent application, 10 wherein: the aforementioned active nitrogen is nitrogen generated by radical nitrogen or plasma. 3. The method for manufacturing a semiconductor device as described in item 1 of the scope of the patent application, further comprising: an annealing treatment execution process, which is performed in a higher temperature inactive gas after the annealing treatment is performed in the aforementioned NO atmosphere. Annealed. 4. The method for manufacturing a semiconductor device according to item 1 of the scope of patent application, wherein: the film thickness of the gate insulating film under the annealing treatment in the aforementioned NO gas atmosphere is increased to 0.2 nm or less. 20 5. The method for manufacturing a semiconductor device according to item 1 of the scope of patent application, wherein: the annealing treatment in the aforementioned NO gas atmosphere is performed in a NO gas atmosphere at a higher temperature than the substrate temperature in the nitrogen introduction process. Go ahead, this nitrogen is introduced by active nitrogen. 26 200425300 6. The method for manufacturing a semiconductor device as described in item 1 of the scope of patent application, wherein: the annealing treatment in the aforementioned NO gas atmosphere is performed in a NO gas atmosphere diluted with an inert gas, the The inert gas 5 includes any of N2, Ar, and He. 7. The method for manufacturing a semiconductor device as described in item 1 of the scope of the patent application, further comprising: an annealing process, before the annealing treatment in the aforementioned NO gas atmosphere, in an oxygen atmosphere or by an inert gas. Annealing was performed in a diluted oxygen atmosphere of 10 ° C. 8. The method for manufacturing a semiconductor device according to item 1 of the scope of patent application, wherein: the gate insulating layer formed on the aforementioned active region is an insulating layer formed by thermally oxidizing the surface of the aforementioned semiconductor substrate, and has a thickness of 1.5 nm or less . 15 9. The method for manufacturing a semiconductor device according to item 1 of the scope of patent application, wherein: the gate insulating layer is an oxynitride layer containing a trace amount of nitrogen of 3 at% or less at the interface with the semiconductor substrate. 10. The method for manufacturing a semiconductor device as described in item 1 of the scope of the patent application, 20 wherein: the nitrogen concentration after the annealing treatment in the aforementioned NO gas atmosphere is 5 at% or less, and the nitrogen concentration is equal to that of the gate insulation layer. Semiconductor substrate and interface concentration. 11. The method for manufacturing a semiconductor device as described in item 1 of the scope of patent application, 27 200425300, which further includes: a natural oxide film removal process, which is performed before the semiconductor substrate surface thermal oxidation process in a reducing atmosphere. The substrate is annealed to remove the natural oxide film. 5 12. The method for manufacturing a semiconductor device according to item 1 of the scope of patent application, wherein: the project of forming a gate insulating layer on the active region of the aforementioned semiconductor substrate is to form insulating layers with different thicknesses depending on the region. 10 28
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Publication number Priority date Publication date Assignee Title
US11189500B2 (en) 2018-11-20 2021-11-30 AT&S (Chongqing) Company Limited Method of manufacturing a component carrier with an embedded cluster and the component carrier

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11189500B2 (en) 2018-11-20 2021-11-30 AT&S (Chongqing) Company Limited Method of manufacturing a component carrier with an embedded cluster and the component carrier

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