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TW200413740A - Adapter for testing one or more conductor assemblies - Google Patents

Adapter for testing one or more conductor assemblies Download PDF

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Publication number
TW200413740A
TW200413740A TW092132186A TW92132186A TW200413740A TW 200413740 A TW200413740 A TW 200413740A TW 092132186 A TW092132186 A TW 092132186A TW 92132186 A TW92132186 A TW 92132186A TW 200413740 A TW200413740 A TW 200413740A
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TW
Taiwan
Prior art keywords
adapter
contact
conductor
item
patent application
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TW092132186A
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Chinese (zh)
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TWI234002B (en
Inventor
Manfred Prokopp
Viktor Romanov
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Atg Test Systems Gmbh
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Publication of TWI234002B publication Critical patent/TWI234002B/en

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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2801Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
    • G01R31/2806Apparatus therefor, e.g. test stations, drivers, analysers, conveyors
    • G01R31/2808Holding, conveying or contacting devices, e.g. test adapters, edge connectors, extender boards
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/04Housings; Supporting members; Arrangements of terminals
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2801Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
    • G01R31/2805Bare printed circuit boards

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
  • Measuring Leads Or Probes (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

The invention relates to an adapter for testing a conductor assembly, in particular for testing a chip carrier. Such a conductor assembly has on one side contact elements which are note arranged with a high density and have a minimum spacing of e.g. 0.5 mm. The adapter has one more contact fields each with one set of contact elements, wherein with the contact elements of the contact field in each case one conductor assembly may be contacted at the contact points which are not very densely arranged. Each of the contact of this or another contact field, so that the conductor paths of two conductor assemblies are electrically connected to one another and may be tested simultaneously.

Description

200413740 玖、發明說明: 【發明所屬之技術領域】 本發明係關於一用於測試一或多個導體組件之轉接 裔。尤其本發明係關於一用於測試電路板及其他大致呈板 狀非元件式之導體組件的轉接器。上述具有一晶片側之導 體組件(如晶片載體)係具有數個接觸點以連接至一積體電 路,且該導體組件上之一連接侧具有較大的接觸點以連接 至另外的導體組件。此等該連接側上的接觸點可以規律的 格狀作配置。 【先前技術】 已知用於測試非元件式之電路板裝置原則上可劃分 為兩個群組。第一個群組包括具有數個轉接器的裝置,稱 之為平行測試器(parallel testers),其中一電路板的所有接 觸點可使用一轉接器同步作接觸。第二個群組包括該稱為 指狀測試器(finger testers)。此等裝置可連續以兩個或更多 的測試指狀物檢閱各個接觸點。 該等具有轉接器之測試器係揭示於下列專利案中,例 如:DE 42 37 591 Al、DE 44 06 538 Al、DE 43 23 276 A、 EP215 146B1 以及 DE3838413A1。 上述該等轉接器基本上係用於匹配具有不對稱配置 之接觸點以及欲至該電子測試器之預設基本格子進行測試 的電路板。在測試現今的電路板時,該等接觸點不再配置 成相同的格子狀,因此該轉接器中於該接觸格子及該接觸 3 200413740 點之 其亦 同的 器也 路徑 測試 試。 測試 測試 重導 個量 板的 響, 形成 的電 號專 一電 路, 計算 納0 間進行連接的該等接觸針係配置成一傾斜或偏斜狀, 有可能配置一所謂的轉譯器(translat〇r),用以將該相 接觸格子「轉譯」成不對稱配置的接觸點。此等轉接 因而稱作袼子匹配轉接器。 不論裝置的種類為何,非元件式之電路板的各個導體 都會進行該等導體路徑(開路電路測試)中的電路中斷 以及至其他導體路徑(短路電路測試)的電性連接測 該短路測試可包括低阻抗及高阻抗連接的檢測。 不同的量測技術已熟知於開路電路測試及短路電路 中。此包含測試每一導體路徑以檢視是否短路以及為 每一導體路徑的分支以檢視電路是否中斷,故對具多 體路徑的現今電路板而言,必須執行相應高數目的各 測操作。 由歐洲EP 0 5〇8 062 B1之專利案中已知一測試電路 方法中,欲測試之電路板係受到一非均勻電場的影 以及由於一量測探針於一接觸點接通該非均勻電場所 之電位,且該電位係連同/或以一參考值與其他測試點 位作比較。此方法係描述電場量測。 此電場量測之進一步改良係描述於EP 〇 772 〇54 A2 利案中。於此電場量測的進一步改良中,於測試一第 路板中,該各個導體路徑係藉電場量測以測試是否短 並藉電阻量測以檢視電路是否中斷。由所得的量測值 導納(admittances)以作為測試另一電路板的參考導 藉由利用此等參考導納來測試另一電路板,將可藉由 200413740 電%里測來測试各個導體路徑是否短路及電路中斷。 美國專利案US 5,268,645及US 5,903,16〇(其係分別 對應歐洲專利案EP 〇 508 062 B1及EP 〇 772 〇54 A2),該 等專利案之揭示内容係合併於本申請案以作為參考。 德國專利案DE 1 97 00 505 A1係揭示一用以測試電 路板之方法,其中一電路板的許多電源網路以及/或接地網 路係呈短路,且具有高測試電壓的信號網路係對照此等網 路的結合以測試是否短路。此包含首先施予該等結合網路 一高電位’並接著對照此結合測試各個信號網路。藉由此 方式將可明顯減少測試的數量,由於該等信號網路不需對 母一電源及/或接地網路作測試’故會因包含高電壓而非 常節省時間。 於該所謂晶片載體的測試中,該測試裝置需具有特別 需求。晶片載體一側有小的電路板或導體組件,該晶片側 及該等接觸點可不需罩體而直接與一或多個積體電路連 接,且藉由結合而電性連接至該晶片載體的接觸點。於該 晶片側之每一該等接觸點係藉導體路徑而電性連接至該晶 片載體與該連接側之相對側上的接觸點。該晶片載體可為 三維結構(參照US 5,006,093號專利案)。 於該晶片側之該等接觸點一般較小且彼此配置緊 密。以技術名詞來說稱為「高強度(high-pitch)」。在該連 接側上之該等接觸點通常較多且一般係配置呈格子狀。一 般係呈球閘陣列(ball grid array,BGA)狀之格子。上述晶片 載體係示範性描述於 MC2M㊣BGA Type Multi-Chip 200413740200413740 (1) Description of the invention: [Technical field to which the invention belongs] The present invention relates to an adapter for testing one or more conductor components. In particular, the present invention relates to an adapter for testing circuit boards and other generally plate-like non-element-type conductor assemblies. The above-mentioned conductor assembly having a chip side (such as a wafer carrier) has a plurality of contact points to be connected to an integrated circuit, and one connection side of the conductor assembly has a larger contact point to be connected to another conductor assembly. These contact points on the connection side can be arranged in a regular grid pattern. [Prior art] Known circuit board devices for testing non-components can be divided into two groups in principle. The first group includes devices with several adapters, called parallel testers, in which all contacts of a circuit board can be contacted simultaneously using one adapter. The second group includes what are called finger testers. These devices can continuously review each contact point with two or more test fingers. These testers with adapters are disclosed in the following patents, for example: DE 42 37 591 Al, DE 44 06 538 Al, DE 43 23 276 A, EP215 146B1 and DE3838413A1. The above-mentioned adapters are basically used to match circuit boards with asymmetrical contact points and to the preset basic grid of the electronic tester for testing. When testing today's circuit boards, the contact points are no longer configured in the same grid shape, so the adapter in the contact grid and the contact 3 200413740 points are also tested by different paths. The test is to test the sound of the measuring board, to form a special electric circuit, and to calculate the contact pins connected between 0 and 0 are arranged in an inclined or skewed shape. It is possible to configure a so-called translator (translator). To "translate" the contact grid into asymmetrically arranged contact points. These transfers are thus called mule-matching adapters. Regardless of the type of device, each conductor of a non-component circuit board will perform circuit interruptions in these conductor paths (open circuit test) and electrical connection tests to other conductor paths (short circuit test). Detection of low impedance and high impedance connections. Different measurement techniques are well known in open circuit testing and short circuiting. This involves testing each conductor path to see if it is shorted and branching each conductor path to see if the circuit is interrupted, so for today's circuit boards with multiple body paths, a correspondingly high number of test operations must be performed. A test circuit method is known from the European patent EP 0 508 062 B1. The circuit board to be tested is affected by a non-uniform electric field and because a measuring probe is connected to the non-uniform electricity at a contact point. The potential of the site, and this potential is compared with other test points with / or with a reference value. This method describes the electric field measurement. A further improvement of this electric field measurement is described in the EP 0 772 054 A2 case. In a further improvement of this electric field measurement, in testing a first circuit board, each conductor path is measured by an electric field measurement to test whether it is short and a resistance measurement is used to check whether a circuit is interrupted. Admittances obtained from the measured values are used as a reference guide for testing another circuit board. By using these reference admittances to test another circuit board, each conductor can be tested by 200413740 electrical% measurement. Whether the path is short-circuited and the circuit is interrupted. US patents US 5,268,645 and US 5,903,160 (which correspond to European patents EP 0 508 062 B1 and EP 0 772 054 A2, respectively), the disclosures of these patents are incorporated herein by reference. The German patent case DE 1 97 00 505 A1 discloses a method for testing a circuit board, in which many power networks and / or ground networks of a circuit board are short-circuited and a signal network with a high test voltage is compared. These networks are combined to test for short circuits. This involves first applying a high potential to the bond networks and then testing the various signal networks against the bond. In this way, the number of tests can be significantly reduced. Since these signal networks do not need to test the mother-power and / or ground networks, it will often save time due to the inclusion of high voltages. In the so-called wafer carrier test, the test device needs to have special requirements. There is a small circuit board or conductor component on one side of the chip carrier, and the chip side and the contact points can be directly connected to one or more integrated circuits without a cover, and electrically connected to the chip carrier by bonding. Contact point. Each of these contact points on the chip side is electrically connected to a contact point on the opposite side of the wafer carrier and the connection side by a conductor path. The wafer carrier may have a three-dimensional structure (refer to US Pat. No. 5,006,093). The contact points on the wafer side are generally small and closely arranged with each other. In technical terms, it is called "high-pitch". The contact points on the connection side are usually many and are generally arranged in a grid pattern. It is generally a grid in the shape of a ball grid array (BGA). The above chip carrier is exemplarily described in MC2M㊣BGA Type Multi-Chip 200413740

Modules之文中。此篇可由網址w w w · v a 11 r ο n i c . c h取得。該 等晶片載體係進一步揭示於美國專利案US 5,066,963中。Modules article. This article can be obtained from the website w w w · v a 11 r ο n i c. C h. Such wafer carriers are further disclosed in U.S. Patent No. 5,066,963.

前述該晶片載體之晶片側上的該些接觸點係經適當 建置且彼此緊靠,故無法與普通轉接器接觸。且該等晶片 載體係大批量生產的,因此無法以一平行測試器去測試該 等晶片載體。若以傳統的指狀測試器來測試,雖然該晶片 側之該等接觸點亦可作接觸,但由於連續檢閱測試該晶片 載體的所有接觸點需耗費大量時間,故不符合經濟效益。 因此,為測試該等晶片載體,業界已著手發展可接觸該連 接側的特殊測試裝置,以及一具有數個接觸元件之轉接 器,且該等接觸元件係經配置以與該連接側上該晶片載體 的接觸點相對應。通常轉接器之該些接觸元件係以預定格 狀進行配置,尤其係以BGA型式的格狀。另一方面,該晶 片載體的晶片側係藉大量橫越的接觸指來作連接。該等用 於測試晶片載體的裝置因此可結合平行/指狀測試器。利用 此裝置,便可以相當高的處理量來測試該等晶片载體。然 而此等特別的裝置非常昂貴,因此不但需提供適合一平行 測試器之電子評估單元,也需提供適合一指狀測試器之電 子評估單元,同時該測試裝置可用於各種特殊的導體組 件,亦即該些晶片載體。 由美國 US 2001/0 1 3783 A1之專利案中已知一用以 測試非元件式之電路板的裝置,此裝置即所謂的探針段, 其對一具有多個探針之轉接器而言是可比較的,欲進行測 試之一電路板係置於此探針段上,該欲作測試之電路板上 6 200413740 设有一絕緣薄贈 該該絕緣薄 試點。該探 評估早元, 成之該單元 一用以測試 有電子元件 有一針床 §式之板β含 列作接觸, 並進行該各 述之該結合The aforementioned contact points on the wafer side of the wafer carrier have been properly constructed and are in close contact with each other, so they cannot be contacted with ordinary adapters. And the wafer carriers are produced in large quantities, so it is impossible to test the wafer carriers with a parallel tester. If a conventional finger tester is used for testing, although the contact points on the wafer side can also be contacted, it is not economical because continuous inspection and testing of all contact points of the wafer carrier take a lot of time. Therefore, in order to test the chip carriers, the industry has started to develop a special test device that can contact the connection side, and an adapter with several contact elements, and the contact elements are configured to communicate with the connection side on the connection side. The contact points of the wafer carrier correspond. Usually, the contact elements of the adapter are arranged in a predetermined grid, especially in a grid of the BGA type. On the other hand, the wafer side of the wafer carrier is connected by a large number of traversed contact fingers. These devices for testing wafer carriers can therefore incorporate parallel / finger testers. With this device, the wafer carriers can be tested with a relatively high throughput. However, these special devices are very expensive, so it is not only necessary to provide an electronic evaluation unit suitable for a parallel tester, but also an electronic evaluation unit suitable for a finger tester. At the same time, the test device can be used for various special conductor components. These wafer carriers. A device for testing non-component circuit boards is known from the US patent application US 2001/0 1 3783 A1. This device is a so-called probe section, which is for an adapter with multiple probes. The language is comparable. One of the circuit boards to be tested is placed on this probe section. The circuit board to be tested is provided with an insulation film as a test point. The probe evaluates the early element, and the unit is used for testing. There are electronic components. There is a needle bed. The plate β is included as a contact, and the combination of the various descriptions is performed.

、,該等測試頭之探針尖 膜上,該絕緣了大绕係在 &緣4膜可移除以接觸各個 針段之該等摈紅 逼路板測 寸咏針係經由轉換裝置連接 再由該探針段、“ W至-電子 轉換電子元件以及評彳士 一 形成一平行^器。 Μ早_ 由德國 44 1 7 5 8〇 C2 電子電路板的裝置“… 案中已知 衣置。此測试裝詈孫 之電路板。U 装置係用以測試具 此處所述之該測試 〇-d-〇f-nails)型式之轉接器,於其上 :、 有該等雷早_ /、 置有欲測 凡件之該板的上表面係以一 該感應陣列1古_ 琢應陣 個带工_ 有—可於該板上移動之接觸針。 70件的功能測試,其係類似於 之平行/指狀測試器。 射田 已知一用於電路 之接觸區域具有 由德國DE 3 8 3 8 4 1 3 Α1之專利案中 板之轉接器或一電子測試器,該電路板上 以一導電性彈簧體製成的墊狀插塞。On the probe tip film of these test heads, the insulation is wound around the & edge 4 film which can be removed to contact each needle segment. The red and red circuit board measuring pins are connected via a conversion device. Then, a parallel device is formed by the probe section, "W-to-electronic conversion electronic components and the reviewer. Μ 早 _ by the German 44 1 7 5 8OC2 electronic circuit board device" ... known in the case Home. This test fits Sun's circuit board. The U device is used to test the adapters with the type of test described here (0-d-〇f-nails). On it: The upper surface of the board is a contact pin that can be moved on the board. A functional test of 70 pieces, which is similar to a parallel / finger tester. Shetian has known that a contact area for a circuit has an adapter or an electronic tester from the German patent DE 3 8 3 8 4 1 3 A1, which is made of a conductive spring body Cushion plug.

歐洲專利案ΕΡ 0 772 054 Α2係關於一用於連接一指 狀測试器的方法,但轉接器的用途並未揭示於此文中。 本發明係以前述問題為基礎,利用一習知測試裝置以 及非疋件式之導體組件(為晶片載體或類似晶片载體)以提 供一簡易、測試成本低且快速的測試方法。 前述所提之該等問題可藉申請專利範圍第1項所述 之一轉接器來解決,其他優點將於該等附屬項中提出。 7 200413740 【發明内容】 依據本發明之一轉接器係用於測試一或多個具有數 個導體路徑於一指狀測試器中之導體組件,其中該導體組 件之一側設有數個接觸點,其與最近之鄰近接觸點相距至 少一預定距離,以便此側之該導體組件可藉由一轉接器進 行接觸,該轉接器至少包含:European patent case EP 0 772 054 A2 relates to a method for connecting a finger tester, but the purpose of the adapter is not disclosed here. The present invention is based on the foregoing problems, and uses a conventional test device and a non-component-type conductor assembly (for a wafer carrier or a similar wafer carrier) to provide a simple, low-cost and fast test method. These problems mentioned above can be solved by one of the adapters described in item 1 of the scope of patent application, and other advantages will be raised in these subsidiary items. 7 200413740 [Summary of the invention] An adapter according to the present invention is used for testing one or more conductor assemblies having a plurality of conductor paths in a finger tester, wherein one side of the conductor assembly is provided with a plurality of contact points. , Which is at least a predetermined distance from the nearest neighboring contact point, so that the conductor component on this side can be contacted by an adapter, which at least includes:

至少一接觸區與一組接觸元件,其中該接觸區之該等 接觸元件係配置成一佈局,而與該導體組件之該等接觸點 相對應,其中該接觸區之每一該等接觸元件係以一方式電 性連接至另一接觸元件,而該方式係指將該導體組件/組件 群之導體路徑結合以形成一測試網路,該測試網路於該導 體組件/組件群之該側或該等側上具有一或多個未與該轉 接器接觸之接觸點。At least one contact region and a group of contact elements, wherein the contact elements of the contact region are arranged in a layout corresponding to the contact points of the conductor assembly, wherein each of the contact elements of the contact region is A method is electrically connected to another contact element, and the method refers to combining the conductor paths of the conductor component / component group to form a test network, the test network being on the side of the conductor component / component group or the There are one or more contact points on the equal side that are not in contact with the adapter.

本發明因而創作一轉接器,其可用於接觸於一側上之 導體組件,其中該等導體組件之該等導體路徑係電性連接 至此或另一導體組件之一或多個導體路徑。該等測試網路 因而於該導體組件(其非以該轉接器作接觸)之該側上形成 至少一接觸點,以讓此等測試網路可藉一指狀測試器之測 試指作接觸。所有欲作測試之導體路徑皆為無法以該轉接 器進行接觸之該導體組件的該側上可接觸測試網路的一部 份。 此轉接器系統以及一或多個導體組件可固設於一指 狀測試器中,且該等測試網路可被檢閱。由於經由該轉接 器,許多導體路徑可結合成數個測試網路,各個測量操作 8 200413740 _"同v ’則忒數條導體路徑,也就是說,與習知指狀測試 态中的測試相較下,在測試速率上有相當大的提昇。 羽 雖然轉接器本身並不直接連接至電子評估單元,但在 :知平行測試器時,它可以簡易且成本低的方式製造。若 為導體組件的接觸點是以—預定的標準格子作配置時特別 :用。對上述導體組件而言,在某些情況下甚至可用於標 化的轉接器’而不必特別為某些導體組件作設計。 ^ 據本^明之一較佳實施例,該導體組件/組件群之 =體路徑係經由轉接器作電性連接,㈣試網路於該導體 :件/組件群之該側或該等側上具有至少兩個未與該轉接 矣觸之接觸點。在一測試網路中供應至少兩個接觸點可 上:以一電阻量測的方式進行測試網路的開路測試。由於 寺夕導體組件的製造商認為在高阻抗電路中斷的情況下電 :量測是最可靠的方式,因此會要求該些導體組件的導體 侵能以-電阻量測的方式進行電路中斷測試。 轉接器若以上述方式唣<,+ ,. ^ t 上江万式叹计,在一指狀測試器中該導體 /之料導體路徑將可快速且容易的利用電阻量測進行 路中斷測試。在此處並非指該等轉接器本身連接至該電 子評估m是該等測試指1此依據本發明之轉接器 可以較低成本去製造並延伸指狀測試器的使用領域,也因 為大幅降低測試時間,相舫认甘_ ^ 1相較於某些具有平行測試器或特定 設計之測試裝置的導體組件而古 00 抑 σ使用5亥專具有指狀測試 裔之接器來進行測試是較經濟的方式。 依據本發明之轉接器亦允許兩側具有接觸點之導體 9 200413740 組件以其單邊的指狀測試器來作測試。因此依據 轉接器,習知單邊指狀測試器的應用範圍可擴大 有接觸點的導體組件。使用本發明之轉接器,不 件之導體路徑可電性連接至一單一測試網路。本 接器亦可於一轉接器上提供數個導體組件,其中 體組件之導體路徑可經由該轉接器彼此連接,而 組件之導體路徑亦可藉該轉接器作連接以形成 路。 本發明之 至兩邊具 同導體組 發明之轉 一單一導 不同導體 一測試網The invention thus creates an adapter that can be used to contact a conductor assembly on one side, where the conductor paths of the conductor assemblies are electrically connected to one or more conductor paths of this or another conductor assembly. The test networks thus form at least one contact point on the side of the conductor assembly (which is not in contact with the adapter), so that the test networks can be contacted by the test fingers of a finger tester . All conductor paths to be tested are part of the accessible test network on the side of the conductor assembly that cannot be accessed with the adapter. The adapter system and one or more conductor assemblies can be fixed in a finger tester, and the test networks can be inspected. As a result of this adapter, many conductor paths can be combined into several test networks. Each measurement operation 8 200413740 _ " Same as v ', there are several conductor paths, that is, the test phase in the conventional finger test state. Below, there is a considerable increase in test rate. Yu Although the adapter itself is not directly connected to the electronic evaluation unit, it can be manufactured in a simple and cost-effective manner when the parallel tester is known. It is especially useful when the contact points of the conductor assembly are arranged in a predetermined standard grid. For the above-mentioned conductor assemblies, in some cases it can even be used as a standard adapter 'without having to specifically design certain conductor assemblies. ^ According to a preferred embodiment of the present invention, the body path of the conductor component / component group is electrically connected through an adapter, and the test network is on the side or the side of the conductor: component / component group. There are at least two contact points that are not in contact with the adapter. It is possible to supply at least two contact points in a test network: perform an open circuit test of the test network by a resistance measurement method. Since the manufacturer of Sixi Conductor Assembly believes that electrical measurement is the most reliable method in the event of a high impedance circuit interruption, the conductor invasion of these conductor assemblies will be required to perform a circuit interruption test by means of resistance measurement. If the adapter is in the above-mentioned way, <, + ,. ^ t Shangjiang million type sigh meter, the conductor / material conductor path in a finger tester can quickly and easily use the resistance measurement to interrupt the path test. This does not mean that the adapters themselves are connected to the electronic evaluation. M is the test finger.1 The adapter according to the present invention can be manufactured at a lower cost and extend the field of use of the finger tester. Reduce the test time. ^ ^ 1 Compared with some conductor components with parallel testers or specific design test devices, the ancient 00 and σ use a connector with a finger tester to test. More economical way. The adapter according to the invention also allows conductors with contact points on both sides. 9 200413740 The component is tested with a single-sided finger tester. Therefore, according to the adapter, the application range of the conventional single-sided finger tester can expand the conductor assembly with contact points. With the adapter of the present invention, the different conductor paths can be electrically connected to a single test network. The connector can also provide several conductor components on an adapter, wherein the conductor paths of the body components can be connected to each other through the adapter, and the conductor paths of the components can also be connected by the adapter to form a circuit. The present invention has the same conductor set on both sides, a revolution of the invention, a single conductor, a different conductor, and a test net.

較佳而s,許多導體路徑亦可藉該轉接器4 接以形成幾個測試網路,較理想者係僅形成負 路。這裡很容易會想到所謂的鄰近屏蔽準男 Adjacency Criterion),亦即,由於導體組件中$ 瓜的位置不會與相關測試網路的導體路徑形成; 非此測試網路之一部份的導體路徑是配置在它i 者對該導體組件中另一位置形成的邊界層,因^ 路徑會藉轉接器彼此連接,而將該等導體路徑; 測試網路可減少一些測試短路的量測操作。 提供最少數目的測試網路亦容許高測試1 而不會造成時間上的損失,同時也因為測試網$ 目’僅需進行幾次即可讓電M增加。此原理 專利案1 97 00 5…,其全文係合併於: -測二特.別使用電場量測的方法’該等測試網^ Ml 路的Μ ’且若可得到適合的4 匕們甚至可用於測試電路中斷。 ^ 此電性連 個測試網 (Shielded 些導體路 路,既然 之間,或 僅有導體 繫至一些 壓的使用 的限制數 述於德國 作參考。 可以一單 考導納,Preferably, many conductor paths can also be connected by the adapter 4 to form several test networks. Ideally, only a negative circuit is formed. It is easy to think of the so-called proximity shielding quasi-male Adjacency Criterion), that is, because the position of the $ melon in the conductor assembly will not form the conductor path of the relevant test network; conductor paths that are not part of this test network It is a boundary layer formed on the conductor assembly at another position. Because the paths are connected to each other by an adapter, the conductor paths are connected. The test network can reduce some measurement short-circuit measurement operations. Providing a minimum number of test networks also allows high test 1 without loss of time. At the same time, it only takes a few times for the test network to increase the electricity M. This principle patent case 1 97 00 5…, the full text of which is incorporated in:-Test two special. Do not use the method of electric field measurement 'the test network ^ Ml road M' and even if suitable 4 can be used The test circuit is interrupted. ^ This electrical connection is connected to a test network (Shielded some conductors, since the limit between the use of only some conductors to some voltages is described in Germany for reference. You can test the admittance one by one,

10 200413740 此等測試量測法可以已知的指狀測試器進行,且處该 量並不會比特別設計用於測試晶片載體的測試裝置低。在 用於電場量測時,處理量甚至會增加。 【實施方式】 依據本發明之一轉接器丨係用於測試四個晶片載體 2,如第3圖所示之概要透視圖。該轉接器具有一轉接器本 體3,於此實施例中其係—非導電性之塑膠薄板材料。於 該轉接器本體3中有數個通孔4,每一通孔皆可容納一接 觸針5。該等通孔係以兩陣列的方式作配置,每一陣列具 有1 Οχ 1 0個通孔數目。於任何情況下兩鄰近通孔4其中心 至中心的距離皆為〇 · 5 _丨mm。該等通孔4係按規律設置成 矩形格狀以與一球閘陣列(BGA)相對應。該等接觸針5之 兩端各具有一探針尖端6,7,為簡化圖式,示於第3圖中 之該等接觸針5係以某些方式凸出該通孔4。於一具體實 施例中,該等接觸針5之探針尖端6,7僅由該轉接器本體 3之上表面8或下表面9延伸出十分之一毫米。該等接觸 針5較佳係所謂以一彈簧元件製成之彈簧接觸#,以讓該 等接觸針5可以彈簧方式進行按壓。料接觸針較佳係在 其縱向中心區域上具有一抗摩擦劑(anti-friction agent), 以確保該等接觸針5不會由該通孔4掉出。 該轉接器本體3的兩表面8及9之每一區域中該等接 觸針5陣列之該等探針尖端6及7分別形成一接觸區} 7 及1 8以接觸一晶片載體2。 11 200413740 於本發明之—實施例中,上述之晶片載體2係為— 有晶片側1 〇及一連接相,1 7^ 、 具 接側11的小電路板(參照第1及 小的接觸腳 12ic〇ntart e h ® )° P ( 〇ntact pad)係形成於該晶片侧10之上10 200413740 These test measurements can be performed with a known finger tester and the amount is not lower than a test device specifically designed for testing wafer carriers. When used for electric field measurement, the throughput can even increase. [Embodiment] An adapter according to the present invention is used for testing four wafer carriers 2, as shown in a schematic perspective view of FIG. The adapter has an adapter body 3, which in this embodiment is a non-conductive plastic sheet material. There are several through holes 4 in the adapter body 3, and each through hole can receive a contact pin 5. The through-holes are arranged in two arrays, and each array has a number of 10 × 10 through-holes. In any case, the distance from the center to the center of the two adjacent through holes 4 is 0.5 mm. The through holes 4 are regularly arranged in a rectangular grid to correspond to a ball gate array (BGA). Each of the contact pins 5 has a probe tip 6, 7 at both ends. To simplify the drawing, the contact pins 5 shown in FIG. 3 protrude from the through hole 4 in some ways. In a specific embodiment, the probe tips 6, 7 of the contact pins 5 extend only one tenth of a millimeter from the upper surface 8 or the lower surface 9 of the adapter body 3. The contact pins 5 are preferably so-called spring contacts # made of a spring element, so that the contact pins 5 can be pressed in a spring manner. The material contact pin preferably has an anti-friction agent on its longitudinal center region to ensure that the contact pins 5 do not fall out of the through hole 4. The probe tips 6 and 7 of the array of contact pins 5 in each of the two surfaces 8 and 9 of the adapter body 3 respectively form a contact area} 7 and 1 8 to contact a wafer carrier 2. 11 200413740 In the embodiment of the present invention, the above-mentioned wafer carrier 2 is-a small circuit board with a wafer side 10 and a connection phase, 17 ^, and a connection side 11 (refer to the first and small contact pins) 12ic〇ntart eh ®) ° P (〇ntact pad) is formed on the wafer side 10

成-平面呈四個彎曲分段13的環形。此等接觸聊:形 於結合積體電路(未示出)。數個導體路徑14由此用 =的部分通到該導電孔15。料所有或至少接觸聊接= 藉導體路徑14連接至一導電孔15。於第q *圖中 僅簡化示出部分導體路& 14以便於說明。此等導電孔’ 係以球閘陣列的格狀形成在該晶片載體…且通常係15 該晶片側10延伸至該連接们i。於該連接侧U,該等由 電孔1 5每一者皆形成一接觸點i 6 ^該等導電孔^ 5係為導 徑(例如小於〇.lmm)之通孔,其皆以一導電性材料作完= 塗覆或填充。於該接觸點丨6之區域中,該導電性材料形成 一接觸腳1 2。該接觸點1 6之直徑明顯大於該晶片側1 〇上 之該接觸腳12的長度或寬度(例如約大於〇 5mm)。該等接 觸點1 6係以前述規則格狀(B G A格子)方式配置,因此與該 晶片側1 0之該等接觸腳1 2相比間隔較寬,故較易於與一 轉接器接觸。 因為在晶片侧上的接觸點密度較高,該些晶片载體一 般係以一多層電路板的方式形成。也因如此,上述型式之 晶片載體中該專導電孔並不總是延伸通過所有的晶片載 體。第1至4圖已以此態樣概要式作簡化。 該等晶片載體之一典型特徵係所有或至少的主要導 體路徑係由該晶片側導引至該連接側。於本發明之實施例 12 200413740 中,藉由這些導電孔可影響該該晶片側至該連接側的連 接。若非複雜晶片載體的情況下,該等導體路徑僅由該晶 片側上兩接觸點連接,不會導引至該連接側,故該等導體 路徑的數目較該些由晶片側導引至連接側者為少。The formation-plane has a ring shape of four curved sections 13. These contacts are shaped as integrated integrated circuits (not shown). A number of conductor paths 14 thus lead to the conductive hole 15 with a portion. All or at least contact = connect via a conductor path 14 to a conductive hole 15. In the q * figure, only a part of the conductor paths & 14 are shown for simplicity. These conductive holes' are formed on the wafer carrier in the form of a grid of a ball brake array ... and usually 15 the wafer side 10 extends to the connectors i. At the connection side U, each of the electrical holes 15 forms a contact point i 6 ^ The conductive holes ^ 5 are through holes with a conductive diameter (for example, less than 0.1 mm), which are all conductive Finishing of the material = coating or filling. In the area of the contact point 6, the conductive material forms a contact pin 12. The diameter of the contact point 16 is significantly larger than the length or width of the contact pin 12 on the wafer side 10 (for example, greater than about 0.5 mm). The contacts 16 are arranged in a regular grid (B G A grid) manner as described above, so they are wider than the contact pins 12 on the chip side 10, so they are easier to contact with an adapter. Because of the high density of contact points on the wafer side, these wafer carriers are generally formed as a multilayer circuit board. Because of this, the dedicated conductive hole in the wafer carrier of the above type does not always extend through all wafer carriers. Figures 1 to 4 have been simplified in this way. One typical feature of these wafer carriers is that all or at least the main conductor path is guided from the wafer side to the connection side. In the embodiment 12 200413740 of the present invention, the connection from the chip side to the connection side can be affected by the conductive holes. In the case of a non-complex wafer carrier, the conductor paths are only connected by the two contact points on the wafer side, and will not be guided to the connection side, so the number of these conductor paths is more guided than the wafer side to the connection side. Those are few.

為測試上述之晶片載體2,一晶片載體2係以其接觸 點16置於一組探針尖端6上,每一探針尖端形成一接觸區 1 7。將另一晶片載體2以其接觸點1 6置於該探針尖端7 上形成另一接觸區18。該接觸區17,18之探針尖端6,7係 經由該接觸針5彼此成對作電性連接,以讓兩晶片載體2 之接觸點1 6彼此成對作電性連接(如第4圖所示)。 於本發明之一實施例中,轉接器1上可固設兩對晶片 載體2,並以相對晶片載體2之接觸點1 6彼此成對作電性 連接。To test the wafer carrier 2 described above, a wafer carrier 2 is placed on a set of probe tips 6 with their contact points 16 and each probe tip forms a contact area 17. Another wafer carrier 2 with its contact points 16 is placed on the probe tip 7 to form another contact area 18. The probe tips 6, 7 of the contact areas 17, 18 are electrically connected in pairs with each other via the contact pins 5, so that the contact points 16 of the two wafer carriers 2 are electrically connected in pairs with each other (as shown in FIG. 4). As shown). In one embodiment of the present invention, two pairs of wafer carriers 2 may be fixed on the adapter 1 and electrically connected to each other at contact points 16 opposite to the wafer carrier 2.

為了進行測試,轉接器1及晶片載體2係設於一指狀 測試器20中(如第7圖所示)。上述一指狀測試器20具有 數個測試指2 1,每一測試指係集成一測試電極22。該等測 試電極2 2係連接至一電子評估單元。該等測試指21可於 該轉接器之上表面及下表面作平行移動,以讓該等電極可 藉該晶片載體2之接觸腳1 2作接觸。上述一指狀測試器具 有數個測試指2 1,在該轉接器1上可以例如八個測試指於 上方,八個測試指於下方的方式作配置,以讓該轉接器 1 兩側上的晶片載體2可作連接。每一測試指2 1係固定至一 滑座23,該滑座23可滑動於一平行該轉接器1表面之平 面上。每一該等滑座23具有一垂直校準作動汽缸24,該 13 200413740 等測試指2 1可藉由該作動汽缸24繞著該垂直軸旋轉。該 等測試指 2 1亦可結合一活動裝置以一正確角度移動於該 晶片載體2之表面,以讓該等接觸腳12可與該測試電極 22作接觸。For testing, the adapter 1 and the wafer carrier 2 are set in a finger tester 20 (as shown in Fig. 7). The aforementioned finger tester 20 has a plurality of test fingers 21, and each test finger is integrated with a test electrode 22. The test electrodes 22 are connected to an electronic evaluation unit. The test fingers 21 can be moved in parallel on the upper and lower surfaces of the adapter so that the electrodes can be contacted by the contact pins 12 of the wafer carrier 2. The above-mentioned finger tester has several test fingers 21, for example, eight test fingers can be arranged on the adapter 1 and the eight test fingers can be arranged on the adapter 1 so that the two sides of the adapter 1 are arranged on the adapter 1. The wafer carrier 2 can be connected. Each test finger 21 is fixed to a slider 23, and the slider 23 can slide on a plane parallel to the surface of the adapter 1. Each of these slides 23 has a vertically aligned actuating cylinder 24, and the test fingers 21, 13 and 14740 can be rotated by the actuating cylinder 24 about the vertical axis. The test fingers 21 can also be combined with a movable device to move on the surface of the wafer carrier 2 at a correct angle, so that the contact pins 12 can contact the test electrode 22.

藉該轉接器1該成對接觸點1 6之連接,例如該兩晶 片載體2之兩導體路徑25係彼此電性連接並與該連接器之 電性連接一起成形,本發明(第3及4圖)中該轉接器至少 包含該接觸針5與一測試網路之一者。每一情況下上述一 測試網路之該些端點係以一接觸腳1 2成形。由於該晶片載 體之該些導體路徑2 5並未分支,故上述一測試網路通常具 有兩端點。此兩端點及對應之接觸腳1 2可藉該等測試電極 22之一者作同步接觸。若藉由該測試電極22可將一量測 電流施與該測試網路以判定該測試網路之電阻,接著可由 此量測結果斷定兩晶片載體2之兩導體路徑2 5是否有電路 中斷,此相當於習知用以測試是否電路中斷之電阻量測 法。因此,藉由轉接器耦合兩晶片載體,在任何情況下將 可在兩晶片載體上以一單一量測去測試導體路徑 25是否 電路中斷。該轉接器本身並不連接至該電子評估單元,於 測試操作期間,該等測試網路僅經由該等測試指2 1連接至 該電子評估單元。 在以電阻量測測試短路時,任何情況下都可藉一測試 電極22接觸鄰近之測試網路,並量測兩鄰近測試網路間之 電阻,此處兩對導體路徑25係於同時間進行測試。 使用本發明之該轉接器1可於習知指狀測試器中測 14 200413740 試該等晶片載體,其中在一測試操作中至少兩晶片载體係 同步進行測試。該欲作測試之晶片載體的處理量可與先二 所述該具有轉接器及測試指之特殊測試裝置相匹配y仗2 本發明另-實施例之-轉接器係示於第5及6圖。& 器1具有其轉接器本體3,其係為一多層電路板。於 接器本體3之表面,除了前述之該等探 電性橡膠材質製成的接觸凸…亦可作為::導 此等接觸凸部26,27 一次形成兩接觸區17,18, 内之該等接觸凸部26 27 觸區 對應一欲作測試之晶K番 體2之接觸點16的陣列進行定位,以使每一接 接觸一接觸點16。於本發明之一罝 ° ,、體實施例中,兩接觸P 17,18之該等接觸凸點26,=觸^ 置。 Λ 對應BGA之矩陣作配 該接觸區1 7之該箄桩鎚1 Α 28連接至嗲u 觸凸# 26係經由電導體路徑 咬牧王”茨接觸區1 8之接網 數的矩陣。、甬… 凸部27,亦即相同行數及列 且古知m 父佳係在各接觸區1 7,1 8中 述該接觸區”,18成對接觸:件J如在第6圖左下角。上 以相同排列被置於該接觸區二:聯繫對兩相同晶片載體 晶片載體同類型的導體路徑上時有相當影響,該等 類型的導體路徑14係一起作:彼此電性連接。由於相同 之對靡垃雜 作,則試(亦即接觸該晶片載體2 <對應接觸腳12以執行一 測試演算法。 開路測試),故此將可大幅簡化 除了連接該等成對接觸 17,18之接觸元件的導體 15 200413740 路徑28外,該轉接器具有一或多個導體路徑29(如第6圖 所示)作為天線(aerial)29以用於該電場量測步驟中。該電 場量測步驟係詳述於歐洲專利案E P 5 0 8 0 6 2 B 1以及e p 7 7 2 0 5 4 A 2。為進行一非均勻電場量測一般係藉由天線 2 9,且在測試網路中所得的電位可接著由該測試指2 ^接 通。經由與另一測試網路及/或一參考值作比較,將可判定 該測試網路是否短路。此電場量測便可僅由涉及之測試網 路的量測試樣進行短路測試。By the connection of the pair of contact points 16 of the adapter 1, for example, the two conductor paths 25 of the two chip carriers 2 are electrically connected to each other and are formed together with the electrical connection of the connector. (4) The adapter includes at least one of the contact pin 5 and a test network. In each case, the endpoints of the test network described above are formed with a contact pin 12. Since the conductor paths 25 of the chip carrier are not branched, the above-mentioned test network usually has two ends. The two ends and the corresponding contact pins 12 can be synchronized with each other by one of the test electrodes 22. If a measurement current can be applied to the test network by the test electrode 22 to determine the resistance of the test network, and then the measurement result can be used to determine whether the two conductor paths 25 of the two chip carriers 2 have a circuit interruption. This is equivalent to the conventional resistance measurement method used to test whether the circuit is interrupted. Therefore, by coupling the two-chip carrier with the adapter, in any case, it will be possible to test the conductor path 25 on the two-chip carrier with a single measurement for a circuit interruption. The adapter itself is not connected to the electronic evaluation unit. During the test operation, the test networks are only connected to the electronic evaluation unit via the test fingers 21. When measuring a short circuit by resistance measurement, in any case, a test electrode 22 can be used to contact the adjacent test network and measure the resistance between two adjacent test networks. Here, two pairs of conductor paths 25 are performed at the same time test. The adaptor 1 using the present invention can be tested in a conventional finger tester. 14 200413740 These wafer carriers are tested, in which at least two wafer carriers are tested simultaneously in a test operation. The throughput of the wafer carrier to be tested can be matched with the special test device with an adapter and a test finger as described in the first two. 2 Another embodiment of the present invention-the adapter is shown in the 5th and 6 Figure. & The device 1 has its adapter body 3, which is a multilayer circuit board. On the surface of the connector body 3, in addition to the above-mentioned contact protrusions made of the above-mentioned electroconductive rubber material, it can also be used as: guiding these contact protrusions 26, 27 to form two contact areas 17, 18 at a time. The contact areas of the iso-convex protrusions 26 27 are positioned corresponding to an array of the contact points 16 of the crystal body 2 to be tested, so that each contact contacts a contact point 16. In one embodiment of the present invention, the contact bumps 26 of the two contacts P 17, 18 are equal to the contact position. Λ corresponds to the matrix of the BGA as the mating hammer 1 Α 28 of the contact area 17 is connected to the 嗲 u contact convex # 26 is a matrix of the number of nets in the contact area 18 of the "King Mumu Wang" via the electrical conductor path.甬 ... the convex part 27, that is, the same number of rows and columns, and the old known m father Jia described the contact area in each contact area 1, 7, 18 ", 18 pairs of contact: the piece J as in the lower left corner of Figure 6 . The upper part is placed in the contact area in the same arrangement. Two: The contact has a considerable influence on the same type of conductor path of the wafer carrier. The conductor paths 14 of these types are made together: they are electrically connected to each other. As the same pair of miscellaneous works, try (that is, contact the chip carrier 2 < corresponding contact pin 12 to perform a test algorithm. Open circuit test), so it will greatly simplify except to connect the pair of contacts 17, Conductor 15 of the contact element of 18 200400740 path 28, the adapter has one or more conductor paths 29 (as shown in FIG. 6) as antennas 29 for the electric field measurement step. The electric field measurement procedure is described in detail in European patent cases EP 5 0 0 6 2 B 1 and EP 7 7 2 0 5 4 A 2. To perform a non-uniform electric field measurement, an antenna 29 is generally used, and the potential obtained in the test network can then be connected by the test finger 2 ^. By comparison with another test network and / or a reference value, it can be determined whether the test network is shorted. This electric field measurement can be used for short-circuit testing only with the test samples of the test network involved.

若可利用各個測試網路的通道作為參考,在符合依携 歐洲專利EP〇 772 054 A2之方法下,僅以所需測試網禅 中的單一測試樣品亦可藉此電場量測方法來判定是否電辟 中斷。 •吻寻啊成網路包含兩晶片載體2 至少兩導體路徑,便可以一留 θ 早一置測同步測試至少兩導 路徑。也由於電場量測士 4 ^ 、J方法僅扁一單一測試網路去測詞 路疋否中斷及/或短路, 亦了母一測試樣品同步測試多 導體路徑。此表示欲測曰If the channels of each test network can be used as a reference, in accordance with the method of conforming to the European patent EP 0772 054 A2, only a single test sample in the required test network can also be used to determine whether the electric field measurement method is used. Power interruption. • Kissing and finding a network containing two chip carriers 2 and at least two conductor paths, one can leave θ and test at least two conductor paths simultaneously. Because the electric field measurement method 4 ^, J method only uses a single test network to test whether the circuit is interrupted and / or short-circuited, and the mother-test sample simultaneously tests multiple conductor paths. This means to test

測1曰Η # μ # ]忒曰日片载體2的處理量與習知用 /貝J 5式曰日片載體的特別梦 价祕义 1置相比有相當明顯的增加1。Measure 1 Η μ # μ #] The processing amount of 日 日 片 carrier 2 has a considerable increase compared to the special dream of the conventional / P5 Jie type dian tablet carrier1.

依據月II文本發明B '、實施例所描述之轉接,於拉 情況下,該等接觸區 吓彻玫之轉接姦於任 在晶片載體形成電路板時8的接觸元件係成對彼此連接 上提供數個晶片載體,1在生產的習慣上係於一電路 一電路板上提供五或^其即表示—所謂的應用,例如可 方便提供一轉接器1個這樣的應用。於這樣的情況下 母一應用係指定於一接觸區,且 16 200413740 個接觸區相對應之接觸元件係以前述方式彼此電性連接。 由於電路板製造商通常會要求作電阻量測以測試是否電路 中斷,在實務上該方法較佳會包含一電阻量測法以及一電 場量測法以測試電路是否中斷或短路。為測試電路是否中 斷,該些測試網路的所有端點必須至少接觸一次,而測試 短路時每一測試網路必須測試一次,以同步於各個應用上 或晶片載體上測試該些導體路徑多樣性的可能性。According to the transition described in the invention B ', the embodiment of the month II text, in the case of pull, these contact areas are scarcely connected to each other. When the chip carrier forms a circuit board, the contact elements of 8 are connected to each other in pairs. There are several wafer carriers provided on the board. 1 It is customary to provide five or ^ on a circuit board, which is the so-called application. For example, it is convenient to provide one adapter for such an application. In this case, the parent-application is designated in a contact area, and the contact elements corresponding to the 16 200413740 contact areas are electrically connected to each other in the aforementioned manner. Since circuit board manufacturers usually require resistance measurement to test whether the circuit is interrupted, in practice, this method preferably includes a resistance measurement method and an electric field measurement method to test whether the circuit is interrupted or shorted. In order to test whether the circuit is interrupted, all the endpoints of the test networks must be contacted at least once, and each test network must be tested once when the short circuit is tested, in order to test the diversity of the conductor paths simultaneously on various applications or on the chip carrier. Possibility.

第8圖係表示另一轉接器,與示於第5及6圖之轉接 器有類似設計。此轉接器1於一電路板上具有一轉接器本 體3。轉接器本體3之表面配置成接觸元件者係數個接觸 凸部3 0,其係以導電性橡膠材料製成。此等接觸凸部形成 一單一接觸區3 1,該等接觸凸部每一者係經定位以對應欲 測試晶片載體2之該等接觸點的配置,以使一接觸點1 6 於任何情況下接可以各接觸凸部3 0作接觸。於本發明之實 施例中該等接觸凸部30係對應一 BGA排列成10x 10的陣 列。Fig. 8 shows another adapter, which has a similar design to the adapter shown in Figs. The adapter 1 has an adapter body 3 on a circuit board. The surface of the adapter body 3 is configured as a number of contact protrusions 30, which are made of conductive rubber material. These contact protrusions form a single contact area 31, each of which is positioned to correspond to the configuration of the contact points of the wafer carrier 2 to be tested, so that a contact point 16 under any circumstances Each of the contact protrusions 30 can be contacted. In the embodiment of the present invention, the contact protrusions 30 are arranged in a 10 × 10 array corresponding to a BGA.

於此實施例中,於各個陣列之該等列中,該等接觸凸 部30係藉該等導體路徑32彼此連接。此處於各情況下一 導體路徑3 2係連接一該等列之每一第二接觸凸部。提供兩 導體路徑32以用於該等接觸凸部之一列。上述一導體組件 為此目的可不以多層電路板的形式直接形成於一樣品電路 板之表面上。 於本發明之實施例中,五個接觸凸部3 0彼此係電性 連接,此表示該晶片載體2的五個導體路徑及欲以一導體 17 200413740 路徑1 4連接之所有接觸點1 6都可彼此電性連接。 上述轉接器可用於測試具有數個接觸點1 6於連接 1 1 (其係以標準格狀佈局作配置)上的晶片載體2。此表示 轉接器可用於不同晶片載體2,且該等接觸點1 6之格狀 案係與該等接觸凸部3 0之佈局相符。此表示原則上並不 要為一晶片載體去設計新的轉接器以使之可測試於一指 測試器中,且該晶片載體2之該等接觸點1 6的佈局係為 準化並與該轉接器1之該等接觸凸部30之佈局相符。 當然也可能以不同方式去互連該等接觸凸部 3 0, 如不同列的接觸凸部可彼此電性連接,或彼此電性連接 接觸凸部的數目可較多或較少。 於一轉接器上提供數個接觸區31也相當有利,於 接觸區中該等接觸元件(此處係指接觸凸部3 0)係彼此電 連接,且不同接觸區之各個接觸元件亦可彼此電性連接 例如於第8圖中所示之轉接器中,各個導體路徑32可於 一對應之接觸區中電性連接至對應之導體路徑。 第9圖係概要且非常簡化的表示一晶片载體2之該 導體路徑,其中每一者係由該晶片側指向該連接側。藉 第8圖中之該轉接器,該等導體路徑之一列之第二導體 徑係電性連接。兩測試網路 33,34於每一列中係以此 形,於一測試網路之兩鄰近導體路徑間另外形成一測試 路之導體路徑。藉此將可確保一測試網路之兩鄰近導體 徑不會形成短路,另一測試網路之另一導體路徑也不會 成短路,因其係配置於此兩導體路徑之間。此係描述於 側 該 圖 需 狀 標 例 之 性 〇 另 些 由 路 成 網 路 形 鄰 18 200413740 屏蔽準則(Shielded Adjacency Criterion),故各個導體路 二都是藉由來自相同測試網路最鄰近的導體路徑的屏蔽。 以此方式形成之測試網路可確保該晶片載體中該等導體路 ^間的任何短路都可藉由於相關測試網路間(其每一者包 含多個的導體路徑)之短路測試檢測出。於依據第8圖之該 轉接器中,五個導體路徑係彼此連接,其當然亦可讓更多 的導體路徑彼此連接,以使之形成至少5 〇個導體路徑。較 理想係連接所有導體路徑以僅形成兩測試網路,故僅需進 行單一量測以測試該晶片載體是否短路。 於一較簡易之實施例中,若目的係位於該晶片載體提 供較長、分支的導體路徑,例如電源或接地導體路徑,以 將此等較長之導體路徑彼此連接,而得到相對於其他導體 路從為較大的測試網路以作獨立測試。接著例如可將一高 测試電壓施於此測試網路,並在短時間内對照此高電壓施 於其他所有欲測試之導體路徑。於此相關之參考請參閱德 國專利案 DE 1 97 00 505 A1。 第1 0圖係表示依據本發明之另一轉接器,其類似於 第3圖所示之設計,相同部分則給予同樣的參考號。 該轉接器1為一具有四個ΙΟχ 10通孔4之陣列,每 一者支撐一接觸針5。季而形成八個接觸區以支撐八個晶 片載體2。鄰接每一轉接器本體3者係天線板35,於每一 天線板上具有一電纜36以作為可能用於該天線板上之應 用。該天線板3 5上具有數個通孔以作為該等接觸針5的通 道。該天線可形成於天線板3 5中作為一垂直延伸出所有天 19 200413740 線 針 天 四 孔 出 片 對 螺 本 件 觸 係 均 並 體 接 板3 5之接觸層,且僅於該通孔區域絕緣以容納該等接觸 5。然而該天線亦可呈複雜結構。 第10圖所示之轉接器同樣具有與該轉接器本體3及 線板3 5相同外尺寸之兩校準板3 7。此等校準板3 7具有 個孔徑3 8,其較欲量測之晶片載體2之外形略小。該等 徑3 8下部略為縮減’以於每一孔徑3 8處形成一向内突 之連續邊界板3 9,晶片載體可插入每一孔徑3 8,且該晶 載體之端部係相適於該邊界板3 9。 該校準板3 7、該天線板3 5以及轉接器本體3具有相 應之孔洞40,該孔洞中為螺狀連接裝置41 (例如合適之 栓或螺帽)’藉由該螺狀連接裝置該校準板3 7及連接器 體及天線板35係固定於其間,並彼此鉗緊以形成一組 ’同時各個晶片載體係藉該校準板37按壓於該對應之接 區。 該螺狀連接裝置41代表一夾鉗裝置,此等夾鉗裝置 均勻分散於該轉接器丨之表面,因此該轉接器丨係承受 勻負載。 此藉杈準板3 7鉗緊該等晶片载體之轉接器係固設於 扎狀測忒β中之組件並作測試。在該指狀測試器中本身 不而要其他的固定裝置去支撐該轉接器以及該等晶片載 〇 便捷的夹甜元件也可使用而不需使用前述之螺狀連 裝置41。 田…、:亦有可旎不需使用以校準板3 7以及螺狀連接裝 20 200413740 置41組成的固g*姑里 疋裝置(其係直接形成在該轉接器上),而是 提供一模壓形式的面a# 飞的固疋裴置,其在該指狀測試器中具有對 應的壓力板。 ^ 既然是將道胁& 田 导體組件鉗緊至該轉接器,在力量上就必須 有所考里僅將部分預作測試之導體組件與_轉接器作甜 緊並杈準會較為有Μ,接著再將其他組的導體組件作鉗緊 及測#式。由於同步钳緊全部的應用會導致高應力形成的物 理問題☆此特別適用於多個導體組件形成在-電路板的 測試’即所謂的應用。在測試有許多應用的電路板時,僅 將一列t用t緊至轉接器會較為方便,若此就不需校準板 以及兩“鉗橫#,每一者經配置以鄰接該電路板上該列應 用的兩側並鉗緊至該轉接器本體。 〜 」、有斗夕應用之電路板的另外方法係提供一可用 於測試僅-個或很少應用的轉接器,換言 <,此轉接器僅 具有-個或少數的接觸區。此轉接器藉適當的機構按壓至 該點路板之-側且為該轉接器可觸及纟,並進行相關的量 測操作。在完成量測操作後,藉機構移 里 A将ί要益使之與 電路板相距一短距離,並對照所按壓 ^ 得換至其他應用 上’接者執行其他的量測操作。該轉接器 按著可按步择# 於各個應用間或少數應用群組間。 〃 本發明之範圍内當然亦包括可以 Χ線取代轉接哭φ 晶片載體上形成的導體路徑。此可特 〇〇 〜源、用在晶片. 有較大且較多分支的導體路徑時,例 ^ t 用於電源供應叆拄 地的導體路徑。 的馬:¾接 21 200413740In this embodiment, in the columns of each array, the contact protrusions 30 are connected to each other by the conductor paths 32. In each case, the conductor path 32 is connected to each of the second contact protrusions of one or more of the rows. Two conductor paths 32 are provided for one row of the contact protrusions. The above-mentioned conductor assembly may be formed directly on the surface of a sample circuit board in the form of a multilayer circuit board for this purpose. In the embodiment of the present invention, the five contact protrusions 30 are electrically connected to each other. This means that the five conductor paths of the chip carrier 2 and all contact points 16 to be connected by a conductor 17 200413740 path 14 are connected. Can be electrically connected to each other. The above adapter can be used to test a wafer carrier 2 having a plurality of contact points 16 on a connection 11 (which is configured in a standard grid layout). This means that the adapter can be used for different wafer carriers 2, and the grid pattern of the contact points 16 is consistent with the layout of the contact protrusions 30. This means that in principle, do not design a new adapter for a wafer carrier so that it can be tested in a finger tester, and the layout of the contact points 16 of the wafer carrier 2 is standardized and aligned with the The layouts of the contact protrusions 30 of the adapter 1 match. Of course, it is also possible to interconnect the contact protrusions 30 in different ways. For example, the contact protrusions of different columns may be electrically connected to each other, or electrically connected to each other. The number of the contact protrusions may be more or less. It is also quite advantageous to provide several contact areas 31 on an adapter. In the contact area, the contact elements (here, the contact protrusions 30) are electrically connected to each other, and each contact element in different contact areas can also be For example, in the adapter shown in FIG. 8, each of the conductor paths 32 can be electrically connected to the corresponding conductor path in a corresponding contact area. Figure 9 is a schematic and very simplified representation of the conductor path of a wafer carrier 2, each of which is directed from the wafer side to the connection side. With the adapter in Figure 8, the second conductor diameter of one of the conductor paths is electrically connected. The two test networks 33, 34 are shaped in each column to form another conductor path of a test circuit between two adjacent conductor paths of a test network. This will ensure that two adjacent conductor paths of one test network will not form a short circuit, and the other conductor path of the other test network will not be short circuited because it is arranged between the two conductor paths. This series is described on the side of the figure. The other example is the road-shaped network, which is adjacent to the network. 18 200413740 Shielded Adjacency Criterion, so each conductor circuit is the nearest one from the same test network. Shielding of the conductor path. The test network formed in this way can ensure that any short circuit between the conductor paths in the chip carrier can be detected by a short circuit test between the relevant test networks (each of which includes multiple conductor paths). In the adapter according to FIG. 8, five conductor paths are connected to each other. Of course, more conductor paths can also be connected to each other so as to form at least 50 conductor paths. Ideally, all conductor paths are connected to form only two test networks, so only a single measurement is required to test whether the chip carrier is shorted. In a simpler embodiment, if the purpose is to provide a longer, branched conductor path on the wafer carrier, such as a power or ground conductor path, to connect these longer conductor paths to each other, to obtain relative to other conductors. Router is a larger test network for independent testing. Then, for example, a high test voltage can be applied to the test network, and all other conductor paths to be tested can be applied to the high voltage in a short time. Please refer to the German patent DE 1 97 00 505 A1 for related references. Fig. 10 shows another adapter according to the present invention, which is similar to the design shown in Fig. 3, and the same parts are given the same reference numbers. The adapter 1 is an array with four 10 × 10 through holes 4, each supporting a contact pin 5. Eight contact areas are formed in seasons to support eight wafer carriers 2. Adjacent to each adapter body 3 is an antenna board 35 with a cable 36 on each antenna board as a possible application for the antenna board. The antenna board 35 has a plurality of through holes as channels for the contact pins 5. The antenna can be formed in the antenna plate 3 5 as a vertical extension of all days 19 200413740 The needle and the four holes of the needle are all contact with the screw and are connected to the contact layer of the plate 3 5 and are insulated only in the area of the through hole. To accommodate such contacts 5. However, the antenna may have a complicated structure. The adapter shown in FIG. 10 also has two calibration plates 37 having the same outer dimensions as the adapter body 3 and the wire plate 35. These calibration plates 37 have apertures 38, which are slightly smaller than the shape of the wafer carrier 2 to be measured. The lower part of these diameters 38 is slightly reduced to form a continuous inwardly protruding continuous boundary plate 39 at each aperture 38, and the wafer carrier can be inserted into each aperture 38, and the end of the crystal carrier is suitable for the Boundary plate 3 9. The calibration plate 37, the antenna plate 35, and the adapter body 3 have corresponding holes 40, and the holes are screw connection devices 41 (such as suitable bolts or nuts). The calibration plate 37 and the connector body and the antenna plate 35 are fixed between them and clamped to each other to form a group. At the same time, each wafer carrier is pressed by the calibration plate 37 to the corresponding connection area. The screw-shaped connection device 41 represents a clamp device. These clamp devices are evenly distributed on the surface of the adapter, so the adapter is subjected to a uniform load. The adapters for clamping the wafer carriers by the quasi-plates 37 are components fixed in the zigzag test β and tested. In the finger tester itself, other fixing devices are required to support the adapter and the wafers. Convenient clamping components can also be used without using the aforementioned screw connection device 41. Tian ..., there is also a solid g * gull device (which is formed directly on the adapter) without the need to use a calibration plate 37 and a screw connection assembly 20 200413740 and 41. A die-formed surface a # Fei Gu Pei Zhi, which has a corresponding pressure plate in the finger tester. ^ Since the Dowow & field conductor assembly is clamped to the adapter, the strength must be tested, and only some of the pre-tested conductor assemblies and adapters are tightly combined There are more M, and then the conductor components of other groups are clamped and tested. The physical problem of high stress formation due to simultaneous clamping of all applications ☆ This is particularly suitable for the testing of multiple conductor components formed on-circuit boards, so-called applications. When testing a circuit board with many applications, it is more convenient to use only one column of t to the adapter. If this is the case, there is no need for a calibration board and two "tongs horizontal #", each of which is configured to abut the circuit board Both sides of the row of applications are clamped to the adapter body. ~ "Another method of a circuit board with Dou Xi application is to provide an adapter that can be used to test only one or very few applications, in other words < This adapter has only one or a few contact areas. The adapter is pressed to the-side of the circuit board by an appropriate mechanism so that the adapter can reach the 纟 and perform related measurement operations. After the measurement operation is completed, A will move it to a short distance from the circuit board, and perform another measurement operation by switching to another application according to the pressed ^. The adapter Press to select # between each application or a few application groups.当然 Of course, within the scope of the present invention, it is also possible to replace the conductor path formed on the wafer carrier with an X line. This can be used as a source and used for wafers. When there are large and branched conductor paths, for example, ^ t is used for power supply and ground conductor paths. Horse: ¾ pick up 21 200413740

依據本發明之轉接器已詳細解釋於前文以及測試晶 片載體的實施例中。然而依據本發明之轉接器也不僅可用 於測試晶片載體,也可用於測試於一側有接觸點之任何類 型導體組件(指一側之接觸點彼此非配置非常緊密以及例 如有至少 〇 · 5 mm之間隔者),且另一側之接觸點可以任何 方式形成者。由於上述接觸點可毫無困難以測試指作接 觸,故該些接觸點可非常小且彼此緊密。依據本發明之轉 接器及指狀測試器亦可測試晶片側區域具有三維外形之晶 片載體。 本發明可簡略摘要如下:The adapter according to the present invention has been explained in detail in the foregoing and the embodiments of the test wafer carrier. However, the adapter according to the present invention can also be used not only to test the wafer carrier, but also to test any type of conductor assembly having contact points on one side (referring to the fact that the contact points on one side are not closely arranged with each other and, for example, have at least 0.5 mm), and the contact point on the other side can be formed in any way. Since the above-mentioned contact points can be contacted by the test finger without difficulty, the contact points can be very small and close to each other. The adapter and the finger tester according to the present invention can also test a wafer carrier having a three-dimensional shape in a wafer-side region. The invention can be briefly summarized as follows:

本發明係關於一用於測試一導體組件之轉接器,其特 別用於測試一晶片載體。上述之導體組件一側具有接觸元 件,其配置非呈高密度且具有約0.5mm之最小間距,該轉 接器至少具有兩接觸區,每一接觸區有一組接觸元件,其 中轉接器接觸區之該等接觸元件可與接觸點非配置緊密之 導體組件相接觸。接觸區之每一接觸元件係電性連接至另 一接觸區的接觸元件,以讓兩導體組件之導體路徑可彼此 電性連接並可同步進行測試。 【圖式簡單說明】 本發明係以示範例及附力口的圖示進行詳述,其中: 第1圖為兩晶片載體之透視圖,分別為該晶片側與該 連接側的側視方向。 第2圖為第1圖之晶片載體僅有接觸點、導體路徑、 22 200413740 導電孔以及該邊緣邊界的圖示。 第3圖為依據本發明之一具有第1及2圖之晶片載體 的轉接器。 第4圖為第3圖之該轉接器的接觸針陣列以及該等晶 片載體。 第5圖係依據本發明之另一種轉接器的透視圖。The present invention relates to an adapter for testing a conductor assembly, and is particularly useful for testing a wafer carrier. The above-mentioned conductor assembly has contact elements on one side, and its configuration is not high-density and has a minimum pitch of about 0.5mm. The adapter has at least two contact areas, and each contact area has a group of contact components. The adapter contact area These contact elements can be in contact with non-closely arranged conductor components. Each contact element in the contact area is electrically connected to a contact element in another contact area, so that the conductor paths of the two conductor assemblies can be electrically connected to each other and can be tested simultaneously. [Brief Description of the Drawings] The present invention is described in detail with an exemplary example and a diagram of a power port, wherein: Fig. 1 is a perspective view of two wafer carriers, which are respectively the side view directions of the wafer side and the connection side. Figure 2 is a diagram of the wafer carrier of Figure 1 with only contact points, conductor paths, 22 200413740 conductive holes, and the edge boundary. Fig. 3 is an adapter having a wafer carrier according to Figs. 1 and 2 according to the present invention. Figure 4 is the contact pin array of the adapter and the wafer carrier of Figure 3. Figure 5 is a perspective view of another adapter according to the present invention.

第6圖係第5圖之轉接器,顯示該轉接器之各個導體 路徑(以平面圖形式)。 第7圖係一指狀測試器,其中使用一依據本發明之轉 接器。 第8圖係依據本發明之另一轉接器的平面圖。 第 9圖係以較簡化的形式說明一晶片載體互連之導 體路徑的配置。 第1 0圖係一轉接器的透視圖,其上固設有該些晶片 載體。Figure 6 is the adapter of Figure 5, showing the conductor paths (in plan view) of the adapter. Fig. 7 is a finger tester in which an adapter according to the present invention is used. Figure 8 is a plan view of another adapter according to the present invention. Figure 9 illustrates the configuration of the conductor paths of a wafer carrier interconnect in a more simplified form. Fig. 10 is a perspective view of an adapter on which the wafer carriers are fixed.

【元件代表符號簡單說明】 1 轉接器 2 晶片載體 3 轉接器本體 4 通孔 5 接觸針 6、7 探針尖端 8、9 表面 23 200413740 ίο晶片側 11連接側 1 2接觸腳 1 3彎曲分段 1 4導體路徑 1 5孔洞 1 6接觸點 17、18 接觸區 φ 2 0指狀測試器 21測試指 22測試電極 23滑座 24作動汽缸 2 5導體路徑 26、27、30 接觸凸部 28、32 導體路徑 29天線 籲 31接觸區 33 > 34 測試網路 3 5天線板 3 6電纜 3 7校準板 3 8孔徑 3 9邊界板 24 200413740 40通孔 4 1螺狀連接裝置[Simple description of component representative symbols] 1 Adapter 2 Wafer carrier 3 Adapter body 4 Through hole 5 Contact pin 6, 7 Probe tip 8, 9 Surface 23 200413740 ί Wafer side 11 Connection side 1 2 Contact pin 1 3 Bend Segment 1 4 conductor path 1 5 holes 1 6 contact points 17, 18 contact area φ 2 0 finger tester 21 test finger 22 test electrode 23 slider 24 actuating cylinder 2 5 conductor path 26, 27, 30 contact protrusion 28 32 conductor path 29 antenna 31 contact area 33 > 34 test network 3 5 antenna board 3 6 cable 3 7 calibration plate 3 8 aperture 3 9 boundary plate 24 200413740 40 through hole 4 1 screw connection

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Claims (1)

200413740 拾、申請專利範圍: 1. 一種轉接器,用於測試一指狀測試器中一個或多個具有 數個導體路徑之導體組件(2),其中該導體組件/組件群 之一側(1 1)上具有數個接觸點(1 6),其係配置與最鄰近 之接觸點相距至少一預定間距,以讓該導體組件之此側 可藉一轉接器作接觸,其中 該轉接器(1)具有至少一設有一組接觸元件 (6,7; 26,27)之接觸區(17,18),且該接觸區(17,18) 之該等接觸元件(6,7 ; 26,27)係配置成一圖案對應該 導體組件之該等接觸點(1 6),且 該等接觸元件(6; 26)於各情況下係以一方式電 性連接至另一接觸元件(7 ; 27),該方式係將該導體 組件/組件群之該等導體路徑結合成數個測試網 路,且該等測試網路於未與轉接器接觸之該側或該 等側上具有至少一接觸點 2 ·如申請專利範圍第1項所述之轉接器,其特徵在於該等 測試網路於未與該轉接器接觸之該導體組件/組件群之 該側或該等側上具有至少兩個接觸點。 3 .如申請專利範圍第1項所述之轉接器,其特徵在於該轉 接器(1)具有至少兩個接觸區(17,18),每一接觸區具有 一組接觸元件(6,7; 26,27),且該等接觸區之一者(17) 26 200413740 之至少數個接觸元件(6; 26)於各情況下係電性連接至另 接觸區(18)之—接觸元件(7 ; 27)。 專利範圍第2項所述之轉接器,其特徵在於該轉 接器⑴具有至少兩個接觸區(17,18),& —接觸區具有 -組接觸元件(6,7; 26,27),且該等接觸區之一者⑼ 之至少數個接觸元件(6; 26)於各情況下係電性連接至另 接觸區(18)之一接觸元件(7 ; 27)。 5·如申請專利範圍帛3項所述之轉接器,其特徵在於一接 觸區(17)之所有接觸元件(6; 26)係成對連接至另一接觸 區(18)之該等接觸元件(7; 27)。 6.如申請專利範圍第4項所述之轉接器,其特徵在於一接 觸區(17)之所有接觸元件(6; 26)係成對連接至另一接觸 區(18)之該等接觸元件(7 ; 27)。 如申請專利範圍第3項所述之轉接器,其特徵在於各個 接觸區(17,18)之該等接觸元件(26,27)係以一方式彼此 連接’該方式係於各情況下一接觸區(17)之一接觸元件 (26)與另一接觸區(18)之一接觸元件(27)係以該接觸區 (1 7)之一定點與該另一接觸區(1 8)之相對應點作電性連 接。 27 200413740 8 ·如申請專利範圍第6項所述之轉接器’其特徵在於各個 接觸區(17,18)之該等接觸元件(26,27)係以一方式彼此 連接,該方式係於各情況卞一接觸區(17)之一接觸元件 (26)與另一接觸區(18)之/接觸元件(27)係以該接觸區 (1 7)之一定點與該另一接觸區(1 8)之相對應點作電性連 接。 9 ·如申請專利範圍第1項所述之轉接器’其特徵在於該接 觸區(31)之該等接觸元件(30)係電性連接至此接觸區 (31)之另一接觸元件(30)。 1 0.如申請專利範圍第8項所述之轉接器,其特徵在於該接 觸區(3 1)之該等接觸元件(3 0)係電性連接至此接觸區 (31)之另一接觸元件(30)。 1 1 .如申請專利範圍第9項所述之轉接器,其特徵在於該等 接觸元件係彼此成對電性連接。 1 2 ·如申請專利範圍第1 0項所述之轉接器,其特徵在於該 等接觸元件係彼此成對作電性連接。 1 3 ·如申請專利範圍第1項所述之轉接器,其特徵在於該接 28 200413740 觸區之數個接觸元件係彼此電性連接,以讓欲測5式之 導體組件的數個導體路徑結合形成一測試網路。 1 4 ·如申請專利範圍第1 〇項所述之轉接器,其特徵在於該 接觸區之數個接觸元件係彼此電性連接,以讓欲測試之 一導體組件的數個導體路徑結合形成一測試網路。 1 5 ·如申請專利範圍第1項所述之轉接器’其特徵在於該導 體組件係一晶片載體,其具有一連接側用以連接至另一 導體組件,其中該連接側上之該專接觸點可藉一轉接器 作接觸,且該晶片載體具有一晶片側,其上具有數個接 觸點(12)用以連接至一積體電路。 1 6 ·如申請專利範圍第1 2項所述之轉接器,其特徵在於該 導體組件係一晶片載體,其具有一連接側用以連接至另 一導體組件,其中該連接側上之該等接觸點可藉一轉接 器作接觸,且該晶片載體具有一晶片側,其上具有數個 接觸點(12)用以連接至一積體電路。 1 7 ·如申請專利範圍第1 4項所述之轉接器,其特徵在於該 導體組件係一晶片載體,其具有一連接側用以連接至另 一導體組件,其中該連接側上之該等接觸點可藉一轉接 器作接觸,且該晶片載體具有一晶片側,其上具有數個 29 4U740 接觸點(12)^連接至-積體電路。 申咕專利勒1圍第1項所述之轉接器,其特徵在於該等 接觸7G件(6,7)於各情況下係以一接觸針(5)之尖端作代 表。 1 9 ·如申明專利範圍帛i 7項所述之轉接器,其特徵在於該 等接觸元件(6,7)於各情況下係以—接觸針⑺之尖端作 代表。 2〇·如申請專利範圍第i項所述之轉接器,其特徵在於該等 接觸元件(26,2 7)係呈導電橡膠材料凸部的形式。 2 1.如申請專利範圍第1 7項所述之轉接器,其特徵在於該 等接觸元件(26,2 7)係呈導電橡膠材料凸部的形式。 200413740 情況下該等接觸針(5)之〆者之一端的尖端(6)係表示一 接觸區(17)之該等接觸元件之者,且該接觸針(5)之另 一端的尖端(7)係表示另〆接觸區(18)之該等接觸元件 之一者。 參 2 4 ·如申請專利範圍第1項所述之轉接器,其特徵在於該轉 接器(1;)具有一轉接器本體(3),於其上具有數個導體路 徑(28)連接至該等接觸元件以使之彼此電性連接。 25.如申請專利範圍第23項所述之轉接器,其特徵在於該 轉接器⑴具有-轉接器本體(3),於其上具有數個導體 路仅(2 8)連接至該等接觸元件以使之彼此電性連接。 26·如★申請專利範圍第1項所述之轉接器,其特徵在於該等 可猎-轉接器作連接之接觸點(16)係間距一至少〇 且較佳為距離。 :申:專利乾圍第25項所述之轉接器,其特徵在於該 等可藉轉接器作接觸之接觸點(1 6)係間距一至少 〇· 5mm且較佳為1mm之距離。 2 8 ·如申請專利範图隹 靶圍第1項所述之轉接器,其特徵在於該等 接觸點(1 6)可藉一亩挪尤 直仏不小於〇· 5mm之轉接器作接觸。 31 413740 29.如申請專利範圍第27項所述之轉接器 等接觸點⑽可藉一直徑不小於〇5mm 觸。 其特徵在於該 之轉接器作接 如申請專利範圍第!項所述之轉接器, 可藉一轉接器作接觸之接觸點(16)係以 配置,例如一球形格狀陣列。 其特徵在於該等 一規律之格狀作200413740 Patent application scope: 1. An adapter for testing one or more conductor components (2) with several conductor paths in a finger tester, wherein one side of the conductor component / component group ( 1 1) has a plurality of contact points (1 6), which are arranged at least a predetermined distance from the nearest contact point, so that this side of the conductor assembly can be contacted by an adapter, wherein the adapter The device (1) has at least one contact area (17, 18) provided with a set of contact elements (6, 7; 26, 27), and the contact elements (6, 7; 26) of the contact area (17, 18). , 27) are arranged in a pattern corresponding to the contact points (16) of the conductor assembly, and the contact elements (6; 26) are in each case electrically connected to another contact element (7; 27), the method is to combine the conductor paths of the conductor component / component group into several test networks, and the test networks have at least one contact on the side or the sides that are not in contact with the adapter Point 2 · The adapter described in item 1 of the scope of patent application, characterized in that these test networks Having at least two contact points on the conductor side or those sides of the contacts of the adapter assembly / assembly of the group. 3. The adapter according to item 1 of the scope of patent application, characterized in that the adapter (1) has at least two contact areas (17, 18), and each contact area has a set of contact elements (6, 7; 26, 27), and at least several contact elements (6; 26) of one of these contact areas (17) 26 200413740 are in each case electrically connected to the other contact area (18)-contact element (7; 27). The adapter according to item 2 of the patent scope, characterized in that the adapter 至少 has at least two contact areas (17, 18), and the-contact area has-a group of contact elements (6, 7; 26, 27 ), And at least several contact elements (6; 26) of one of the contact regions 电 are in each case electrically connected to a contact element (7; 27) of the other contact region (18). 5. The adapter according to item 3 of the scope of patent application, characterized in that all contact elements (6; 26) of one contact area (17) are connected in pairs to the other contact area (18) Element (7; 27). 6. The adapter according to item 4 of the scope of patent application, characterized in that all contact elements (6; 26) of one contact area (17) are connected in pairs to the contacts of another contact area (18) Element (7; 27). The adapter as described in item 3 of the scope of patent application, characterized in that the contact elements (26, 27) of each contact area (17, 18) are connected to each other in a way 'this way is in each case One of the contact elements (26) of the contact region (17) and one of the contact elements (27) of the other contact region (18) are formed by a certain point of the contact region (17) and the other contact region (18). The corresponding points are electrically connected. 27 200413740 8 · The adapter described in item 6 of the scope of patent application is characterized in that the contact elements (26, 27) of each contact area (17, 18) are connected to each other in a manner that is based on In each case, a contact element (26) of one contact region (17) and / a contact element (27) of another contact region (18) are connected to the other contact region (17) at a certain point of the contact region (17). 18) The corresponding points are electrically connected. 9 · The adapter according to item 1 of the scope of patent application is characterized in that the contact elements (30) of the contact area (31) are another contact element (30) electrically connected to the contact area (31) ). 10. The adapter according to item 8 of the scope of patent application, characterized in that the contact elements (30) of the contact area (31) are another contact electrically connected to the contact area (31) Element (30). 1 1. The adapter according to item 9 of the scope of patent application, wherein the contact elements are electrically connected in pairs with each other. 1 2 · The adapter according to item 10 of the scope of patent application, characterized in that the contact elements are electrically connected in pairs with each other. 1 3 · The adapter described in item 1 of the scope of patent application, characterized in that the several contact elements in the contact area 28 200413740 are electrically connected to each other, so that several conductors of the type 5 conductor assembly to be tested The paths combine to form a test network. 1 4 · The adapter according to item 10 of the scope of patent application, characterized in that several contact elements in the contact area are electrically connected to each other, so that several conductor paths of a conductor component to be tested are combined to form A test network. 1 5 · The adapter according to item 1 of the scope of patent application, characterized in that the conductor component is a wafer carrier, which has a connecting side for connecting to another conductor component, wherein the special terminal on the connecting side The contact point can be contacted by an adapter, and the wafer carrier has a wafer side with a plurality of contact points (12) for connecting to a integrated circuit. 16 · The adapter according to item 12 of the scope of patent application, characterized in that the conductor component is a wafer carrier, which has a connection side for connecting to another conductor component, wherein the connection side The iso-contact point can be contacted by an adapter, and the wafer carrier has a wafer side, and there are several contact points (12) for connecting to a integrated circuit. 1 7 · The adapter according to item 14 of the scope of patent application, characterized in that the conductor component is a wafer carrier having a connection side for connecting to another conductor component, wherein the connection side The iso-contact point can be contacted by an adapter, and the wafer carrier has a wafer side with several 29 4U740 contact points (12) ^ connected to the -integrated circuit. The adapter described in item 1 of Shengu Patent Le 1 is characterized in that the contact 7G pieces (6, 7) are in each case represented by the tip of a contact pin (5). 19 · The adapter according to item 7 of the declared patent, characterized in that the contact elements (6, 7) are represented in each case by the tip of a contact pin. 20. The adapter as described in item i of the patent application range, characterized in that the contact elements (26, 27) are in the form of convex portions of a conductive rubber material. 2 1. The adapter according to item 17 of the scope of patent application, characterized in that the contact elements (26, 27) are in the form of convex portions of conductive rubber material. 200413740 In the case of the tip (6) of one of the contact pins (5), the tip (6) of the contact element of a contact area (17), and the tip (7) of the other end of the contact pin (5) ) Means one of the contact elements of the other contact area (18). See 2 4 · The adapter according to item 1 of the scope of patent application, characterized in that the adapter (1;) has an adapter body (3) with several conductor paths (28) thereon Connected to the contact elements to make them electrically connected to each other. 25. The adapter according to item 23 of the scope of patent application, characterized in that the adapter ⑴ has-an adapter body (3), which has several conductor paths only (2 8) connected to the adapter Wait for the contact elements to be electrically connected to each other. 26. The adapter according to item 1 of the scope of the patent application, characterized in that the contact points (16) for connection of these huntable-adapter are connected by a distance of at least 0 and preferably a distance. : Application: The adapter described in the patent No. 25, which is characterized in that the contact points (16) which can be contacted by the adapter are at a distance of at least 0.5 mm and preferably 1 mm. 2 8 · The adapter as described in the patent application fan map 隹 target circle item 1 is characterized in that these contact points (16) can be borrowed from an adapter of no less than 0.5mm per mu. contact. 31 413740 29. The contact point such as the adapter described in item 27 of the scope of patent application can be touched by a diameter of not less than 0.05mm. It is characterized by the adapter as the patent application scope! The adapter described in the above item may be configured with a contact point (16) for contact by an adapter, such as a spherical grid array. It is characterized by these regular patterns i如申請專利範圍第29項所述之轉接器, 等可藉一轉接器作接觸之接觸點(16)係以 作配置,例如一球形袼狀陣列。 其特徵在於該 一規律之格狀 32. 如申請專利範圍第1 吓述之轉接盗,其特徵在於該轉 接器具有一天線(29)以產生一非均勻電場。 33. 如申請專利範圍帛31項所述之轉接器,其特徵在於該 轉接器具有一天線(29)以產生一非均勻電場。 34.如申請專利範圍第1項所述之轉接器,其特徵在於該轉 接器(1)在該相對侧上具有數個接觸區以於各情況下支 撐一導體組件(17,18)。 32 200413740 3 5 ·如申請專利範圍第3 3項所述之轉接器,其特徵在於該 轉接器(1)在該相對側上具有數個接觸區以於各情況下 支撐一導體組件(17,18)。 3 6 ·如申請專利範圍第1項所述之轉接器,其特徵在於該轉 接器(1)具有一定位裝置,用以固定一個或多個導體組件 至該轉接器(1)。 3 7 ·如申請專利範圍第3 5項所述之轉接器,其特徵在於該 轉接器(1)具有一定位裝置,用以固定一個或多個導體組 件至該轉接器(1)。 3 8 ·如申請專利範圍第3 6項所述之轉接器,其特徵在於該 定位裝置具有一校準板,其可藉一固定裝置固定至一轉 接器本體,且該定位裝置具有至少一孔徑,其略小於該 欲測試導體組件之外形,以讓一導體組件配置於該孔徑 區域中之該轉接器本體以及該校準板之間時該導體組 件可固定至該孔徑,且該導體組件(2)未與該轉接器本體 接觸之一側為易於存取者。 3 9 ·如申請專利範圍第3 7項所述之轉接器,其特徵在於該 定位裝置具有一校準板,其可藉一固定裝置固定至一轉 接器本體,且該定位裝置具有至少一孔徑,其略小於該 33 200413740 欲測試導體組件之外形,以讓一導體組件配置於該孔徑 區域中該轉接器本體以及該校準板之間時該導體組件 可固定至該孔徑,且該導體組件(2)未與該轉接器本體接 觸之一側為易於存取者。 4 0.如申請專利範圍第38項所述之轉接器,其特徵在於該 固定裝置係為一螺狀連接形式。i The adapter described in item 29 of the scope of patent application, etc. The contact point (16), which can be borrowed by an adapter, is configured, for example, a spherical cymbal array. It is characterized by the regular grid shape. 32. As described in the patent application scope, the adapter is characterized in that the adapter has an antenna (29) to generate a non-uniform electric field. 33. The adapter described in item 31 of the scope of patent application, characterized in that the adapter has an antenna (29) to generate a non-uniform electric field. 34. The adapter according to item 1 of the scope of patent application, characterized in that the adapter (1) has several contact areas on the opposite side to support a conductor assembly in each case (17, 18) . 32 200413740 3 5 · The adapter described in item 33 of the scope of patent application, characterized in that the adapter (1) has several contact areas on the opposite side to support a conductor assembly in each case ( 17, 18). 36. The adapter according to item 1 of the scope of patent application, characterized in that the adapter (1) has a positioning device for fixing one or more conductor components to the adapter (1). 37. The adapter according to item 35 of the scope of patent application, characterized in that the adapter (1) has a positioning device for fixing one or more conductor components to the adapter (1) . 38. The adapter according to item 36 of the scope of patent application, characterized in that the positioning device has a calibration plate that can be fixed to an adapter body by a fixing device, and the positioning device has at least one Aperture, which is slightly smaller than the outer shape of the conductor component to be tested, so that a conductor component can be fixed to the aperture when a conductor component is disposed between the adapter body and the calibration plate in the aperture area, and the conductor component (2) One side that is not in contact with the adapter body is easy to access. 39. The adapter according to item 37 of the scope of patent application, characterized in that the positioning device has a calibration plate that can be fixed to an adapter body by a fixing device, and the positioning device has at least one Aperture, which is slightly smaller than the shape of the conductor component to be tested, so that a conductor component can be fixed to the aperture when a conductor component is disposed between the adapter body and the calibration plate in the aperture area, and the conductor One side of the component (2) that is not in contact with the adapter body is easy to access. 40. The adapter according to item 38 of the scope of patent application, wherein the fixing device is a screw-shaped connection. 4 1 .如申請專利範圍第3 9項所述之轉接器,其特徵在於該 固定裝置係為一螺狀連接形式。 42 ·如申請專利範圍第3 8項所述之轉接器,其特徵在於該 固定裝置係為一快速活動之夾鉗形式。41. The adapter according to item 39 of the scope of patent application, characterized in that the fixing device is a screw-shaped connection form. 42. The adapter according to item 38 of the scope of patent application, characterized in that the fixing device is in the form of a fast-moving clamp. 4 3 ,如申請專利範圍第3 9項所述之轉接器,其特徵在於該 固定裝置係為一快速活動之夾鉗形式。 44 · 一種測試一指狀測試器中一導體組件的方法,其係藉由 申請專利範圍第1項之一轉接器進行,其中 至少一導體組件(2)之一側具有數個可與一轉 接器(1)接觸之接觸點,其中該轉接器(1)之一接觸區 之該等接觸元件(6,7; 26,27)係與該導體組件(2)之對 應接觸點作電性接觸, 34 200413740 一至少包含該導體組件(2)及該轉接器(1)之單 元組件係配置於該指狀測試器中,該單元組件可不 需該轉接器(1)而直接連接至一電子評估單元,以及 未與該轉接器接觸之該側上該導體組件之該 等接觸點(1 2)係藉由數個測試指(2 1)進行接觸,以測 試該等導體組件(2)之該等導體路徑(14)是否短路及 /或中斷。43. The adapter according to item 39 of the scope of patent application, characterized in that the fixing device is in the form of a fast-moving clamp. 44 · A method for testing a conductor component in a finger tester, which is performed by using an adapter in item 1 of the scope of patent application, wherein at least one conductor component (2) has several sides that can be connected with one The contact point of the adapter (1), wherein the contact elements (6, 7; 26, 27) of a contact area of the adapter (1) are made with the corresponding contact points of the conductor assembly (2). Electrical contact, 34 200413740 A unit component including at least the conductor component (2) and the adapter (1) is arranged in the finger tester, and the unit component can be directly used without the adapter (1). The contact points (1 2) connected to an electronic evaluation unit and the conductor component on the side not in contact with the adapter are contacted by several test fingers (2 1) to test the conductors Whether the conductor paths (14) of the component (2) are short-circuited and / or interrupted. 45 · —種測試一指狀測試器中一導體組件的方法,其係藉由 申請專利範圍第37項之一轉接器進行,其中 至少一導體組件(2)之一側具有數個可與一轉 接器(1)接觸之接觸點,其中該轉接器(1)之一接觸區 之該等接觸元件(6,7; 26,27)係與該導體組件(2)之對 應接觸點作電性接觸,45 · —A method for testing a conductor component in a finger tester, which is performed by using an adapter in item 37 of the scope of patent application, wherein at least one conductor component (2) has a number of A contact point contacted by an adapter (1), wherein the contact elements (6, 7; 26, 27) of a contact area of the adapter (1) are corresponding contact points with the conductor assembly (2) Make electrical contact, 一至少包含該導體組件(2)及該轉接器(1)之單 元組件係配置於該指狀測試器中,該單元組件可不 需該轉接器(1)而直接連接至一電子評估單元,以及 未與該轉接器接觸之該側上該導體組件之該 等接觸點(12)係藉由數個測試指(21)進行接觸,以測 試該等導體組件(2)之該等導體路徑(14)是否短路及 /或中斷。 46·如申請專利範圍第44項所述之方法,其特徵在於該導 35 200413740 體組件(2)之該等導體路徑(1 4)係藉由電阻量測以測試 是否中斷。 47 ·如申請專利範圍第45項所述之方法,其特徵在於該導 體組件(2)之該等導體路徑(1 4)係藉由電阻量測以測試 是否中斷。A unit component including at least the conductor component (2) and the adapter (1) is arranged in the finger tester, and the unit component can be directly connected to an electronic evaluation unit without the adapter (1). , And the contact points (12) of the conductor component on the side that are not in contact with the adapter are contacted by several test fingers (21) to test the conductors of the conductor component (2) Whether the path (14) is short-circuited and / or interrupted. 46. The method according to item 44 of the scope of patent application, characterized in that the conductor paths (1 4) of the conductor 35 200413740 body component (2) are tested for resistance by measuring resistance. 47. The method according to item 45 of the scope of patent application, characterized in that the conductor paths (1 4) of the conductor assembly (2) are tested for resistance by means of resistance measurements. 4 8 .如申請專利範圍第44項所述之方法,其特徵在於該導 體組件(2)之該等導體路徑(1 4)係藉由電場量測以測試 是否中斷。 49.如申請專利範圍第45項所述之方法,其特徵在於該導 體組件(2)之該等導體路徑(1 4)係藉由電場量測以測試 是否中斷。48. The method according to item 44 of the scope of patent application, characterized in that the conductor paths (1 4) of the conductor assembly (2) are tested by electric field measurement to determine whether they are interrupted. 49. The method according to item 45 of the scope of patent application, characterized in that the conductor paths (1 4) of the conductor assembly (2) are tested by electric field measurement to test whether they are interrupted. 5 0 ·如申請專利範圍第44項所述之方法,其特徵在於該導 體組件(2)之該等導體路徑(1 4)係藉由電阻量測以測試 是否短路。 5 1 ·如申請專利範圍第45項所述之方法,其特徵在於該導 體組件(2)之該等導體路徑(1 4)係藉由電阻量測以測試 是否短路。 36 200413740 52·如申請專利範圍"4項所述之方法,其特徵在於該導 體組件(2)之該等導體路徑(14)係藉由電場量測以測試 是否短路。 53. 如申請專利範圍第47項所述之方法,其特徵在於該導 體組件(2)之該等導體路徑(14)係藉由電場量測以測試 是否短路。 54. 如申請專利範圍第49項所述之方法,其特徵在於該導 體組件(2)之該等導體路徑(14)係藉由電場量測以測試 是否短路。 5 5 ·如申請專利範圍第4 4項所械夕士、土 ^ π /η*迷之方法,其特徵在於一具 有一集成天線(29)之韓技β Α 得操益(1)係用於執行該電場量測 法050. The method as described in item 44 of the scope of patent application, characterized in that the conductor paths (1 4) of the conductor assembly (2) are tested for resistance by a short circuit. 5 1 · The method as described in item 45 of the scope of patent application, characterized in that the conductor paths (1 4) of the conductor component (2) are tested for resistance by a short circuit. 36 200413740 52. The method as described in the scope of patent application " 4, characterized in that the conductor paths (14) of the conductor assembly (2) are tested for short circuit by electric field measurement. 53. The method as described in item 47 of the scope of the patent application, characterized in that the conductor paths (14) of the conductor assembly (2) are tested for short circuit by electric field measurement. 54. The method as described in item 49 of the scope of patent application, characterized in that the conductor paths (14) of the conductor assembly (2) are tested for electrical shorts by electric field measurement. 5 5 · The method described in item 44 of the scope of patent application, the method of soil ^ π / η *, is characterized by a Korean technology β Α with an integrated antenna (29). When performing this electric field measurement method0 項所述之方法,其特徵在於一具 接器(1)係用於執行該電場量測 56.如申請專利範圍第53 有一集成天線(29)之轉 法0 項所述之方法,其特徵在於一具 拯器(1)係用於執行該電場量測 57·如申請專利範圍第54 有一集成天線(29)之轉 法0 37 200413740 5 8.如申請專利範圍第44、45或52至57項所述之方法, 其特徵在於各情況下該欲測試之導體組件(2)之一導體 路徑(14)係用於作為天線(29)以實施該電場量測法。 ❿The method described in item 1, characterized in that a connector (1) is used to perform the electric field measurement 56. The method described in item 0 of the method for turning an integrated antenna (29) as described in the scope of patent application No. 53, its characteristics It is because a life saver (1) is used to perform the electric field measurement. 57. If the scope of the patent application is 54th, there is an integrated antenna (29) conversion method. 0 37 200413740 5 8. If the scope of the patent application is 44, 45 or 52 to The method described in item 57 is characterized in that in each case one of the conductor paths (14) of the conductor assembly (2) to be tested is used as an antenna (29) to implement the electric field measurement method. ❿ 3838
TW092132186A 2002-12-20 2003-11-17 Adapter for testing one or more conductor assemblies TWI234002B (en)

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