TW200307374A - Light-emitting diode structure and manufacturing method thereof - Google Patents

Abstract

This invention provides a light-emitting diode (LED) structure, at least comprising a substrate, a grid layer, a first type semiconductor layer, and a second type semiconductor layer, in which the grid layer has a grid pattern so that the light emitted inside of the LED device can be reflected back following an outward direction and, therefore, not all the light constantly proceeds inside of the LED device and the light will not be absorbed by individual layers insides. Moreover, this invention also provides a manufacturing method of LED, which grows a grid layer during the epitaxial process of the LED device to complete the invented LED structure.

Description

200307374

[Technical field to which the invention belongs] The present invention relates to a manufacturing technology of light emitting diodes (LEDs), and a technology for fitting the light emitting efficiency of the electrodes. ', &Quot; Straw to improve the light-emitting diode [prior art] The semiconductor used in general light-emitting diodes is 2.3) is a refractive index (refraction ,, (refractive index, active layer in the light-emitting diode) (also known as The emitted light 7 is 1 ^, so the part is totally reflected by the semiconductor and air. The light that is guided back is large, and the totally reflected light is absorbed by the internal active layer, electrode, and substrate. Generally, it has the disadvantage of low luminous efficiency. In order to improve the luminous efficiency of light-emitting diodes, research has confirmed that if the surface of a semiconductor is roughened, light can be emitted from the light-emitting layer through a roughened interface and scatter. Phenomenon, coupled with the roughening, increases the area of the light emitting surface, so the probability of light going out will increase significantly. This related technology has been described in the document IEEE Transcations on Electron Devices, 47 (7), 1 492 '2 0 0 0 Revealed, and the document also pointed out that after the light-emitting diode is roughened, its external luminous efficiency can be significantly increased to 40%. Known techniques such as US patents 5 040 044, 5429954, 5898 1 92 Etc., is to achieve the purpose of roughening the epitaxial surface by etching, that is, the surface of the light-emitting element is roughened by chemical etching to achieve the effect of increasing luminous efficiency. However, the above-mentioned conventional techniques can only be applied at this stage Red light led

200307374 V. Description of the invention (2) The material cannot be applied to nitride materials that can produce blue and green light. The reason is that the processing characteristics of red LED materials are simple, and nitride materials have strong resistance. Caused by acid-base characteristics. Although the dry etching method can overcome the problem of wet etching, it is easy to cause damage to the epitaxial layer and cause the resistance of the semiconductor layer to increase. In addition, the semiconductor layer is a single crystal thin film. If it is roughened directly, it may destroy the internal active layer and reduce the light-emitting area. At the same time, it may also damage the external transparent electrode, resulting in discontinuity of the transparent electrode. Due to the influence on the current dispersion, various situations will lead to a reduction in the overall luminous efficiency. In summary, the scope of application of the 'knowledge technique' is quite narrow, and the process technology used to improve the luminous efficiency of the light emitting diode has not yet been cured.疋 Yi ’’s know-how cannot be widely used in the industry without industrial applicability. [Summary of the Invention] The purpose of the present invention is to provide a light emitting diode structure and a manufacturing method thereof, so as to solve the problem that the conventional technology cannot effectively improve the light emitting efficiency of the light emitting diode. For the purpose of j to the above, the light-emitting diode structure of the present invention includes at least a substrate, a mesh layer, which is located above the substrate, and has a 、, 'circle pattern, and a first type semiconductor Layers are on the squares of the grid layer. The first type semiconductor layer is located on the first type semiconductor layer > " Furthermore " The present invention also provides a method for manufacturing the light emitting diode structure.

Page 6 200307374 V. Description of the invention (3) In order to make those skilled in the art understand the purpose, features and effects of the present invention, the following specific embodiments and the accompanying drawings are used to explain the present invention in detail. As follows: [Embodiment] The spirit of the present invention is to grow a grid layer during the epitaxial process of the light emitting diode element, and the grid layer can reflect the light radiated toward the inside of the light emitting diode element and Moving toward the outside, so that not all the light will always travel inside the light-emitting diode element, or even be absorbed by the internal active layer, electrode, substrate, etc., thereby improving the light-emitting diode element's light-emitting efficiency. As shown in Fig. 1, a basic type light emitting diode element 10 having a grid layer 102 is used. In the figure, a light beam generated by the p-η junction 10 6 is totally reflected at the interface between the light-emitting diode element 10 and the air and returns to the inside of the light-emitting diode element 10. When the light beam 1 1 0 reaches the net When the grid layer 102 is affected by the pattern on the grid layer 102, it is reflected back and travels in the direction of the outside, so that the light beam 110 is not absorbed by the substrate 100. Fig. 2 is a plan view of a second embodiment of the light emitting diode structure of the present invention. Each layer in FIG. 2 is deposited using a process of organometallic vapor phase epitaxy to form a light-emitting diode junction in FIG. 2. The method includes the following steps: First, a substrate 200 is provided, and the substrate 20 is provided. The material of 0 can be sapphire (GaSapphir0, silicon carbide (SiC), silicon (Si), gallium arsenide aAs), lithium metaaluminate (LiAIOz), lithium gallate (LiGaOJ and

200307374

Aluminum nitride is connected to the nitride with the Si of the gallium layer. The gallium layer is then directly formed into a stripe of 0 (A1N) in a grid pattern. Attach a buffer point of 500-600 (° C) and made of gallium " aN). The thickness of the layer is 20, and then it grows at 1 0 0 ~ 1 2 0 0 ° C to reach a gallium nitride (GaN) layer 2 04; the thickness is 1 to 2 ( # m) And doped on 204, one of them is to form a grid layer 2 0 6 on the surface of nitrogen 204 to produce a multi-net two-two, lithography process in nitrogen etching or wet etching to make a grid shoulder shape. Graphics, and then a cutter or laser to cut the required grid, and the other method is S 〇nRa-_ grid from θ 'The above methods can make layer 206 have a grid pattern, and the grid The pattern can be made up of any of the groups of rectangles, circles, and triangles. Then, a first-type semiconductor layer 208 is grown on the mesh layer 206, and the first-type semiconductor layer is formed. 2 08 is a layer of (= gallium MaN) layer, so the first type semiconductor layer m is a gallium-doped gallium (GaN) semiconductor layer. Then, the temperature is lowered to 700-900 (° C) to grow an active layer 2 i 0 on the first type semiconductor layer 208. The active layer 2 1 0 can have any of the following structures: pn Junctions, double heterojunctions (DH), single-layer quantum wells (SQw), and InGaN / GaN multilayer quantum wells (MQW). After that, the temperature is increased to 1000-1200 (° C) to grow a second-type semiconductor layer 2 1 2 on the active layer 2 10. The second-type semiconductor layer 2 1 2 has a thickness of 〇 ·; [~ 〇 · 2 (" m) and Mg-doped gallium nitride (GaN) layer 'so the second type semiconductor layer 2 1 2 is a p-type gallium nitride (ga N) half

200307374 V. Description of the invention (5) Conductor layer / This completes the fabrication of a light-emitting diode chip. Finally, the second type semiconductor layer 2 丨 2 and the active layer 2 1 0 are engraved to expose a part of the surface of the first type semiconductor layer 208; and then Ti / Al metal is made on the first type semiconductor layer 20 8 A first electrode 214 is formed on the exposed part of the surface, so the first electrode 21 4 is an n-type electrode; Ni / Au metal is made on the surface of the second type semiconductor layer 21 2 to form a second electrode 2 1 6 'Therefore the second electrode 2 1 6 is a p-type electrode. By performing the above step ', a light emitting diode structure as shown in Fig. 2 can be obtained. In the embodiment described above, in addition to the gallium nitride layer 2 0 4 can be directly deposited using an organic metal vapor phase stupid method (MOCVD), it can also be hydride vapor phase deposition method (HVPE), chemical vapor deposition method (Chemical vapor deposition, CVD) or sputtering (splltter), and other methods are described here. In addition to increasing the light emitting efficiency of the light emitting diode element by growing a grid layer, the present invention can further add a mixed layer to further improve the light emitting efficiency of the light emitting diode element, wherein the mixed layer has at least one layer for diffusion The material of the incident light, that is, the roughened layer, so that the mixed layer has the function of scattering light, and the generation of the roughened layer can be controlled by the following two methods: • One, the use of growth temperature and atmosphere control An interface layer (such as Si N, A 1 N, etc.) is provided with fine holes. Second, a thin film is formed by implanting quantum dots. The above two methods will be implemented in the embodiments of Figs. 3 and 4 respectively. Fig. 3 is a sectional view of a second embodiment of the light emitting diode structure of the present invention. The layers in Figure 3 are made of organometallic gas phase stupid method.

Page 9 200307374 V. Description of the invention (6) (M0CVD) The process of depositing to form the light emitting diode structure of FIG. 3 includes the following steps: First, a substrate 300 is provided, and the substrate 300 The material can be one of Sapphire: Sapphire), silicon carbide (SiC), silicon (Si), gallium arsenide (GaAs), lithium metaaluminate (LiAlOJ, lithium gallate (LiGaOJ, and A1N)). Then, a buffer layer 302 made of gallium nitride (GaN) with a thickness of 20 to 50 (nm) is grown at 500 to 600 (° C). Subsequently, a layer of 1 to 100 in thickness is grown at 1000 to 120 (TC). 2 (μm) and Si-doped gallium nitride (GaN) layer 304, followed by growing a roughened layer 306 with a thickness of 1.00 (run), wherein the material of the roughened layer 306 contains at least Since one of the materials of the group of nitride nitride (SiN), aluminum nitride (a1N) and titanium nitride (TiN), gallium nitride (Gas layer 3 and roughened layer 3 0 6 form a mixture One of the methods of forming a grid on the surface is to use a yellow light lithography process to roughen the layer 3 006 d Shilang 4 to have multiple grids. A mesh pattern, and then a dry etching ^ φ ^ I for the shape of the grid, and the other directly to the tool-based approach

If) 8 and the right grid is required for cutting. The above methods can make the grid layer rectangular, η * grid pattern ', and the grid pattern can be at least grouped by bars, joints, and triangles. Made up of-the person. The first type semiconducting semiconductor layer 310 is on the grid layer 308 ′ gallium nitride (GaN) i ‘bulk two. The first type semiconductor layer 31 0 is a η-type nitrogen.

200307374 V. Description of the invention (7) Then lower the temperature to 700 ~ 900 (° C) to grow an active layer 3 1 2 on the first type semiconductor layer 3 1 0, and the active layer 3 1 2 It can be any of the following structures: pn junction, double heterojunction (DH), single-layer quantum well (SQW), and InGaN / GaN multilayer quantum well (MQW). Then increase the temperature to 1000 ~ 1200 (° C) to grow a second type semiconductor layer 3 1 4 on the active layer 3 1 2 and a second type semiconductor layer 3 1 4. The thickness of the layer is 0 · 1 ~ 0 · 2 (/ zm) and Mg-doped gallium nitride (GaN) layer, so the second type semiconductor layer 314 is a p-type gallium nitride (GaN) semiconductor layer, so the light emitting diode is completed. Body Lei Wafer. Finally, the second type semiconductor layer 3 1 4 and the active layer 3 1 2 are etched to expose a part of the surface of the first type semiconductor layer 310; and then Ti / Al metal is fabricated on the first type semiconductor layer 310 and exposed. A first electrode 316 is formed on part of the surface, so the first electrode 316 is an n-type electrode; Ni / Au metal is made on the surface of the second-type semiconductor layer 3 1 4 to form a second electrode 3 18, so the second electrode 3 丨 8 is a p-type electrode. By performing the above steps, a light emitting diode structure as shown in FIG. 3 can be obtained. In addition to the roughened layer 3 0 6 produced in the above embodiment, in addition to being directly deposited by an organic metal vapor phase epitaxy (MOCVD) method, a multilayer film evaporation method (such as the E-gun multilayer film evaporation method, etc.) can also be used. ), Chemical vapor deposition '(CVD), or sputter, etc., are specifically described here. Fig. 4 is a sectional view of a third embodiment of the light emitting diode structure of the present invention. Each layer in FIG. 4 is also deposited by an organic metal vapor phase epitaxy (MOCVD) process to form a light-emitting diode junction in FIG. 4.

Page 11 200307374 V. Description of the invention (8) The manufacturing method of the structure includes the following steps: First, a substrate 400 is provided, and the material of the substrate 400 can be sapphire, silicon carbide (SiC), silicon (Si), One of gallium arsenide (GaAs), lithium metaaluminate (LiAIOz), lithium gallate (LiGaOO, and aluminum nitride (A1N)). Next, grow a layer at a thickness of 500 to 600 (° C) to a thickness of 1 to 100. (nm) gallium nitride (GaN) -based buffer layer 402. Subsequently, a layer 1 to 2 (// m) of Si-doped gallium nitride (GaN) layer 404 was grown at 1000 to 1200 (° C). Next, grow a roughened layer 406 with a thickness of 1 ~ 100 (nm) and AluGa (1tV) InvN quantum dots, where your u and v parameters range: 〇 $ u, v < 1 and 0 $ u + v & lt 1, so the gallium nitride (GaN) layer 404 and the roughened layer 406 form a mixed layer; then a grid layer 408 is formed on the roughened layer 406, one of which is to use yellow light micro The shadowing process produces a mesh pattern with multiple grids on the surface of the roughened layer 406, and then uses dry or wet etching to make the shape of the grid, and another method is straight The grid required for cutting with a cutter or laser can all make the grid layer 408 have a grid pattern, and the grid pattern can be at least composed of bars, rectangles, circles, and triangles. The first type semiconductor layer 41 is grown on the grid layer 40 8, and the first type semiconductor layer 410 is a layer with a thickness of 3 (# m) and doped si. GaN layer, so the first type semiconductor layer 41 0 is an n-type gallium nitride (GaN) semiconductor layer. Then lower the temperature to 70 0 ~ 9 0 0 (. 0) to grow an activity Layer 412

Page 12 200307374

On the first type semiconductor layer 41 〇, the active layer 412 may have the following structure: p_n junction, double heterojunction (DH), single-layer quantum well, and InGaN / GaN multilayer quantum well (MQW); High-temperature production 100 0 ~ 1 2 0 0 (. (:), to grow a second type semiconductor layer 4 丨 4 on the layer 412, the second type semiconductor layer 414 is a layer with a thickness of 〇1 ~ 〇 ^ // m) and a Mg-doped gallium nitride (GaN) layer, so the second type body layer 41 4 is a p-type gallium nitride (GaN) semiconductor layer, so that a light-emitting monopolar wafer is completed. Finally, the second-type semiconductor exhibition 414 and the active layer 412 are engraved to expose the portion & surface of the first-type semiconductor layer 410; and then Ti / Al metal is made on the first-type semiconductor layer 41o. A first electrode 416 is formed on the exposed part of the surface, so the first electrode 416 is an n-type electrode; Ni / Au metal is made on the surface of the second type semiconductor layer 4 丨 4 to form a second electrode. 418, so the second electrode 418 is a p-type electrode. By performing the above steps, a light emitting diode structure as shown in FIG. 4 can be obtained. As can be understood from the above embodiments, since the present invention mainly grows a grid layer during the process of epitaxial light-emitting diode elements, it can also further grow a mixed layer with a roughened layer, compared with the conventional method. After the epitaxial is completed, the knowledge and technology is subjected to subsequent roughening treatment. It can be seen that the process used in the present invention is more convenient and can effectively simplify the steps of the process, so it has progressive repair and industrial applicability. Although the present invention has been disclosed above with at least one specific embodiment, it is not intended to limit the present invention. Anyone skilled in the art can make various changes and decorations without departing from the spirit and scope of the present invention. invention

Page 13 200307374 V. The scope of protection of the invention description (ίο) The following is the subject of the scope of the patent application attached to it: ιβι Page 14 20030374 Brief description of the diagram Figure 1 shows a basic type of light emission with a grid layer Sectional view of a diode element. Fig. 2 is a sectional view of a first embodiment of the light emitting diode structure of the present invention. Fig. 3 is a sectional view of a second embodiment of the light emitting diode structure of the present invention. Fig. 4 is a sectional view of a third embodiment of the light emitting diode structure of the present invention. Description of drawing numbers 10 Light emitting diode element 1 0 0 Substrate 10 2 Grid layer 104 η-type semiconductor layer 10 6 ρ-η junction 1 0 8 ρ-type semiconductor layer 110 Beam 2 0 0 Substrate 2 0 2 Buffer layer # 2 04 GaN layer 2 0 6 Mesh layer 2 0 8 First type semiconductor layer 210 Active layer

Page 15 200307374 Brief description of the diagram 212 Second type semiconductor layer 214 First electrode 216 Second electrode 3 0 0 Substrate 3 0 2 Buffer layer 3 04 Gallium nitride (GaN) layer 3 0 6 Roughened layer 3 0 8 Grid layer 310 First type semiconductor layer 31 2 Active layer _ 314 Second type semiconductor layer 316 First electrode 318 Second electrode 4 0 0 Substrate 4 0 2 Buffer layer 404 Gallium nitride (GaN) layer 40 6 Quantum Point roughening layer 4 0 8 Mesh layer 410 First type semiconductor layer 41 2 Active layer 414 Second type semiconductor layer 4 1 6 First electrode 418 Second electrode

Page 16

Claims (1)

200307374 6. Scope of patent application 1. A light-emitting diode structure including at least: a substrate; a grid layer located above the substrate and having a grid pattern; a first type semiconductor layer located at Above the grid layer; a second type semiconductor layer is located above the first metamorphic semiconductor layer. ^ The light-emitting diode structure described in item 1 of the scope of the patent application, wherein the and the perimeter pattern are composed of at least any one of a group consisting of a bar, a rectangle, a circle, and a triangle. It includes the light-emitting diode structure as described in item 1 of the scope of patent application, and further t A an active layer is located between the first type semiconductor layer and the second type + conductor layer. 1 The light-emitting diode structure as described in item 丨 of the patent application scope, wherein the two (f material can be any of the following: sapphire (carbon) (L·lC), stone (Si), arsenic Gallium (GaAs), lithium metaaluminate 1 100, gallium bicarbonate (LiGaOJ, and aluminum nitride (A1N). 如 _ _ The light emitting diode structure as described in item 1 of the patent application &patent; The L semiconductor layer is an n-type gallium nitride (GaN) semiconductor layer. 200307374 6. Scope of patent application 6. The light emitting diode structure described in item 1 of the scope of patent application, wherein the second type semiconductor layer is a P-type gallium nitride (GaN) semiconductor layer. 7. The light-emitting diode structure described in item 3 of the scope of the patent application, wherein the active layer can be any of the following structures: pn junction, double heterojunction (DH), single-layer quantum well (SQW), and Multi-layered quantum wells (MQW). 8. A light-emitting diode structure, comprising at least: a substrate; a mixed layer located above the substrate; the mixed layer has at least a roughened layer for diffusing incident light; a grid layer is located at Above the mixed layer and having a grid pattern; a first type semiconductor layer located above the grid layer; a second type semiconductor layer located above the first type semiconductor layer . ^ The light-emitting diode structure as described in item 8 of the scope of the patent application, wherein the and the perimeter pattern are composed of at least any one of a group consisting of a bar, a rectangle, a circle, and a triangle. The step S applies for the light-emitting diode structure described in item 8 of the patent scope. Further, the last active layer is located between the first-type semiconductor layer and the second plastic-state + conductor layer. Page 18 200307374 6. Scope of patent application 11. The light-emitting diode structure described in item 8 of the scope of patent application, wherein the material of the substrate can be any of the following: sapphire (Sapphire / ', silicon carbide (SiC), silicon (Si ), Gallium arsenide (GaAs), metaaluminate aluminate (LiAlOJ, marry acid chain (LiGaOj, and nitride nitride (A1N). 1) The light-emitting diode structure described in item 8 of the scope of patent application, wherein the The material of the roughened layer contains at least one material selected from the group consisting of silicon nitride (SiN), aluminum nitride (A1N), and titanium nitride (τiN). 1 3. As for the scope of patent application The light-emitting diode structure according to item 8, wherein the roughened layer has A1 uGaUtV) InvN quantum dots, and the range of u and v parameters is QS u, v < 1 and 〇 $ u + v < 1. 4. The light-emitting diode structure according to item 8 in the scope of patent application, wherein the first type semiconductor layer is a gallium nitride (GaN) semiconductor layer. 1 5. As described in item 8 of the scope of patent application Light emitting diode structure, wherein the second type semiconductor layer is a p-type gallium nitride (GaN) semiconductor layer. The light-emitting diode structure according to item 10, wherein the active layer system can be any of the following structures: ρ-η junction, double heterojunction (DH), single-layer quantum well (SQW), and multilayer quantum well (MQW). Page 19, 200307374 VI. Scope of patent application-1 7. A light-emitting diode structure at least includes: a substrate; the mixed layer has at least and has a grid and a buffer layer formed on the substrate; a hybrid Layer, formed on the buffer layer with a roughened layer for diffusing incident light; a grid layer, formed on the mixed layer pattern; a first type semiconductor layer, formed on the grid layer ≪ 1 An active layer is formed on the first type semiconductor layer; a second type semiconductor layer is formed on the active layer. 18. The light-emitting diode structure according to item 7 of the scope of the patent application, wherein the grid pattern is composed of at least any one of a group consisting of a stripe, a rectangle, a circle, and a triangle. 19. The light-emitting diode structure as described in item 17 of the scope of patent application, wherein the material of the substrate can be any of the following: sapphire (Sapph i re), silicon carbide (SiC), silicon (Si), GaAs, lithium metaaluminate < 1 (LiAlOD, lithium gallate (LiGaOp, and aluminum nitride (A1N)). 20. The light emitting diode structure as described in item 17 of the scope of patent application, wherein The material of the buffer layer is gallium nitride (GaN) ° 2 1. The light-emitting diode structure described in item 17 of the patent application scope Page 20, 200307374 VI. Patent application scope Aluminum nitride The material of the roughened layer contains at least one selected from the group consisting of silicon nitride (S i N) '' A 1 N) and titanium nitride (T i N) One of the materials 2 2. The light-emitting diode structure described in item 17 of the scope of patent application, wherein the roughened layer has MuGa (1iv) InvN quantum dots, and the range of u and v parameters is u, v < 1 and OS u + vV < 1. 23. The light-emitting diode structure described in item 7 of the scope of the patent application, wherein the first type semiconductor layer is an n-plastic gallium nitride (GaN) semiconductor layer. 24. The light-emitting diode structure according to item 17 in the scope of the patent application, wherein the second type semiconductor layer is a gallium nitride (GaN) semiconductor layer. 25. The light-emitting diode structure described in item 17 of the scope of the patent application, wherein the active layer can be any of the following structures: pn junction, double heterojunction (DH), single-layer quantum well (SQW) And multilayer quantum wells (MQW). 26. A method for manufacturing a light emitting diode, comprising the following steps: (a) providing a substrate; (b) forming a buffer layer on the substrate, (c) forming a gallium nitride layer on the buffer layer; ( d) forming a grid layer on the gallium nitride layer; (e) forming a first type semiconductor layer on the grid layer; (f) forming an active layer on the first type semiconductor layer; Page 21 200307374 6. Scope of Patent Application (g) A second type semiconductor layer is formed on the active layer. 27. The method for manufacturing a light-emitting diode according to item 26 of the scope of patent application, further comprising the following steps: (h) etching the second-type semiconductor layer and the active layer to violently produce the first type A part of the surface of the semiconductor layer of the first type; "path (i) forming a first electrode on the part of the surface of the first type semiconductor layer exposed; and (j) forming a second electrode of the second type semiconductor layer surface. < 1 28. The method for manufacturing a light emitting diode as described in item 27 of the scope of the patent application, wherein the first electrode is an _ electrode. 29. The method for manufacturing a light emitting diode as described in item 27 of the scope of the patent application, wherein the second electrode is a p-type electrode. 30. The method for manufacturing a light-emitting diode as described in item 26 of the scope of the patent application, wherein the step (b) is to grow a layer of nitrogen with a thickness of 20 to 50 (nm) at 500 to 600 (° C). Buffer layer made of gallium (GaN). 3 1. The manufacturing method of the light-emitting diode as described in item 30 of the scope of patent application, wherein the step (c) is from 1000 to 120 (TC grows to a thickness of 2 (in m) and is mixed with A hetero-Si gallium nitride (GaN) layer. Page 22 200307374 6. Scope of Patent Application It is the moment of the manufacturing method of the light-emitting diode described in the item λ 32, where the step (d) is to use the yellow micro-manufacturing method or fish-type etching to make the shape of the grid. The diagram L uses dry money 33, the method of manufacturing a light-emitting diode as described in item 31 of the patent application, where step (d) is a method for cutting the gallium nitride sound directly with a knife or laser. Required grid. 34. The manufacturing method of the light emitting diode as described in item 32 or item 33 of the scope of patent application, wherein step (e) is to grow a layer at a thickness of 1000 to 120 0 ° C to a thickness of 1 to 2 (// m) and a Si-doped gallium nitride (GaN) layer. 35. The method of manufacturing a light-emitting diode as described in item 34 of the scope of patent application, wherein the step (0 is in the range of 7 0 to 9 0 0 (° C) to grow the active layer 0 3 6, as in the application The manufacturing method of the light-emitting diode described in the 35th item of the patent scope, wherein the step (g) is grown at a thickness of 1000 ~ 1200 (° C) to a thickness of 0.1; 1 ~ 〇 · 2 (// m) and a Mg-doped gallium nitride (GaN) layer. 37. The method for manufacturing a light emitting diode as described in item 26 of the patent application scope, wherein the growth of the gallium nitride layer uses any of the following methods :hydrogenation 200307374 Chemical Vapor Deposition (CVD) Sputtering VI. Patent application scope Vapor Deposition Method (HVPE) method (Sputter) 〇 38, The manufacturing method of the light emitting diode as described in Item 37 of the scope of patent application, The chemical vapor deposition method is an organic metal vapor phase epitaxy method (MOCVD). 39. A method for manufacturing a light emitting diode, comprising the following steps: (a) providing a substrate; Φ (b) forming a buffer layer on the substrate; (c) forming a mixed layer on the buffer layer; d) forming a grid layer on the mixed layer; (e) forming a first type semiconductor layer on the mixed layer; (f) forming an active layer on the first type semiconductor layer; (g) A second type semiconductor layer is formed on the active layer. 40. The method for manufacturing a light-emitting diode according to item 39 of the scope of patent application, further comprising the following steps: (h) etching the second-type semiconductor layer and the active layer to expose the first-type semiconductor layer; (I) forming a first electrode on a portion of the surface of the first type semiconductor layer exposed; (j) forming a second electrode on the surface of the second type semiconductor layer. Page 24 200307374 6. Scope of patent application 41. The method for manufacturing a light emitting diode as described in item 40 of the scope of patent application, wherein the first electrode is an n-type electrode. 42. The method for manufacturing a light emitting diode as described in item 40 of the scope of patent application, wherein the second electrode is a P-type electrode. 4 3. The method for manufacturing a light-emitting diode as described in item 39 of the scope of the patent application, wherein step (b) is to grow a layer at a thickness of 50 to 60 (° C) to 20 to 50 ( nm) buffer layer made of gallium nitride (GaN). 44. The method for manufacturing a light emitting diode as described in item 43 of the scope of patent application, wherein step (c) includes at least: growing a layer at a thickness of 1 to 100 (nm) at 100 to 100 ° C (nm) ) Step of roughening the layer. 45. The method of manufacturing a light-emitting diode as described in item 44 of the scope of the patent application, wherein step (d) is performed at a temperature of 1 0 0 ~ 1 2 0 0 ° C to grow a layer with a thickness of 2 (// m) And a Si-doped gallium nitride (GaN) layer. 46. The method of manufacturing a light emitting diode as described in item 45 of the scope of patent application, wherein the step (e) is performed at 700 to 900 (° C) to grow the active layer. 4 7. The manufacturer of the light-emitting diode as described in item 46 of the scope of patent application Page 25, 200307374 VI. Scope of Patent Application " One ~ Method ', where step (f) is from 1 0 0 0 to 1 2 0 0 (t :) to grow a layer with a thickness of 0.1 · 0.2 (// m) And jjg doped gallium nitride (GaN) layer. 4 8. The manufacturing method of the light-emitting diode as described in item 39 of the scope of patent application, wherein the step (b) is to grow a layer of nitrogen at a thickness of 1 to 100 (nm) at 500 to 600 (° C). Buffer layer made of gallium (jaN) material. 4 9. The method of manufacturing a light-emitting diode as described in item 48 of Shen Qing's patent scope, wherein the step (c) includes at least 1000 to 120 °. C. A step of growing a roughened layer with a thickness of 1 to 100 (11111) and a human 11 ^ (1_11_〇11 ^ quantum dot), wherein the range of u and v parameters is OS u, v < 1 and 〇 $ u + v < 50. The method for manufacturing a light-emitting diode as described in item 49 of the scope of patent application, wherein step (d) is performed at a temperature of 100 ~ 1 2 0 0 ° C to grow a layer of thickness 2 (# m) and a Si-doped gallium nitride (GaN) layer. 51. The method for manufacturing a light-emitting diode as described in item 50 of the scope of patent application, wherein the step (e) is in the range of 700-500. 9 0 0 (° c) to grow the active layer 0 5 2. The method for manufacturing a light emitting diode as described in item 51 of the scope of patent application, wherein this step (0 is from 1 0 0 0 to 1 2 0 0 (. (:) grows a thick layer Is 0 · 1~0.2 (v JJJ) and Mg-doped gallium nitride (GaN) layer. Page 26, 200307374 VI. Patent application scope 53. The manufacturing method of the light-emitting diode as described in item 44 or item 49 of the patent application scope, wherein the growth of the roughened layer can use any of the following methods: Multi-layer Film evaporation method, chemical vapor deposition method (CVD), sputtering method 05. The method for manufacturing a light-emitting diode as described in claim 53 of the patent application scope, wherein the multilayer film evaporation method E-gun multilayer film evaporation method. 5 5. The method for manufacturing a light-emitting diode according to item 53 of the scope of the patent application, wherein the chemical vapor deposition method is an organic metal vapor phase epitaxy method (MOCVD). Page 27