SU978336A1

SU978336A1 - Pulse duration selector

Info

Publication number: SU978336A1
Application number: SU813307387A
Authority: SU
Inventors: Валентин Сергеевич Мельников
Original assignee: Предприятие П/Я Г-4598
Priority date: 1981-06-26
Filing date: 1981-06-26
Publication date: 1982-11-30

Description

(54) СЕЛЕКТОР ИМПУЛЬСОВ ПО ДЛИТЕЛЬНОСТИ(54) SELECTOR OF PULSES OF DURATION

1one

Изобретение ai-носитс к импульсной технике и может быть использовано в устройствах обработки сигналов импульсных многоканальных телеметрических систем.The invention of ai-ness to a pulse technique and can be used in signal processing devices of pulsed multichannel telemetry systems.

Известен селектор импульсов по длительности , содержащий линию задержки, элементы И и ИЛИ 1.Known selector pulses in duration, containing the delay line, the elements of AND and OR 1.

Это устройство обеспечивает восстановление длительности селект фуемого импульса на выходе устройства, но вырабатывает ложные вь ходные импульсы, если интервал следовани импульсов помехи приблизитель.но равен времени задержки сигнала линией задерлжи.This device restores the duration of a selectable pulse at the output of the device, but produces false input pulses if the interfering pulse interval is approximately equal to the delay time of the signal by the delay line.

Из известных устройств наиболее близ- ,j КИМ по технической сущности к предлагаемому вл етс селектор импульсов по I длительности, содержащий регистр сдвига и генератор тактовых импульсов, вьосод которого соединен со входом синхрониза- 20 ПИИ регистра сдвига. Кроме того, в этом устройстве выход регистра сдвига через инвертор соединен с первыми входами выходных элемешов совпадени , вторые входы которых соединены со входной шиной устройства (одной - непосредственно, другой - через инвертор), информационный вход регистра сдвига черезтриггер и форМ1фователь импульсов соединен также со входной шиной устройства 2.Of the known devices, the closest j to the CMM to the proposed invention is a pulse selector of duration I, containing a shift register and a clock pulse generator, the clock of which is connected to the clock input of the FDI shift register. In addition, in this device, the output of the shift register through the inverter is connected to the first inputs of the output matching elements, the second inputs of which are connected to the input bus of the device (one directly, the other through the inverter), the information input of the shift register through the trigger and the pulse generator are also connected to the input bus device 2.

Недостаток швестного устройства состоит в том, что он не обеспечивает восстановление длительности селект1фуемого импульса.The disadvantage of the known device is that it does not provide recovery of the duration of a selectable pulse.

Цель изобретени - восстановление длительности селектируемого импульса на выходе устройства при со фанении устойчивости к лмпулЬсам помехи.The purpose of the invention is to restore the duration of a selectable pulse at the output of the device while sustaining impediments to interference.

Claims

The goal is achieved in that the device containing the shift register and the clock pulse generator, the output of which is connected to the synchronization input of the shift register, is entered into the AND element and the OR-NOT element, the first input of which is connected to the input bus of the device and the information input of the shift register the second input is connected to the output bus of the device and the output of the shift register 397, the element MLN-11B is connected to the first input of the AND element, the input of which is connected to the output of the clock generator, and the output to the reset input a shift register. Pulse selector on pinhole is equipped with Savig register, clock generator, OR-NOT element, AND element, output and two input buses. In the absence of pulses on the input and output devices of the device, the clock pulses of the generator arrive through the AND element at the register reset input, confirming its initial state. When a pulse arrives at the input bus, the signal from the output of the OR-NOT element aanpeuiaeT passes the clock pulses to the register reset input, which ensures the pulse propagation through the register as well as generator oscillators. If the input pulse duration is shorter than the pulse delay time in the register, then at the end of the pulse on the input bus, the clock pulses, the generator pass through the element and set the shift register to its original state, while the pulse in the shift register is erased. If the input pulse duration is longer than the pulse delay time in the shift register, a pulse on the output bus will occur before the end of the pulse on the input bus, while a ban on the passage of clock pulses through the element will lead to an end of the pulse on the output bus. In this case, the duration of the output pulse will be equal to the duration of the input pulse with an accuracy up to the period of the following clock pulses. .; 4 Thus, the proposed 1 st pulse spedor by duration durations the storage of information contained in the duration of the selectable pulse, and the forced reset of the register to its initial state (with no pulse at the input and output of the device) provides resistance to impulse noise. Claims of the invention Pulse selector by duration, containing shift register and clock generator, the output of which is connected to the register synchronization input, shift, characterized in that / with the goal, restoring the duration of a selectable pulse at the device output while maintaining resistance to interference pulses , an AND element and an OR-NOT element are entered into it, the first input of which is connected to the input bus of the device, and the information input of the shift register, and the second input is connected to the output bus of the device and the output the shift register, the output of the element OR is NOT connected to the first input of the element I, the second input of which is connected to the output of the clock pulse generator, and the output to the reset input of the shift register. I Sources of information taken into account in expert analysis 1.Authorial certificate of the USSR No. 748845, cl. N OZ K 5/18, 05.01.78.

2. USSR author's certificate number 481128, cl. H 03 K 5/18, 08.28.73 (prototype).