SU913376A1 - Non-linear time probability converter - Google Patents

Description

The invention relates to computing and can be used in the implementation of nonlinear dependencies in stochastic computers.

Known non-linear converters that convert a random sequence of binary symbols into a digital code, the mathematical expectation of which is proportional to a given function of the probability of the appearance of a pulse in the input stream.

A nonlinear converter is known that contains a generator of uniformly distributed random numbers, registers, a code-like type probability converter, AND elements, counters, and a PZ trigger.

However, this converter is characterized by low accuracy, since it is built on the basis of the stochastic principle.

Also known converter containing registers, comparison circuits.

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counters, pseudo-random number generator [21.

However, this converter has a low speed, since it is built according to an open circuit.

The closest technical solution to this invention is a nonlinear transducer containing the first and second counters, the first element And the first input of which is connected to the first input of the converter, and the output to the first input of the first counter, the second element And whose output is connected to the first input the second counter, the third and fourth elements And, the outputs of which are connected to the second inputs of the first and second counters, respectively, the first and second random sequence generators, the first and second blocks are compared the first group of inputs of which are connected to the first group of outputs of the first and second counters, respectively, and the second group

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the inputs of the first and second comparison blocks are connected to the outputs of the first and second random sequence generators, respectively, the outputs of the first and second comparison blocks are connected to the first inputs of the third and fourth And elements, respectively, a trigger, the first input of which is connected to the second input of the converter, and the second input is to the second output of the first counter, the third input of the converter is connected to the first input of the second element And, the second inputs of the first, second, third and fourth elements And combined together e and connected to the output of flip-flop [3].

However, this converter has a low computation accuracy, since it is based on stochastic integrators with positive feedback. The known converter is intended solely for performing a probability division operation and therefore allows solving a narrow class of problems.

The purpose of the invention is to improve the accuracy and enhancement of functionality due to the implementation of a wide class of reproducible nonlinear dependencies between random input sequences.

This goal is achieved by the fact that a nonlinear time-for-variability converter containing a random sequence generator, a clock pulse generator, the first output of which is connected to the input of a random sequence generator, the first and second counters, the first, second, third and fourth elements and the third elements And are connected respectively to the first input of the first counter, the first input of the second counter and the second input of the first counter, the trigger, the first input of which is start second input of the converter, the second input is connected to the overflow output of the second counter, and the output is connected to the first inputs of the first, second, third and fourth elements And, the second input of the first element And is the input of the first random sequence of the converter, additionally contains the first and second adders, the first and second clever ·

913376

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residents, the first and second blocks of elements And, the first and second elements OR, and the outputs of the random sequence generator are connected

5 with the first groups of inputs of the first and second blocks of elements I, the second groups of inputs of which are connected to groups of outputs of the lower digits of the first and second, respectively

Yu counters, and outputs - with the inputs, respectively, of the first and second elements OR, the outputs of the first and second elements OR are connected to the transfer inputs, respectively, of the first

, 5 and the second adders, the bit inputs of which are connected to the groups of outputs of the higher digits of the first and second counters, respectively, the clock inputs are connected to the second

The output of the fourth element And is connected to the input of the second multiplier, the output of which is connected to the second input of the second counter, the third output of the generator of clock pulses is connected to the third inputs of the first and the second counter, the input of the first multiplier is the input of the second random sequence of the converter, and the output is connected to the second input of the second element I.

FIG. 1 is a block diagram.

³⁵ converters; in fig. 2 is a diagram of a random sequence generator, 'in FIG. 3 "multiplier.

The converter contains the first

₄₀ element 1 AND, first counter 2, first block 3 elements AND, first element 4 OR, first adder 5, trigger 6, generator 7 clock pulses, generator 8 random sequences, first multiplier 9>

⁴⁵ second element 10. And, the third element 11 And, the second multiplier 12, the second counter 13, the second adder 14, the fourth element 15 Id the second block 16 elements And, the second element 1 7 OR, inputs 18, 19 and

⁵⁰ 20 converters.

The second input of the first element 1 And is connected to the input 18 of the Converter, and the output of the element 1 And connected

⁵⁵ to the first input of the first counter 2, the second input of which is through the third element 11 And is connected to the output of the first adder 5 · The second input of the second 5

element 10 And through the first multiplier 9 is connected to the input 20 of the Converter, and the output of the element 10 And connected to the first input of the second counter 13, the second input of which is connected to the output of the second multiplier 12. The first input of the trigger 6 is connected to the starting input 19 of the converter, and the second the trigger input is connected to the overflow output of the second counter 13. The output of the trigger 6 is connected to the first inputs of the first 1, second 10, third 11 and fourth 15 elements And, and the output elements connected to the input of the second multiplier 12. First generator output 7 clock pulses connected to the generator input 8 random sequences, the second generator output 7 is connected to the clock inputs of the first 5 and second 14 adders, and the third generator output 7 is connected to the third inputs of counters 2 and 13- the second groups of inputs of the first 3 and second 16 blocks elements And connected with groups of junior. the bits of the first 2 and second 13, respectively, of the counters, the group of outputs of the most significant bits of which are connected to the bit inputs of the first 5 and second 14 adders, respectively. The outputs of the generator 8 random sequences are connected with the first groups of inputs of blocks

13 and 16 elements are And, and the outputs of blocks 3 and 16 are combined respectively by the first 4 and second 17 elements OR. The outputs of the elements OR 4 and 17 are connected to the transfer inputs of the adders 5 and

14 respectively, and the output of the adder 14 is connected to the second input of the fourth element 15 I.

The random sequence generator 8 (see FIG. 2) contains an η-bit random number generator 21, the bit inputs of which are connected to the input of the generator 8, a block of 22 And elements and a block of 23 And elements, with the first input of 22c and 23c And elements connected. the second output of the first discharge of the generator 21, and the first input of each subsequent element And blocks 22 and 23 is connected to the output of the previous element And block 22, the second inputs of elements And blocks 22 and 23 are connected to the first and second discharge outputs of the generator 21, respectively, the output of the first discharge 9133766

Yes generator 21 and the outputs of elements And block 23 are the outputs of a random sequence generator b. The multiplier 9 (see Fig. 3) contains the register 24 and the accumulating adder 25 ″ whose first input is connected to the input 26 of the multiplier, and the discharge inputs to the outputs of the register. 24, the output of the adder 25 is the output of the multiplier.

The Converter operates as follows.

Upon receipt of a signal, the Start to the input 19 of the converter trigger 6 15 goes into one state and allows the passage of signals through the elements 1, 10, 11, 15 I. Let the probabilities of occurrence of single characters in the input random sequences received at the inputs 18 and 20 of the converter are equal to P , (ι) and Р ₂ (£), respectively. Then, random sequences are received at the first summing input of counters 2 and 13, the probabilities of occurrence of single symbols in which are (ί) and AP _a (c), respectively. The multiplication of the probability Р ₂ (¢) by a factor A, less than one, is performed by 30 first multiplier 9 ·· The positive feedback circuit to the second summing input of counters 2 and 13 receives the sequences from the outputs of elements 11 and 15 I. If you think that comma is fixed before the high-order digit of the numbers in counters 2 and 13, then the probabilities of the appearance of single characters at the output of elements 11 And 15 And equal 40 to the expected value of the counters 2 and 13, respectively. The overflow signals of the accumulating adder 5 form a sequence (¢), a single character in which is formed at those discrete moments C, when after the next addition cycle, the sumM becomes equal to or greater than one. Accordingly, C, (ί) “sequence-.

₅₀ overflow signals adder 14.

Introduction to the converter circuit of adders 5 and 14 allows to increase the accuracy of computations by comparison with the known; Since the subsequent successive ⁵⁵ (¢) and ν ^ ₂ (ΐ), arriving at the second inputs of the counters 2 and 13 are kvaeiregulyarnuyu structure, whereas in the known

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the sequences are random and the variance is much larger.

The generator 8, blocks 3 and 16 elements AND and elements 4 and 17 OR function as blocks of probabilistic rounding of the low-order digits of counters 2 and 13. Introduction of probabilistic rounding of numbers reduces the capacity of adders 5 and 14 without compromising the accuracy of the calculations, because with probabilistic rounding error does not accumulate.

When the contents of counter 13 becomes equal to one, a counter overflow signal occurs. This signal sets the trigger 6 to the zero state, and the operation of the converter ends there. The result of the conversion Ζ ₄ (ΐ) is in the first counter 2.

Obtained as a result of experimental studies of the exact characteristics of the proposed converter and the computer-known method of statistical tests with the number of experiments K-1000, the values of the estimated standard deviation of the output value / ι ( _η ) are given in Tables 1 and 2, respectively. In the simulation, both compared devices operate in the probability division mode, and the counters and adders are equal to 9 for the proposed device.

For a known device.

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The tables show that the standard deviation of the code,

removed from the output of the proposed device, less than the mean square15 is the ratic deviation of the output value of the known. Therefore, the proposed device has higher accuracy characteristics than the known.

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In addition, the scheme of the proposed device allows, in contrast to the known one, with the help of which it is possible to perform only the operation of re23 probability of probabilities, to change the form of the real nonlinear dependence Μ [Ζ>, (ί _η )], ie greatly expand the functionality.

Table 1

[0,1 0.2 0.3 ν 0.5 0.6 0.7 0.9 0,018 0.023 0.027 0.029 oz о 0.031 0.030 0.8 0,019 0.027 0.030 0.033 0.036 0.035 0.035 Tabl and c a 2 *> \ ^Ι I θ " ¹ | 0.2 0.3 ' 0.4 I 0,5 [· 0.6 0.7 0.9 0.021 0.029 0.034 0.036 0.039 0.041 0.041 0.8 0.023 0.031 0.036 0.041 0.045 0.047 0.049

Claims (1)

Claim Nonlinear time-probabilistic converter containing a random sequence generator, clock generator, the first output of which is connected to the input of a random sequence generator, the first and second counters, the first, second, third and fourth elements And, the outputs of the first, second ⁵⁰ and the third elements And are connected respectively to the first input of the first counter, the first input of the second counter and the second input of the first counter, a trigger, the first input of which is the starting input to the converter, the second input is connected to the overflow output of the second counter, and the output is connected to the first 913376 ten the inputs of the first, second, third and fourth elements And, the second input of the first element And is the input of the first random sequence of the converter, distinguished by the fact that, with the aim of increasing the accuracy and expanding the functionality by implementing a wide class of reproducible nonlinear curls-> 0 bridges between input random sequences, contains. the first and second adders, the first and second multipliers, the first and second blocks of the AND elements, the first and second 5 5 elements of OR, and the outputs of the random sequence generator are connected to the first groups of inputs of the first and second blocks of AND elements, the second groups of inputs of which are connected with groups of low-order outputs, respectively, of the first and second counters, and outputs - with the inputs of the first and second OR elements, respectively, the outputs of the first and 25 second OR elements are connected to the transfer inputs of the first and second, respectively o adders, bit inputs of which are connected to groups of high-order outputs, respectively, of the first and second counters, clock inputs are connected to the second output, * clock pulse generator, and outputs are connected to the second inputs of the third and fourth elements, respectively, and output of the fourth element, I, is connected to the input of the second multiplier, the output of which is connected to the second input of the second counter, the third output of the clock pulse generator is connected to the third inputs of the first and second counters, the input of the first multiplier S THE input of the second inverter random sequence, and an output coupled to a second input of the second element I.