SU906014A1 - Device for phase starting of receiver - Google Patents

Description

one

The invention relates to radio engineering and can be used in information transmission systems.

A device for phase-starting a receiver is known, comprising a series-connected control trigger, a clock pulse generator; and a counter, the output of which is connected to the input of the control trigger, as well as a series-connected coincidence element and a decoder 1}.

However, the known device has insufficient noise immunity.

The invention of the invention is improving noise immunity.

The goal is achieved by the fact that a receiver phase start device containing a serially connected control trigger, a clock pulse generator and a counter, the output of which is connected to the first input of the control trigger, as well as a serially connected coincidence element and a decoder, are sequentially connected

Signal analyzer, the first delay line and the AND element, as well as the second delay line, to the input of which the output of the counter is connected, with the output of the second delay line and the outputs. (the counter is connected to the corresponding inputs of the decoder, the first input of the match element is combined with the first control input of the control trigger, and the second input of the match element

10 is combined with the output of the first delay line and with the second control input of the control trigger, the other two inputs of which are connected respectively to another output of the signal analyzer,

5 combined with the second input element And, and the input of the first delay element, and the output element And connected to the auxiliary input of the decoder.

The drawing shows the structures20 on the electrical circuit of the proposed device.

The device comprises a clock pulse generator 1, a counter 2, a decoder 3, a coincidence element 4, a signal analyzer 5, a control trigger 6, an element 7, and a delay line 8 and 9.

The device works as follows.

When the first trigger pulse arrives from the communication line, the analyzer 5 generates a signal at the output 10 and the trigger goes into one state, and

At the output of flip-flop 6, a potential signal appears, which turns on 1 clock pulse generator. The pulses from the output of the generator 1 are fed to the counting input of the counter 2. In the latter, sequentially formed combinations of an ordinary binary code, the weight values of which are determined by the number of incoming pulses. Upon receipt of a second pulse from the communication line, a signal appears at the output 11 of the analyzer 5, which causes the trigger 6 to switch to the initial zero state. As a result, this clock generator 1 is turned off, and counter 2 records a combination of a binary code corresponding to a certain information time interval iji-i o D (p is the tracking period of the generator of impulses. The duration of the 1 st term corresponds to the selective start of the j-th receiver.

One of the many informational time intervals is used to identify the phase-start of the receivers. When a third pulse at the output 10 of the analyzer 5 arrives from the communication line, a signal is generated. This signal translates the trigger 6 into a single state, in this case the generator 1 is restarted and goes to one of the inputs of the element AND 7, to the other input of which a delayed second pulse comes through the delay line 8. When pulses appear simultaneously on both inputs of the And 7 elements, from its output, a signal is generated to the control input of the decoder 3, in which the code combination of the receiver’s phase start is memorized. To bring the phase start up to its initial state in the absence of a third impulse from the link, due to

VIE interference, provides a link from the output of the delay line 8 to the input S of the trigger 6.

Generator 1 after switching on continues forming pulses to the input of counter 2 during the control time interval) i is the number of pulses required until the counter 2 is completely filled.

A fourth pulse arrives on the communication line through the analyzer to the input of element 4 coincident with the arrival at the other input of this element of the overflow pulse from the high bit of counter 2. Element 4 coincides with the pulse to the controlled input of the decoder 3. The stored code combination is decrypted and a phase-start signal appears on one; from the outputs of the decoder 3. An overflow pulse from the output of counter 2 is also fed to the input R of trigger 6, the inputs of delay lines, 8 and 9, thereby providing, respectively, the generator 1 is turned off, the false start of the phase-start device is eliminated and the decoder 3 is brought to its initial zero state , which leads to increased noise immunity, in general.

Claims (1)

Invention Formula A device for phase-starting the receiver, containing a series-connected control trigger, a clock pulse generator and a counter, the output of which is connected to the first input of the control trigger, as well as a series-connected coincidence element and a remote controller, characterized in that, for the purpose of interference immunity , the signal analyzer connected in series, the first delay line and the element I, t also the second delay line, to the input of which the output of the counter is connected, while the output of the second line is delayed The meters and outputs of the counter are connected to the corresponding inputs of the decoder, the first input of the match element is combined with the first control input of the control trigger, and the second input of the match element is combined with the output of the first delay line and the second control input of the control trigger, to the other two inputs connected according 59060146 a different signal analyzer output, information sources, combined with the second input, elements taken into account during the examination That And, and an input of the first element of delay, 1. USSR author's certificate and the output element And is connected to the supplement -№ 562934, cl. H O4 U 7/00, 1975 nitral input decoder.5 (prototype). "Na -5 "4 - four