SU903855A1 - Device for displaying data on cathode ray tube screen - Google Patents

Description

I

The invention relates to automation and computing, in particular to devices for displaying graphic information on a television receiver screen.

A device for displaying information on the screen of a cathode ray tube is known, which contains registers, a switch, counters, and an And 1 element.

A disadvantage of the known device lies in its complexity, due to the need to use a computer to form graphic information, as well as the impossibility of creating complex multi-element images.

The closest to the invention to the technical essence is a device for displaying information on a cathode ray tube (CRT) screen, containing in series one connected first and second registers, a memory block, information, the input of which is connected to the second register and output the first inputs of the first and third registers, the output of the third register is connected to the first input of the first switch, the second input of which is connected to the input of the second register and is one of the device inputs, and the output is connected to a CRT with a deviation by the system, and two serially connected counters, with the first output of the second counter under Kjno4eH to the second input of the first register L 7

The disadvantage of this device

15 is a low quality display.

The purpose of the invention is to improve the image quality by expanding the range of brightness adjustment

20 and scale.

The goal is achieved by the fact that the device contains a second switch, the first and second outputs

which is connected to the input of the second counter and the second input of the third ™ register, respectively, a pulse generator, the first output of which is connected to the first input of the second switch, a frequency divider, whose input is connected to the second output of the pulse generator, and the output to the second input of the second switch trigger, setup input which is connected to the output of the first counter, and the output to the third input of the first switch, the third counter, the output of which is connected to the gate input of the trigger, element I, the first inputs of which The outputs are connected to the second output of the second counter, and the outputs to the address input of the memory unit, and the decoder, the output of which is connected to the second inputs of the AND element, and the inputs of the third counter and the decoder are the corresponding output inputs of the device.

The drawing shows the functional diagram of the device

The device contains the first re; histr 1, second register 2, memory block 3, third register 4, first switch 5, CRT 6 with a diverting system, first counter 7, trigger 8, second switch 9, second counter 10, element 11 , the third counter 12, the generator 13 pulses, the divider frequency 14 and the decoder 15.

The device works as follows.

The image on the CRT screen can be represented as a set of single raster elements of a certain brightness. By assigning a memory cell to each raster element, you can change the brightness of any raster element by writing a log to the corresponding cell. About or log. Prin, for example, that the log. O corresponds to lower, and log 1 to higher luminance By acting in this way, you can get any .dif graded image on the CRT screen.

Consider the operation of the device, dividing it for convenience of understanding into two stages: the stage of reproduction and the stage of recording.

At the stage of reproduction, using a generator 13, a divider 14, a switch 9 and an element I 1I, depending on the selected image scale (for example 1: 1, 1: 2, 1: 4), control signals of a certain frequency are generated, which are fed to the input of the second counter 10.

The second counter 10 performs a sequential search of addresses, a parallel address code is fed to the first inputs and element I. Depending on the selected playback mode (for example, one, two, four, eight and sixteen reproduction of the image), the decoder 15 sets , the target address code bit is C. The element output. 11 the address code is fed to the address input of the memory block 3. In this case, the volume information byte of 8 points of the television raster is read into the third register 4. Third | Register 4 converts a parallel byte of information into a sequence of digital pulses. The third register 4 is controlled by the second switch 9, which provides to its second input control signals of a certain frequency, which depends on the selected image scale.

The last digital pulse from the output of the third register 4 arrives at the first input of switch 5. The first switch 5 commutes three data channels: digital video pulses, digital pulses from the output of the third register 4 and a marker pulse from the output of trigger 8, converting them into a video signal. cash The video signal from the output of the first switch 5 is fed to the input of the CRT 6 with a diverting system. A sequence of synchronized video pulses allows to obtain on the screen of a CRT any image consisting of elements of different brightness.

Claims (2)

In the recording step, the first counter 7 determines the cell address of the memory block 3 corresponding to the raster element, the brightness of which must be changed during image synthesis. The coordinates of this element can be set either using the keyboard or coordinator, or using a computer. This address goes to the second counter 10. Next, the address code, with the exception of the three least significant bits, through the And 11 element goes to the address input of the memory block 3. From the output of memory block 3 to the first input of the first register 1, the original byte of binary information is read. The second counter is 10, using the three lower bits of the address code, as well as the signal of the log entry. About shh log. 1 (these signals can be generated using a key or computer), supplies the second input of the first register 1 in parallel bytes, corresponding to the recorded information. From the output of the first register, the modified I1 byte {for1 post / feeds to the input of the second register 2, the second register 2 can operate in two modes (specified, for example, using the keyboard): receiving digital video pulses from the outside or receiving byte information for subsequent recordings memory block 3. This record is made at the address determined by the first counter 7 in the second case, or using an address search that is performed by the second counter 10. For the convenience of visual control of the image formation process at the time of the match of the specified and current addresses from the output of the first counter. trigger input 8 receives an initiating signal. Trigger 8 using the third counter I2 converts this initiating signal into a digital marker pulse, which arrives at the third input of the first switch 5. On the CRT 6 screen, the marker appears in the raster where the luminance of the unit element changes. Tests of the proposed device showed that it possesses great functionality in the process of synthesizing various test images necessary for setting up an automated system. The invention is a device for displaying information on the screen of a cathode ray tube (CRT), which contains serially connected and second 556 registers, by an ITH memory block. information input of which is connected to the output of the second register, and output -. To the first inputs of the first and third registers, the output of the third register is connected to the first input of the first switch, the second input of which is connected to the input of the second register and is one of the device inputs, and the output is connected to 3jIT with a diverting system, and two serially connected counters, the first output of the second counter is connected to the second input of the first register, characterized in that, in order to send the image quality by expanding the range of brightness and scale adjustment, the device contains the second the switch, the first and second outputs of which are connected to the input of the second counter and the second input of the third register, respectively, a pulse generator, the first output of which is connected to the first inputs of the second switch, a frequency divider, whose input is connected to the second output of the generator, pulses, and the second input of the second switch, the trigger, the installation input of which is connected to; the output of the first counter, and the output of the third input of the first switch, the third counter, the output of which is connected to the gateway, the trigger input, the I element, the first inputs of which are connected to the second output of the second counter, and the outputs to the address input of the memory block, and the decoder The output of which is connected to the second inputs of the element I, and the inputs of the third counter and the signal generator are the corresponding inputs of the device. Sources of information taken into account in the examination 1, USSR Copyright Certificate No. 482776, cl. G 06 K 15/20, 1973. 2. US Patent No. 4017680, cl. 340-172.5, published. 1975 (prototlpl