SU902303A1 - Digital demodulator of phase-manipulated signals - Google Patents
Digital demodulator of phase-manipulated signals Download PDFInfo
- Publication number
- SU902303A1 SU902303A1 SU802903817A SU2903817A SU902303A1 SU 902303 A1 SU902303 A1 SU 902303A1 SU 802903817 A SU802903817 A SU 802903817A SU 2903817 A SU2903817 A SU 2903817A SU 902303 A1 SU902303 A1 SU 902303A1
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- SU
- USSR - Soviet Union
- Prior art keywords
- phase
- digital demodulator
- manipulated signals
- manipulated
- signals
- Prior art date
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- Near-Field Transmission Systems (AREA)
Description
II
Изобретение относитс к св зи и может использоватьс в системах передачи дискретной инфорамции методом фазовой и относительной фазовой манипул ции.The invention relates to communications and can be used in systems for the transmission of discrete information by the method of phase and relative phase manipulation.
Известен цифровой демодул тор фазом нипулированных сигналов, содержащий формирователь входного сигнала и последовательно соединенные генератор стабильной частоты, управл емый делитель частоты и формирователь опорных сигналов 1.A digital demodulator with a phase of a nipulated signal is known, comprising an input signal driver and a stable frequency generator connected in series, a frequency divider controlled and a reference signal driver 1.
Однако известный демодул тор имеет сравнительно невысокую помехоустойчивость .However, the known demodulator has a relatively low noise immunity.
Цель изобретени - повышение помехоустойчивости .The purpose of the invention is to improve noise immunity.
Указанна цель достигаетс тем, что в известный демодул тор введены блоки равнозначности,реверсивные счетчики и последовательно соединеннее блок сравнени и анализатор сигналов, соответствующие входы которых соединены с первыми выходамиThis goal is achieved by the fact that equivalence blocks, reversible counters and a series-connected comparison block and a signal analyzer are entered in a known demodulator, the corresponding inputs of which are connected to the first outputs.
реверсивных счетчиков, к первым входам которых подключены выходы соответствующих блоков равнозначности , входы которых соединены с выходом формировател входного сигнала и выходами формировател опорных сигналов, при этом вторые выходы реверсивных счетчиков подключены к входам блока сравнени , выход аналичатоо сигналов г.оепинен с вто10 оым вхойом управл емого делител частоты.reversible counters, to the first inputs of which the outputs of the corresponding equivalence blocks are connected, the inputs of which are connected to the output of the input signal generator and the outputs of the reference signal generator, while the second outputs of the reversible meters are connected to the inputs of the comparison unit frequency divider.
Claims (1)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| SU802903817A SU902303A1 (en) | 1980-03-26 | 1980-03-26 | Digital demodulator of phase-manipulated signals |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| SU802903817A SU902303A1 (en) | 1980-03-26 | 1980-03-26 | Digital demodulator of phase-manipulated signals |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| SU902303A1 true SU902303A1 (en) | 1982-01-30 |
Family
ID=20887017
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| SU802903817A SU902303A1 (en) | 1980-03-26 | 1980-03-26 | Digital demodulator of phase-manipulated signals |
Country Status (1)
| Country | Link |
|---|---|
| SU (1) | SU902303A1 (en) |
-
1980
- 1980-03-26 SU SU802903817A patent/SU902303A1/en active
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