SU765884A1

SU765884A1 - Storage testing device

Info

Publication number: SU765884A1
Application number: SU782661341A
Authority: SU
Inventors: Владимир Константинович Румянцев; Александр Андреевич Мовчан
Original assignee: Киевский Филиал Государственного Проектного И Научно-Исследовательского Института "Госрадиопроект"
Priority date: 1978-09-11
Filing date: 1978-09-11
Publication date: 1980-09-23

Description

1one

Изобретение относитс к области запоминающих устройств.The invention relates to the field of storage devices.

Известно устройство, содержащее регистры , счетчики адресов, схемы сравнени , триггеры , индикаторные блоки 1. Устройствоработает по принципу сравнени сигналов, полученных от провер емых запоминающих устройств (ЗУ), с эталонными сигналами.A device is known that contains registers, address counters, comparison circuits, triggers, indicator units. 1. Devices will be developed according to the principle of comparing signals received from checked storage devices (RAM) with reference signals.

В этом устройстве информаци выводитс на индикаторый блок только в случае сбо или ошибки, но отсутствует одновременный визуальный контроль функционировани ЗУ по всем последовательно опрашиваемым адресам в динамическом режиме в течение всего времени контрол .In this device, information is displayed on the indicator block only in case of a failure or error, but there is no simultaneous visual monitoring of the functioning of the memory at all sequentially polled addresses in a dynamic mode during the entire monitoring time.

Из известных устройств наиболее близким техническим решением к изобретению вл етс устройство дл контрол пам ти, содержащее генератор тактовых импульсов, генератор синхронизирующих импульсов, телевизионный приемник, схему сравнени , формирователь сигналов координатной сетки , блок записи и считывани , причем вход генератора синхронизирующих импульсов подключен к выходу генератора тактовых импульсов , а одни из выходов соединены соответственно с первым входом блока записи иOf the known devices, the closest technical solution to the invention is a memory monitoring device comprising a clock pulse generator, a clock pulse generator, a television receiver, a comparison circuit, a grid generator, a writing and reading unit, the clock pulse generator input being connected to the output clock generator, and one of the outputs are connected respectively to the first input of the recording unit and

считывани , входами формировател сигналов координатной сетки, первым и вторым входами телевизионного приемника и одними из входов устройства, другие входы которого соединены с выходами блока записи и считывани , выход схемы сравнени подключен к третьему входу телевизионного приемника 2.the readings, the inputs of the coordinate grid generator, the first and second inputs of the television receiver and one of the inputs of the device, the other inputs of which are connected to the outputs of the recording and reading unit, the output of the comparison circuit is connected to the third input of the television receiver 2.

Недостатком этого устройства вл етс невысока скорость работы устройства, объ сн юща с тем, что переключение разр дов устройства при контроле производитс оператором.The disadvantage of this device is the low speed of the device, due to the fact that switching the bits of the device during control is performed by the operator.

Целью изобретени вл етс повышение быстродействи устройства.The aim of the invention is to improve the speed of the device.

Это достигаетс тем, что устройство содержит распределитель импульсов, элементы И, элемент ИЛИ и блок местного управлени , причем вход распределител импульсов и первый вход блока местного управлени подключены к другим выходам генератора синхронизирую|Дих импульсов, выходThis is achieved by the fact that the device contains a pulse distributor, AND elements, an OR element, and a local control unit, the pulse distributor input and the first input of the local control unit are connected to other generator outputs;

Claims

20 of the coordinate grid generator is connected to the second input of the local control unit and the first input of the comparison circuit, the second input of which and the second input of the recording and reading unit are connected to the output of the local control unit, one of the outputs of the pulse distributor is connected to the third input of the local control unit, the other outputs connected to the first inputs of the elements And, the second inputs of which are connected to the inputs of the device, the outputs of the elements AND connected to the inputs of the element OR, the output of which is connected to the third input Hema comparing and fourth input of the television receiver. The drawing shows a structural diagram of the proposed device. The device contains a generator of 1 clock pulses, a generator of 2 clock pulses, a distributor of 3 pulses, and 4 elements of the number of bits of the monitored memory, an element of OR 5, a television receiver 6. The inputs and outputs of the device are connected to the outputs and inputs of the monitored memory 7. The device contains also the generator 8 of the coordinate grid signals, the comparison circuit 9, the local control unit 10 and the write and read unit 11. The input of the generator 2 is connected to the output of the generator 1, one of the outputs is connected 1 respectively to the first input of the unit 1, the inputs of the imaging unit 8, the first and second inputs of the television receiver. The input of the pulse distributor 3 and the first input of the unit 10 are connected to other outputs of the generator 2. The output of the imaging unit 8 is connected to the second input of the unit 10 and the first input of the comparison circuit 9, the second input of which and the second input of the unit II are connected to the output of the unit 10. One of the outputs limiter 3 pulses connected to the third input of the block 10, the other outputs are connected to the first inputs of the elements And 4, the second inputs of which are connected to the outputs of the device. The outputs of the elements And 4 are connected to the inputs of the element OR 5, the output of which is connected to the third input of the comparison circuit 9 and the fourth input of the television receiver 6. The device operates as follows. Generator I pulses with a frequency of, for example, 8 MHz, which determine the quantization step of a television raster, are fed to the input of a generator 2, for example, consisting of a binary 18-bit with feedback meter and a horizontal and frame synchronizer drivers of a receiver 6. Frame sync pulses the operation of the pulse distributor 3 for selecting firmware is also synchronized. The signals from the outputs of the AND 4 elements are combined by the OR 5 element and are fed to the comparison circuit 9 and the receiver 6, on the screen of which an image is formed as a set of rectangles, with a light rectangle corresponding to a single information in the interrogated memory cell, and a dark zero. The horizontal size of the rectangle is determined by the sampling time of the address of the monitored memory, the number of rectangles located from left to right and from top to bottom is equal to the number of cells in the storage device, and their sequence number corresponds to the address of the monitored cell specified by the generator counter

2. The image is determined by the type of information signal generated by block 10 and recorded in a controlled memory in parallel across all bits. The signal from the OR 5 element is also fed to a comparison circuit 9, in which the incoming information is compared with the information signal generated by block 10 on the current microprogram. Moreover, the comparison is made at the time points specified by the shaper 8 of the coordinate grid signals. If the output information from the storage device does not match the current microprogram information in the comparison circuit 9, an error signal is generated, which, together with the coordinate grid signal, enters receiver 6 and causes the rectangle corresponding to the faulty cell to blink, whose address is determined by the coordinate grid. To control the k information bits, it is necessary to send k start-up signals. When the signal (kf i) -ro is applied, the firmware changes in block 10, and during the first 20 ms, block 10 generates a write enable signal to the memory input to the read / write unit 11 and a prohibition signal for the comparison circuit 9. As a result A new information is recorded in the controlled storage device 7, the content of which is determined by the type of microprogram. In subsequent frames, information is read with image regeneration on the screen of the television receiver b. Thus, the proposed device is faster than the known one. Claims A memory monitoring device comprising a clock pulse generator, a clock pulse generator, a television receiver, a comparison circuit, a grid former, a recording and reading unit, the clock pulse generator input connected to the clock pulse output, and one of the outputs connected respectively, with the first input of the recording and reading unit, the inputs of the grid former, the first and second inputs of the television receiver and one from the inputs of the device, the other inputs of which are connected to the outputs of the recording block and