SU758442A1 - Three-phase controllable inverter - Google Patents

Description

The present invention relates to the field of converter technology and can be used to construct secondary three-phase power sources, as well as control circuits for such sources, designed for frequency starting and control of an AC drive. There are various possibilities of adjusting (stabilizing) the output voltage of a three-phase bridge inverter. Among the most effective for the overwhelming number of cases of application are various methods based on the principle of pulse width controlled (WID). In these cases, additional adjustment switches of the inverter rack keys are performed during the output frequency period. In this case, there are two main groups of algorithms for MY key switching: algorithms with unipolar WIDE-OSHIR and algorithms with two-core SHIR-DSHIR. The number of additional shifts depends on the requirements of the consumer for the magnitude of distortion (quality) of the output current. If high output current quality is not required or the depth of adjustment is small (for example, during stabilization processes) algorithms are used with only one adjustment switch on the conductive half-cycle of the control signal of each of the inverter keys (II, 2} and 3. However, in most inverters that implement algorithms with SSh1IR, the output voltage curve at certain values of the control angle and the load angle is significantly distorted from the switching component of the spectrum caused by the active-inductive load response Inverters that implement algorithms with DSHIR are free from this drawback, but the increased number of additional switching and the through currents that occur with an atom in the inverters worsen their mass-dimensional and power indicators, especially in those cases where For increased consumer requirements to the quality of the output voltage, the number of adjustment switches N must be increased (usually it does not exceed 3-4). 37 The closest in technical essence to this invention is an inverter, realizing algorithm with the ERROR, in which there are no additional distortions due to the load response. and in the whole area of variation of the control angle. This inverter contains a bridge of controlled keys, a bridge of reverse current diodes and a control unit. The control unit consists of a master oscillator, a pulse distributor and a logic node, as well as a pulse width modulator connected between the master oscillator and the logic node, connected in series. The logical node is made up of six channels, each of which contains a series-connected three-input and two-input I-KB logical elements and a logical element NOT, the output of which is the output of the logical node. The curve of the output voltage of this inverter does not depend on the nature of the load, but it only allows one additional adjustment switch in the 2-31 / 3-3 zone. 3 of the conduction angle of each of its keys. This is due to the low quality of the output current during the regulation process. is a disadvantage of an inverter with such a control unit. To improve the quality of the output current of the inverter, a three-phase adjustable inverter contains a key bridge, a control input of Each of which is connected to the output of a corresponding logic element, NOT, connected to its input through serially connected two- and three-input logic terminals AND-NOT to the pulse distributor and the master oscillator, which is only connected with its output to the pulse distributor, and connected via another output through the modulator of the pulse width to one of the inputs of each of the three-input logic Sgiach zlementy NAND, is equipped with a frequency divider, chetyrehvhodovymi AND gate NOR. and additional two-input logic elements AND, according to the number of the Inverter key, by measuring the load current, the output of which is connected to one of the inputs of all the four-input logical elements AND –NE, the other two inputs of each of which are connected to the pulse distributor, fourth with the modulator output pulse widths, the inputs of the additional two-input logic element AND are connected respectively to the outputs of the two-input and four-input logical elements AND-NOT, and their outputs are connected to the inputs of the corresponding logical elements NOT. One of the possible variants of the current measurement node contains a current sensor, made in the form of a resistor connected to the inverter power supply circuit, and an amplifier connected in series to the resistor, emitter follower and trigger, connected in series. The essence of the proposal is illustrated in the drawings, in which: FIG. 1 - block scheme of the proposed inverter; in fig. 2 - timing diagrams, explaining the principle of its work; in fig. 3 - dependence of the harmonic coefficient of the output current of the inverter on the parameters of the control angles aA and load For two cases: N 1 (a) and N 3 (6); in fig. 4 - the calculated adjustment characteristic of the inverter. The three-phase adjustable inverter (see Fig. 1) contains a bridge of controlled keys 1-6, a bridge of reverse current diodes 7-12, a control unit and a current measurement unit 13 for determining the transition angle of the instantaneous value of the inverter phase current through zero. The control unit includes a master oscillator (Z. G) 14, a frequency divider (D) 15, a pulse distributor (RI) 16, a pulse width modulator (LSI) 17, and a logical node (LU) 18 whose outputs are connected, in general, via an amplifier-decoupling device (not shown in the block diagram of Fig. 1) with the control inputs of the keys of the inverter 1-6. The master oscillator 14 is connected to a pulse width modulator 17 and a frequency divider 15, the output of which is connected to the pulse clock distributor input 16. The outputs of pulse distributor 19-24 are connected to the inputs of logic node 18, to the other inputs of which pulse width modulator outputs are connected 17 and the measuring node 13. Logic node 18 is made on the two-, three- and four-input logic elements AND-NOT. Since logic node 18 contains just identical channels for generating control signals by six key elements of the inverter 1-6, we will limit ourselves to considering only two of them that form control signals by the two keys of the inverter rack, for example 1 and 2. To the two inputs of each nz three-input logic gates AND-NOT 25, 26 are connected to outputs 22, 24 of pulse distributor 16 - to the inputs of element 25, and outputs 21, 23 - to the inputs of element 26. To the remaining inputs of each of these elements (25, 26), the output of the modulator is connected pulses 17. The outputs of the three-input logic elements AND-NOT 25, 26. connected to one of the inputs of the two-input logic elements AND-NOT 27, 28, to the other input of which the corresponding outputs of the pulse distributor 16 are connected, for example, output 19 - to the input of the element 27, and output 20 - to the input element; 28. In order to form additional pulses in the control signal, the log node is equipped with four-input logic elements AND-NOT 29, 30, to the inputs of which are connected the outputs of the pulse width modulator 17, the measuring node 13, and the remaining inputs to the pulse distributor 16; the outputs 21 and 23 to the inputs of the element 29, and the outputs 22 and 24 to the inputs of the element 30. The inputs of the four-input logic elements 29, 30 are connected to one of the inputs of the additional two-input logic elements I-HE 31, 32, to other inputs which are connected to the outputs of the two-input logic elements AND-NOT 27, 28. The outputs of the logical elements AND-NOT 31, 32 are the outputs of the logic node 18. The measuring node 13 serves to determine the transition angle of the instantaneous value of the inverter phase current through zero (tf). In one of its possible variants, it contains a current sensor in the form of a resistor 33 connected to the inverter power supply and connected in series between an amplifier (V) 34, an emitter follower (EG) 35 and a threshold device (trigger) 36. The other output signals of the logic node 18 are generated in a similar manner — when the inputs of the elements of the logic node 18 are fed to the corresponding signals from the outputs of the impulse distributor 16, which have a 120 degree phase shift of 1U relative to the previously considered ones. The principle of forming the signals of the logic node 18, the output voltages and currents of the inverter is explained in the timing diagrams shown in FIG. 2, where U, is the form-phase output voltages and current of the inverter with the number of adjustment pauses N 4; The numbers are the signals taken from the corresponding circuit elements of FIG. 1, denoted by the same numbers. Consider the operation of a three-phase bridge inverter in regulating the output voltage. The master oscillator 14 sets the output Frequency of the inverter and synchronizes the operation of its individual nodes. A frequency divider 15 with an appropriate division factor sets the number of adjustment pauses N, selected depending on the requirements of the consumer to the quality of the output current of the inverter in the process of regulating (or stabilizing) the output voltage. The pulse distributor 16 provides a 120-degree phase shift between the control signals of the inverter keys (see 19-24 in FIG. 2) and can. for example, be performed according to a three-phase scheme of a recalculating ring on 13 K-type triggers. The magnitude of the output voltage is determined by the magnitude of the control angle o1, set by the pulse width modulator 17 (see figure 2). As mentioned, when controlling the keys of the inverter with the signal from the ERR, output voltage distortions can occur. They occur when the inverter operates on an active-inductive load at the time of adjustment pauses, when the phase current determined by the load angle or the angle of the inverter’s phase current transition through zero, j, intersects with the time axis in the area of adjustment pauses. In order to avoid the distorting effect of the reaction of an active-inductive load, i.e. its EMF of self-induction, at the time of the adjusting pause, according to the proposed solution, includes the previously turned off key of the rack Ш1vertor. This switch-on is made only by the measuring signal - the signal 13. The output signal of the current sensor 33 of the measuring unit 13 is an analogous signal used by the inverter T (J.). In this case, when the phase angle (1L, the instantaneous value of the GOK goes through zero) / 3 (60), the current consumed by the inverter becomes alternating and, at the output of the measuring unit 13, a signal is formed which fixes the duration of the approach of the angle i /, j to the zone at / 3 - 23G / 3 (see 33 and 13 in Fig. 2). adjustment is carried out at the expense of WID at intervals of angles of wire Each of the 3t / 3-27t / 3 keys (main adjusting pauses) and at 4CJt / 3-53t / 3 intervals (called additional adjusting pulses), sent on the resolution signal from the measuring node 13. The maximum number of additional pulses does not exceed half the main adjustment pauses, and form them only at a purely inductive load, at the moments when the phase reactive current of the inverter returns back to the power source (or a bypass rectifier-capacitor). At other values of the load angle, the number of additional adjustment pulses is reduced, and it depends both on the nature of the load and on the magnitude of the control angle oL. There are situations in which additional pulses on the 4ZS / - 5Х / 3 interval do not form at all, which is determined by the output signal from the logical elements I-NE 29, 30. Turning on the inverter key During the time of the off-hold pause, due to the additional pulse, it closes all phases an inverter on the width of the power supply, providing the possibility of aperiodic damping of currents; In this case, the phase voltages of the load are zero and are not distorted by switching pulses from the reaction of the active-inductive load. Increasing the number of adjusting pulses N reduces the quality of the output current of the inverter. As can be seen from the comparison of the dependencies shown in FIG. 3, a and 3 b distortion, the load current (at 0) decreases with increasing number N. The graphs use a relative angle regulated, oL ZP So, for example, at 10 ° and the control angle (, 4, the harmonic factor of the phase current of the inverter decreases by 25%, and at t) and the same adjustment angle by 7.5% with an increase in the number N from 1 to 3.

H-1 0.45 0363 0.278 0.187 0.94 O

and

  0.45 0361 0.271 0.181 0.090 O

0.45 0.360 0.270 0.180 0.090 O

0.45 (

The main field of application of the proposed inverter is a variable frequency drive. The inverter can also be used in all cases where DC voltage conversion is required, into a three-phase AC, stabilized or regulated by a fixed or adjustable frequency, with improved output current quality.

Claims (4)

1. A three-phase adjustable inverter containing a key bridge, controlling input Each of which is connected with the output of the corresponding logical element NOT connected with its input through serially connected two- and three-input logic elements of AND-NOT with the output of the pulse distributor, and specifying the gene. A controller associated with one of its outputs with a pulse distributor and connected with another output via a pulse width modulator to one of the inputs of each of the AND-ViE logic elements, characterized in that spruce improve the quality of the output power, by reducing the harmonic distortion of current, it is provided with a frequency divider, chetyrehvhodovymi logical elements AND-PT; and additional two, 0 0.2 0.4 0.6 0.8 input logic elements AND, according to the number of inverter switches, a load current measurement node, the output of which is connected to one of the inputs of all four-input logic elements AND-NOT, the other two inputs of each of which are connected to the pulse distributor, and the fourth to the output of the pulse width modulator , the inputs of the additional two-input logic element AND are connected respectively to the outputs of the two-input and four-input logic elements NAND, and their inputs are connected to the inputs of the corresponding logic inputs ementov NOT. 2. Three-phase adjustable inverter according to claim. 1, characterized in that the node measuring the load current comprises a current sensor made in the form of a resistor connected into the inverter power supply circuit, and an amplifier connected in series, an input connected to a resistor, an emitter follower and a trigger. Information sources, taken into account in the examination 1.Avtors1 th certificate of the USSR N 47327TS class. H 02 R 13/18, 1972. 2. USSR author's certificate number 390639, cl. H 02 R 13/18, 1966. 3. Patent of Great Britain No. 1167566, H2F 1% 7. 4. USSR author's certificate №2416674 / 07. The calculations show that for N 6 and / V at any angle ok. harmonic current coefficient Kg (r | 4 0.31. Fig. 4 shows the regulating characteristic of the inverter according to the main harmonic of VX1) of a lower voltage (effective value), constructed in relative units as a function of the angle of regulation. As you can see, it has almost linear character , and the linearity increases with increasing number N. In the table below are given. the values of the effective value of the main harmonic of the three-phase voltage for two values of the number of adjustment pauses N equal to 1 and 3, as well as, for comparison, in the 3rd The linear characteristic is given on the same scale. YU Kflit) 0.1 OL 0.6 0.6 1.0 KrUi} 0.2 OA 0.6 0.8 W