SU754660A1 - Apparatus for gating single pulse - Google Patents

Description

The invention relates to discrete automation and computing and can be applied to count the number of pulses.

Known driver single 5 pulses, containing two triggers, the logical element OR and the inverter [1].

The disadvantage of it is the low reliability of the formation.

The closest technical solution to the invention is a device for extracting a single pulse, containing two triggers, the first inputs of which are connected respectively to the clock generator and to the source-15 command pulse pulse and [2].

A disadvantage of the known device is the ability to separate a single pulse only when the command and clock frequencies are not higher than one to two, i.e. the functionality of this device is small, while reliability remains low. 25

The purpose of the invention is to expand the functionality while improving reliability.

This goal is achieved by the fact that in the selection device a single

pulse, containing two flip-flops, the first inputs of which are connected respectively to the clock generator and to the source of command pulses, an additional K5 trigger and half-trigger Zaretsky are introduced, while the output of the clock generator is connected to the second input of the first trigger, the output of which through the inverter is connected to the first the input of the semi-trigger Zaretsky, the output of which is connected to the first input. An additional 85 - trigger, the output of which is connected to the second input of the second trigger, the output of which is connected to the secondary The eye entrance of an additional 85 - trigger and the second entrance of the semi-trigger Zaretsky.

FIG. 1 is a block diagram of the device; in fig. 2 - time diagrams explaining his work.

The device for extracting a single pulse contains a source 1 of command pulses connected to the first installation input of the first 85 flip-flop 2, the output of which through the inverter 3 is connected to the first input of the semi-trigger 4 Zaretsky, a clock pulse generator 5 whose output is connected to the second setting input 85 3

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trigger 2 and the first installation input of the second 85 - trigger b, the output of which is connected to the second input of the semi-trigger Zaretsky 4, to the first installation input of the additional K5 - trigger 7 and to the output terminal 8. The output of the semi-trigger 4 is connected to the second installation input of the additional 85 trigger 7 , the output of which is connected to the second installation input of the 85 flip-flop 6.

Clock pulses (see Fig. 2, a) and command pulses (see Fig. 2, b) are fed to the inputs of K5 - trigger 2. At the output of the inverter 3, a command is generated. bottom pulses (see Fig.2, c). synchronized on one front with clock pulses.

In the initial state, the outputs of the semirigger 4 (see fig. 2, d) and 85riggers 6 (see figure 2, d) and 7 (see Fig. 2, e) have a high potential.

At the time of receipt of a positive voltage at the input of the semi-trigger 4, a low potential is formed at its output, setting the output of the 85-trigger 7 to zero. 85 trigger 6 is prepared for operation. With the arrival of the next clock pulse 85, the trigger 7 switches and overturns the 85-flip-flop 6, the output voltage of which returns the 85-flip-flop 7 to its original position after the clock pulse that is highlighted at the output terminal 8. The selected pulse sets the potential at the output of the semi-trigger 4 to one .

The zero potential of the command pulse will prepare the semi-rigger 4 to work and will not change anything in the rest of the device. With the advent of high potential at the output of the source 1 command pulses, the work will be repeated. Thus, at the output of the device, one clock pulse is released from. each positive pulse command frequency. It should be particularly noted that the output of the device will be allocated a whole clock frequency pulse, and not its

part.

The device allows you to select a full pulse, but not part of it, which significantly increases the reliability of the entire system, which includes this device.

An important advantage of the device is the possibility of its precise operation in any relationship between the command and the clock frequencies, and the operation is fully preserved even if the command and clock frequencies are equal.

Claims (1)

Claim A device for selecting a single pulse containing two triggers, the first inputs of which are connected respectively to the clock generator and to the source of command pulses, different is that, in order to expand functionality while improving reliability, an additional 85 trigger and semi-trigger Zaretsky are introduced , while the output of the clock pulse generator is connected to the second input of the first trigger, the output of which through the inverter is connected to the first input of the semi-trigger Zaretsky, the output of which th connected to the first input of the additional flip-flop 85, whose output is connected to the second input of the second flip-flop, whose output is connected to a second input of the additional flip-flop 85 and the second input polutriggera Zaretskii.