SU754639A1 - Apparatus for controlling m-phase inverter - Google Patents

Description

The invention relates to the field of electrical engineering and can be used in devices for the conversion of electrical energy.

A device for controlling, wherein in order to reduce losses mosh- ⁵ NOSTA use feedback from the load current, which is included in the feedback magnetoresistor £ ΐ] chain.

The disadvantage of such a control device is complexity, since in the feedback circuit it is necessary to use a complex magnetic system containing, in particular, a permanent magnet.

The closest in technical susch- ₁₅ NOSTA and achieved result to the proposed apparatus is an inverter control apparatus comprising power switches current sensor, a control voltage source, a comparator, and _m switch logic power transistors locking chain [2].

The disadvantage of this device is the loss of power in the power control circuit 2

mi transistors of the inverter, as the current base of the power transistors does not depend on the current flowing through the collector circuit.

The aim of the invention is to increase the efficiency of the inverter.

This is achieved by the fact that in a device for controlling a Ρι-phase inverter containing a current switch of power switches and a series-connected control voltage source, a comparator, a switch and a logic block for locking power transistors, the current sensor is made in the form of a resistive circuit and ur-current transformers with one primary and two secondary windings, said primary winding of each current transformer is connected to terminals for connecting the output circuit of the power transistor of this phase (R ^- ^), one secondary winding ne vym output connected to the output logic unit blocking the power transistor and the other through a diode connected to said carnage 3 754639

A second circuit is connected to the second input of the locking logic unit of the power transistor, the output of which is connected to the terminals for connecting to the base of the power transistor of the next phase (K).

In a variant of the control circuit logic blocks have a third input connected to the bus control mode of the inverter.

The drawing shows a schematic diagram of the proposed device.

The elements of the control device shown in the drawing refer both to the entire device as a whole, and only to two adjacent phases, the numbers of which are K-1 and K.

In the (K – 1) th phase, the current transformer 1 has a primary winding 2 and secondary windings 3 and 4. The common point of the two windings 3 and 4 is connected to the base of the power transistor 5 belonging to the (K – 1) –th phase of the inverter. The emitter of the power transistor 5 as the emitters of the remaining power transistors is connected to the common bus 6, and the collector through the primary winding 2 of the current transformer 1 is connected to a common transformer (output) node 7. The output of the logical block 8 of the transistor locking is connected to the base of the power transistor 5. The first input of the locking logic unit 8 is connected to the (K-1) th output of the Phi-phase switch 9. The second input of the logic unit 8 through the matching circuit 10 is connected to the second secondary winding of the current transformer of the previous (K-2) -th phase of the inverter.

The second terminal of the first secondary winding 3 is connected via diode 11 to common bus 6 via resistive circuit 12. The output of resistive circuit (for example, C-C-divider) is connected to the first input of comparator 13, the second input of which is connected to terminal 14 of the control voltage source.

The logical block 8 of locking the power transistor 5 can be performed in a variety of ways. For example, at its output there may be a transistor, the shunt base is an emitter junction of a power transistor. Logic unit 8 can be designed according to a scheme for which the presence of a high potential level at any of its inputs indicates the appearance of a locking signal of a power transistor, in which the input circuit is connected to the output of this logic circuit.

four

The principle of the device for

The control is as follows.

If at the given moment of time the lowest potential level is present at the (K – 1) th output of switch 9, then all power transistors, except for (K – 1) th, can only be in the locked state. Accordingly, by the current transformer (K-2) -th phase inverter not prote1 ₀ repents current and then through the matching circuit 10 to the first input of the logic block 8 is not transmitted to the high potential level. In this case, the output of the logic unit 8 is missing the signal _{15 of} locking the power transistor 5.

The initial unlocking of the transistor 5 can be achieved due to a slight bias current through a resistor connected to the power source 20 of the inverter or the inverter control device.

The initial unlocking of the power transistor due to the positive reverse

25 of the coupling made by the current transformer 1 causes the transistor 5 to go into a saturation state, the collector current of this transistor and the base current being set proportional. About—

30 portion current of the collector and base means that a reduction in power losses in the control circuit of the power transistor is achieved, and also that the transformer that controls

35 by a power transistor, simultaneously provides for the creation of a signal proportional to the current of the output circuit, due to the flow of the current of the first secondary winding 3 of the current transformer 1 through a resistance circuit 12.

The transformer nature of the load in the output circuit of the power transistor 5 (collector of the transistor 5 through the winding

₄₅ 2 is connected to the transformer node 7) means that the current of the output circuit will necessarily increase in time. Accordingly, the winding current 3 and the output voltage pe— will increase in time.

_{50 of the} active circuit 12. When the magnitude of this voltage reaches a certain threshold level determined by the comparator 13 and the control voltage present at terminal 14, a signal appears at the output 55 of the comparator 13 and

the switch enters a new state.

In the new state of the switch lower

potential level is set only on the K-th output ..

5 754639

Occurrence of high level potential at the second input logic block 8 associated with the state switch .9 causes locking of the power transistor 5. Because of the inertia of the pro- ₅ EUCES locking the primary winding current 1 2 transformatrra will for some time and current flow, respectively voltage 4 will act on the winding 4. It is transmitted through the matching circuit to the input of the logical blocking device belonging to the K-th phase of the inverter, and thus the unlocking of the power transistor of the K-th phase is prohibited as long as the collector circuit of the transistor (K-1) -th phase flows current.

After locking the power transistor 5 (K-1) phase, the voltage on the windings of current transformer 1 changes the polarity due to the process of outputting (dissipating) the energy stored in transformer 1, and the unlocking of the power transistor of the K-th phase is allowed. The diode 11 prevents the influence of the process of energy output 25 on the signal from the output of the resistive circuit 12.

If the third input and all these additional inputs are connected to the control bus locking logic block of the power transistor, then all power transistors can be locked at the same time, i.e., it can stop the transmission of power to the secondary side.

This provides additional power management capabilities. 35

As the comparator 13 is convenient to use the transistor, as shown * in the drawing. The inputs of the comparator in this case are the base and emitter of the transistor, and the output is the collector. 40

The use of current transformers in the proposed device, which are a component of the current sensor, simultaneously as control devices for power transistors and their switching circuits, reduces power losses due to the proportionality of currents

the output and input circuits of the power transistors and by preventing the unlocking of the power transistor of the next

phase until the end of the locking process

power transistor of this phase.

Claims (2)

Claim 1. Device for controlling W-phase inverter, containing a power transistor current sensor and a control voltage source connected in series, a comparator, a switch and a logic block for locking the power transistor, which, in order to increase efficiency, the current sensor is made in the form of a resistive circuit and m-current transformers with one primary and two secondary windings, the primary winding of each current transformer is connected to the terminals for connecting the output circuit of the power transistor of this phase, one secondary winding is connected to the output of the locking logic block of the power transistor and the other is connected via a diode with the resistive circuit, and the second secondary winding is connected to the second input of the locking logic unit of the power transistor of the next phase, the output of which is connected to the terminals for Connections to the base of the power transistor of the next phase. 2. Device pop. 1, characterized in that the logical blocks for locking the power transistors are equipped with additional third inputs that serve to connect the control signal.