SU706931A1 - Delay device - Google Patents

Description

(54) DELAY DEVICE

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The invention relates to the field of pulsed technology and can be used in automation circuits and other devices where it is necessary to obtain relatively large time delays.

A time relay is known that contains input and output thyristors, included a GYG6 parallel inverter circuit, a fast RC circuit, two limiting diodes, a transistor and a zener diode, the transistor emitter connected to the control of an amp thyristor, and the collector connected to the power supply bus % Zistors and to the cathode of the Zener diode 1.

The disadvantages of the time relay are the temperature imbalance and the possibility of the occurrence of a relatively large instability of the time delay due to a change in the voltage across the condensate 1 at the end of the discharge.

A time delay switch is also known, which contains a toggle switch connected to a power source and resistor, a capacitor that is charged through a resistor before the switching voltage of a single-pass transistor. Odiako management

The switch is operated manually by means of a flash player, which does not provide a high accuracy of the duration of the stich gun. The initial voltage across the capacitor is non-Zero, which in the case of small supply voltages reduces the delay time121,

A delay device is known that contains primary and secondary thyristors with resistors in the anode circuits and a switching capacitor between the anodes, the time of the IGX circuit connected in parallel with the additional thyristor, the output of which is connected to the input of the comparison element 3.

The disadvantages of the known device are: Impossible OS 1GGG (5th) Relatively longer time delays at low ef CALCULATION, initial voltage of the capacitor; initial charging voltage is not equal to zero, which reduces the time at small feeds, which consumes low ; instability in terms of temperature parameters; the device assumes the initial state after a set time delay.

The purpose of the invention is to increase the exposure time and improve its T irepatypnoy stability.

To achieve this goal, a delay device containing the main and additional components (a WpkWi piit with resistivity at different values and a switching capacitor between the anodes, the time setting RC: Uenb, connected in parallel to an additional thyristor, the output of which is connected to the input of the matching element, A level limiter is input, the input of which is connected to the anode of the main thyristor, and the output is parallel to the time setting capacitor, the logic element OR, one input of which is connected to the power bus through the differentiation circuit and the other to the output the reference element, and the output is to the control electrode of the additional thyristor.

The drawing shows a schematic diagram of the device.

The delay device contains a main thyristor 1, an additional thyristor 2, a switching capacitor 3, resistors 4, 5, an RC driving circuit consisting of a resistor b and a condenser {a 7, a limiter 8 of the transistor 9 level, a differential; the element OR 11, the element of comparison 12 on the unijunction transistor 13.

The proposed device works as follows.

When voltage is supplied through differentiating circuit 10 and the element OR 11, an additional thyristor 2 is turned on. Main thyristor 1 remains locked. The transistor 9 in the cutter 8 level is open and saturated. The voltage on the condenser 7 is 0; ,

When a pulse arrives at start-up at the input 14, the main tunnel 1 opens, and the additional thyristor 2 closes through the capacitor 3. The transistor 9 in the limiter 8 is also closed. The capacitor 7 starts to charge through the resistors 4 n 6. When the delay time across the plates of the capacitor 7 set by the resistor 6 reaches the switching voltage of the unijunction transistor 13 in the reference element 12, the transistor J3 turns on. The capacitor 7 discharges through the transistor 13 and the element OR} G, as a result of which the secondary thyristor 2 is turned on. The main thyristor 1 is closed and the transistor 9 is opened. The device is ready to receive the next trigger pulse.

Used in the proposed switch of the transistor limiter advantageously differs the proposed circuit from the known one, since a relatively longer time delay is provided.

Claims (3)

1. The author of the USSR №444328, cl. H 03 K 17/26, 02.03.71. 2. Kublanoveky Ya. S. Tyrnstorny device in. M., “Energie, 1978, p. 41, Fig. 23, a. 3. Kublanovsky Ya. S. Thyristor devices. M., “Energie, 1978, p. 43, fig. 24 (prototype).