SU659982A1 - Digital phase meter - Google Patents

Description

Which are connected, respectively, with the first and second outputs of the control unit 7, to the input of which the signal is reset to zero counter 9.

The output of the key 4 is connected to the counting input of the counter of non-periods 10, the code outputs of which are the potential inputs of the AND block, the output of which is connected to the input of the assembly 8.

The output of the coincidence element 6 is connected to the counting input of the registering counter 12, the code outputs of which are the outputs of the entire device and the pulse inputs of the block of elements of match 11.

The device works in two stages. At the first stage, the coding of the temporal phase shift and the period of the input signal is carried out, at the second stage, the code is found proportional to the ratio of the codes obtained at the first conversion stage.

The first stage of the conversion begins with the formation at the second output of the control unit 7 of the enabling signal at the inputs of the keys 3 and 4, as well as at the control bus of the summation of the counter 9.

At this stage, the pulse 3 from the pulse generator 5 during the interval equal to the temporal phase shift A / passes through the assembly 8 to the counting input of the counter 9 through the prepared key 1 and 2 and the control unit 7 of the key 3. At the end of the time interval A into the counter 9 records the number NAt, defined by the following relation

,(one)

where Ai is the time phase shift between the input voltages L / i and Uz, w / is the frequency of the output voltage of the pulse generator 5.

Note that the remaining inputs of the assembly 8 at this stage of the conversion do not receive pulses, since the input of the coincidence element 6 is prohibited, and the counter 12 is in the zeroed state.

At the same time, the key 4 prepared by the control unit 7 and the driver 2 and the counting output of the counter 10 during the period of the input signal T receives pulses from the pulse generator 5. By the end of the period D, the number 10 is recorded in the counter 10

, (2)

The resolution coming from the output of block 7 to keys 3 and 4, as well as the control bus for summing counter 9, is removed. This completes the first stage of conversion.

At the second stage of conversion, the resolution from the first output of the control unit

7 is fed to the coincidence element 6 and the control subtraction control bus 9.

The pulses from the output of the pulse generator 5 through the coincidence element 6 are fed to the summing input of counter 12. At the code outputs of counter 12, weighted frequencies are obtained that pass through the elements of the block of coincidence elements 11 allowed by the code outputs of counter 10 and arrive at the input of the assembly 8. At the assembly output 8, the frequency is obtained / or proportional to the number 7 g d g

(3)

/ Ai-- lh,

where n is the number of bits of the counter 12.

Frequency / or is fed to the input of the counter 9, now working on the subtraction. The zero reset signal of the counter 9 is fed to the input of the control unit 7. From the output of the control unit 7 to the input of the coincidence element 6 and the control bus by subtracting the counter 9 is inhibited. This completes the second conversion step.

Recorded in the counter number 12 can be found by the following formula

  aega- / n., (4)

where N-f is the number recorded in the counter 12, 2et-time of the second conversion stage (time for which the pulses following the frequency / or will zero the counter 9). For 2th you can write

(five)

aem -

/or

Where, taking into account expressions (1) - (3), we obtain

"Sh-2" .-. (6)

/ gi

Substituted expression (6) into expression (4), we finally get

D

(7)

yV, :: g 2

From the expression (7) it can be seen that the code obtained in the counter 12 is proportional to the phase shift of the voltages f / i and -I.

A digital phase meter containing the first and second shapers connected to the first and second inputs of the first key, the second key, one of the inputs of which is connected to the second driver, a pulse generator connected to the second inputs of the first and second keys and the matching element whose output is connected to the counting the input of the registering counter, a period counter connected at the input to the output of the second key, a block of coincidence elements, the first inputs of which are connected respectively to the outputs of the registering counter and the output respectively, to the inputs of the assembly, and a control unit connected to one of the inputs of the keys and the coincidence element, characterized in that, for the purpose of simplification, it is equipped with a reversible counter, the output of the first key being connected to one of the inputs of the assembly, the output of which is connected to one of the inputs of the reversible counter, the second and third inputs of which and the output are connected respectively to the first and second outputs and the input of the control unit.

Sources of information taken into account in the examination

1. Certificate of authorship 296053, cl. G 01R 25/00, 1970.

2. Smirnov P. T. Digital phase meters, “Energie, L., 1974, p. 26

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