SU570185A1 - Pulse generator - Google Patents

Description

one

The invention is related to a pulsed telnik and can be used as a master oscillator.

A pulse generator is known that contains a static trigger and two retarder multivibrators on MOS transistors, each of which contains a capacitor of one MOS transistor during the rear of the pep, blocking and triggering the MOS transistors, with the drain of the blocking MOS transistor connected to the common point of the co-sensor and the MOS transistor, the time of the driving circuit, the start-up drain of the MOS transistor to the output of the braked multivibrator, and the sources of the blocking and starting MOS transistors are connected to the common bus l.

However, this does not allow to obtain a delay between the generated pulses and cannot operate in the mode of soft self-excitation.

The aim of the invention is to obtain a delay between the generated pulses and provide a soft excitation mode.

To do this, a pulse generator containing a static trigger and two braked multivibrators on MOS transistors, each of which 1X contains a capacitor and a charging MOS transistor during the master dep: in, blocking and starting, MOS transistors -transactor is connected to the common point of the conservator and the charged MOP traizist (the time of the setting penalty, the drain of the triggering MOS transistor is connected to the output of the braked multivator, and the sources of the blocking and triggering MOS transistors are connected to the common bus, An additional MOS transistor, a MOS-transistor & a resistor and a forced-start inverter are given, with the inverter input connected to the drain of the additional MOS-transient, source and gate, which are connected to the output of one of the trigger arms, and the inverter output is connected to the gate MOSFET transistor, connected between the input of the same trigger arm and common, in both cross-feedbacks of the trigger are connected in parallel connected timed and forced MOS transistors, and the gate time of the master MOSFET The key to a voltage source, and the gate booster MSPtraneistora - to yield the total trigger point of connection of the capacitor, the charging time of the MOSFET zadakshey chain hundred blocking MOSFET hindered multivibrator connected to WMOs row latch and the shutter trigger MOSFET. the transistor is connected to the trigger output, and the gate of the blocking MOS transistor is connected to the combined sources of the time n of the driver and the force of the MOS transis. opposite shoulder trigger. The drawing shows the scheme of the proposed generator. The pulse generator comprises a static flip-flop MOS - traeeistorah 1-6, the time zadayushie MOS travzystory 7 and 8, the booster MOS tranzistsrl 9 and 10, the first zatormozhevvyO muhotvvi ator comprising MOSFET And, launch vl1Ya1y1zar iny | bpoyfuyunshy and MOS -Transistors 12-14, respectively, and the capacitor 15, the second braked multivibrator, which triggers the MOS transistor 16, triggers, charging 2: 7 to the MOSFET transistors, 17-19, respectively, and the capacitor YO, the shearshoer is forced. Start-up on MOS-Tracksors 2.1. ü 2 bit MOS-transis-Gore 23, additional MOSFET 24, bus 25 and 26 voltage sources and bus 27 per meter of power supply. 11, 13,, 18, 16, and 21, and the gates of the transistors 11, 1,4, 16, and 21 are connected to SWI-27, the gate of the transistors 7 and 8 with the SHIELD 25, the gates of the transistors 13 and 12 are connected to the bus 26, and the origins of transistors 12, 14, 2, 3, 5, 6, 19, 17, 22 and 23 with a common thread. The drain of the transistor 14 is connected to the source of the transistor 13, the gate of the transistor 2, and through the capacitor 15 by the source of the transistor 11 and the drain of the granis tor 12, the gate of which is connected to the source of the transistor 1, the gate of the transistor 9 and the drain of the transistors 7, 9, 2 n 3, the gates transistors 3 and 14 are combined and connected to the sources of transistor 8 and 10, and the sources of transistors 7 and 9 are combined and connected to the gates of a transistor of Tors 5 and 19. The drain of transistor 19 is connected to the gate of transistor 6, the source of transistor 18, the drain of transistor 23 and black capacitor 20 - source transistor 16 and the drain of the transistor 17, the gate is connected to the transponder 4, the gate of the transistor 10, the drain of the transistor 5, 6, 8 and Yu and the gate and the source of the transistor 24, the drain of which is connected to the gate of the transistor 22, the drain of which is connected to the source of the transistor 21 and the gate the transistor 23, the source of which is connected to the common bus. The generator works as follows. At the moment of switching on, such a stable position can be established when the potential of the transistors 9 and 10 is zero, and that of the transistors 14 and 19 is negative. A negative potential is established at the input of the forced-start inverter and through the discharge transistor 23 lowers the drain potential of the trazistor 19 to zero. As a result, a negative potential is established on the drain of the transistor 1O. Through the transistor 24 it charges the potential capacitance of the gate of the transistor 22 and at the output of the forced-start inverter sets the potential to zero. The forced start inverter only works when the circuit is turned on & since the gate capacitance of transistor 24 can be discharged only after switching off the power through the leakage circuit. After the forced-start inverter triggers, the nastok of the transistor 11 mouth: the negative potential is reduced, and the drain of the trazistor 16 is zero. The charge of the capacitor 20 through the transistor 18 begins. The time it takes to charge up to the threshold voltage determines the duration of one half-cycle of the generator. When the lumen of the transistor at the gate of the transistor 6 is reached, it becomes open and its potential is lowered at its drain, transistor 17 is locked, and the potential at its drain rises. This increase is transmitted through the capacitor 20 to the gate of the trazistor 6, which in turn lowers the potential on the drain of the latter. An avalanche-like process occurs, as a result of which a zero potential is established on the drain of the transistor 10. After a time determined by the discharge of the parasitic capacitance of the gate of the transistor 3 through the transistor 8, the zero potential is set at the gate of the transistor 3. After that, the negative potential is set at the drain of the latter, and the H potential at the drain of the transistor 12. The charge of the capacitor 15 through the transistor 13 begins. The transistors 9 and 10 serve to quickly charge the parasitic capacitances of the transistors 3 and 5. The operation of the second arm of the generator is not different from that of the first arm. The introduction of two separate pods of time allows one to obtain pulses with any borehole.