SU569042A1 - Telemntric system receiving device - Google Patents

Description

(54) RECEPTION DEVICE OF TELEMETRIC SYSTEM

one distributor output is connected.

The drawing shows a structural electrical circuit of the proposed device.

 the telemetry system device contains a generator 1 (clock pulses and a pulse regenerator 2, the output of which is connected to the inputs of the frame synchro selector 3 and the channel signal selector 4, its output is connected through the first and second converters 5 and 6 of the channel switches 7, in series, to the second inputs which are connected via the decoder 8, the outputs of the distributor 9, the control input of the latter is connected to the corresponding input of the first converter 5, and the outputs of the channel switches 7 are connected to the input m of the corresponding formers 10 output signals, the counter 11, its bit outputs are connected to the inputs of the corresponding output element 12, the phase-time discriminator 13, element 14 and ID 15 and the output unit 16, while between the output of the selector 3 frame sync pulses and the output of the distributor 9 the pha-modern discriminator 13 is turned on, the first output of which is connected via one clock pulse generator to one of the inputs of counter 11 and a decision block 16, the output of the selector 4 of channel signals is connected to another input of this block, The output of the phase discriminator 13 through the OR 15 element is connected to the auxiliary input of the selector 3 frame sync pulses, and the third output of the phase-time discriminator 13 is connected to the corresponding inputs of the distributor 9 directly and through the counter 11, in addition, the output of the decision unit 16 is connected to the second inputs of the output elements And 12, and the outputs of the corresponding bits of the counter 11 are connected to the corresponding inputs of the second converter 6, one of the inputs of which is connected to the second input of the element OR 15 via el And 14, and one of the outputs of the distributor 9 is connected to its corresponding input.

. The device works as follows.

The regenerator 2 pulses provides regeneration (recovery) of the signal received from the communication channel with analog-quantized time-impulse modulation and pulse-time coding {AQUIM-IWU. The channel signal selector 4 selects from the received sequence channel pulses in which the leading edge takes values in accordance with the analog time-pulse modulation (VIM) and the rear edge is discrete in accordance with the quantized VIM (KVIM). The selector 3 selects a frame synchronization IVC in the form of a short pulse. Phase discriminator 13, the counter 11, the distributor 9 and the generator 1 form a ring phase-locked loop (PLL). The phase discriminator 13, in addition to the error signal supplied to the generator 1, generates setup signals for the counter 11 and the distributor 9, as well as a signal indicating that the PLL ring does not enter synchronization. After the arrival of the PLL peg in synchronism, the indicated signal goes to zero.

Before the PLL enters synchronization, the signal corresponding to this mode from the input of the phase-time discriminator 13 is fed through the logical element, OR 15 to the selector 3, allowing the reception of the blue signal without clipping. After the PLL enters synchronization, the specified signal is stopped and, through the IDN element 15, the selector 3 receives a clipping signal generated by an AND 14 logic element, to the inputs of which the corresponding signals from counter 11 and the distributor 9 are input. the signal is reduced to the minimum required value.

The selector 4 detects from the received INC channel pulses with AKVIM of each channel, compacted in time, and both fronts of each channel impulse with AKVIM are informational; the leading edge contains analog information, and the back is discrete (quantized).

In order to eliminate the uncertainty of decoding signals from AKVIM, channel signals from AKVIM are processed in the decision block 16, from its output the processed signal goes to the elements and which are used to remove the code from counter 11, the generator 1 pulses to its counting output. counter 11 is included in the FAP system, then the code removed from counter 11 corresponds to the received quantized position of the trailing edge of the channel pulse with AKVIM.

The demodulation of analog (continuous) signals is as follows.

Claims (1)

The counter pulses are removed from the output of the counter 11, with respect to which the phase of the front front cusp pulses allocated at the input of the selector 4 changes. The second converter 6 provides a multichannel signal with amplitude pulse-modulated modulation (AIM), which is fed to the common input of channel switches 7, control of E1 and E4X signals of the decoder 8, and with the help of it the signals are separated by corresponding channel circuits smoothing and output circuits of the output signal conditioners 1 generate continuous signals arriving at the data recorders (not shown). During demodulation of analog signals, the signals of the FA system are used, the reference pulses from the output of counter 11 and the pulses from the phase-discriminator 13 applied to the vertical input of the distributor 9. As the PLL operates on frame synchronization signals, the synchronization path of the synchronizer leads to and to improve the accuracy of analog signal demodulation. Thus, the proposed telemetry system has a higher noise immunity of the digital signal converter due to the formation of signals in the form of CODES combinations correlated with received signals in the form of KBIM and a higher noise immunity of the frame synchronization path due to the formation of a clipping signal using the FAP system whereby the accuracy of both analog and digital conversion and measurement of signals in the receiving part is further improved. The invention The receiving device of a telemetry system, containing a clock pulse generator and a pulse regenerator, the latter, is connected to the inputs of the cadr selector switch and the channel selector switch, the output of which is connected through the serially connected first and second converters to the channel switch inputs, to their second inputs the distributor output is connected via a decoder, its control input is connected to the corresponding input of the first converter, and the channel switch outputs are Connected to the inputs of the corresponding output drivers, characterized in that, with an enhanced noise immunity circuit, a counter is inserted, the outputs of which bits are connected to the inputs of the corresponding output elements AND, the phase discriminator, the elements AND and OR, and the decisive block, between the output of the frame selector and sync pulses and a distributor output the phase-time discriminator is turned on, the first output of which is connected to one of the counter inputs and the decision block through another clock generator to another the input of which is connected to the output of the channel signal selector, the second output of the phase-time discriminator through the OR element is connected to the auxiliary input of the frame sync pulse selector, and the third output of the phase-time discriminator is connected to the corresponding inputs of the distributor directly and through the counter, in addition, the output of the decision unit is connected to the second inputs of the output elements And, and the outputs of the corresponding bits of the counter are connected to the corresponding inputs of the second converter, one of the inputs of which th is connected to the second input of the OR gate through the AND gate, to a corresponding input of which is connected one of the outputs of the distributor. Sources of information taken into account during the examination 1. Telemetry Handbook, ed. E.L.Grünberg, translated from English. M., Mechanical Engineering, 1971, p.258.