SU536599A1 - Pulse number dividing device - Google Patents

Description

one

The invention relates to specialized computing devices of a chick type, in particular, to electronic calculating devices of X-ray analysis devices, which include pulse counters as will accumulate &

Known counting devices divided by an arbitrary number.

The first of the known devices contains serially connected release devices, to the input of each of which, in the form of a binary code, the corresponding division factor O is applied.

However, the known device does not have a sufficiently high division accuracy.

Another known device containing serially connected binary decimal decade and memory elements also has an insufficiently high precision of cases & 2.

The purpose of the invention is to improve the accuracy of dividing with a small number of input pulses.

To do this, the OR pulse division unit, sequential binary decimal decade and memory ampli fi cates, are introduced into the device for dividing the number of pulses, OR elements, AND comparison elements, a recording trigger, and a control trigger, with the overflow output of the first binary decimal d & The frames are connected via the first element OR to the first inputs of the first and second elements AND, to the second inputs of which two outputs of the first memory elements are connected, to the third inputs to the recording trigger outputs, and to the outputs through the second element OR to the bit records of the first binary number the second decade overflow is connected to one of the recording trigger inputs, the other input of which is connected to the output of the first comparison element connected to the output of the second two-decade decade and to the outputs of the first and fourth elements And whose first inputs are connected to the outputs of the third and fourth memory elements, and the second inputs to the control trigger outputs, the first input of which is connected to the output of the third binary decimal decade, and the second input to the output of the second element The first input is connected to the output of the third binary decimal decade, and the second input is connected to the output of that memory element. The drawing shows a structural electrical circuit of a device for dividing a pulse chol. The device is made on the basis of just one binary decade 1, to the Overflow output of which is connected the input of the feedback circuit, which includes the OR 2 element, combining the overflow signal with the pre-recording signal, And 3 and 4 elements, through which decade 1 is written with the additional code of the higher bit of the divider K | a stored in the memory element 5, or the reverse code of this number K stored in the memory element 6. The code is recorded through the element OR 7. The choice of the recorded code is determined state three Record 8, which has separate control inputs: one of them is connected to the binary overflow output from the decade 9 of the first decade of the result counter and the other is connected to the output of the amp & comparison item 10. which compares the value of the contents of decade 9 either with the number L + 1 stored in memory 11 or with the number b stored in memory 12, and the compared number is output to the input of comparison 10 through elements 13 and 14, respectively, switched by control trigger 15 having separate control inputs. the first of which is connected to the overflow output of the binary-decade decade 16 (the second decade of the result counter), and the second is connected to the output of the comparison element 17, which compares the content of the decade 16 with the M number stored in memory 18, the device works as follows in a way. Let Lfo, Me10 .. Preset signal is set to the initial state (the circuits on the part are not shown) with this: the decades 1,9,16 are set to the zero state, the recording trigger 8 outputs the enable signal to the And 3 element, preparing the record in decade 1 of code K from memory element 5, trigger 15 generates a signal of the resolution to the element 13, through which the input of the element of comparison 10 receives the code of the number (L + 1) from the memory element 11. By the start signal through the element OR 2 Tsekadu 1 through the element And 3 and the element OR 7 writes the code to (number 10 -JK - 1) and

Tpjirrep control 15 returns to its original state from the input from the overflow signal of decade 16.

Claims (2)

Obviously, this moment corresponds to the overflow of Decades 1 and 9 and, thus, the entire dividing device returns to its initial state, in which the ovo was after the start signal was given. The result counter at this moment stores the number 1OO, and A pulses have arrived at the input of the device. At the same time, counting pulses begin to enter the input. After the arrival (K + 1 input pulses at the overflow output of decade 1), an output signal appears that arrives at decade 9 and into the feedback circuit, where the K code over the above described circuit causes overwrite at decade 1. until the decay 9 accumulates (L + 1) a pulse in. At the same time, the output signal of the comparison element 10 switches the trigger 8, after which the enable signal is output to the AND 4 element and a record is written in the decade 1 of the code | k | a (the number 10 - K). Overflow pulses at the output of decade 1 appear after fasting. It sends signals to its input, K, and the rewriting circuit closes through element 4. The rewriting of the I KI 3 code repeats until the overflow signal of decade 9 arrives at the input of record trigger 8. After the trigger, record trigger 8 returns to its initial state and feedback circuit re-closes through AND 3 (record 1). Thus, a rewriting cycle is formed — out of every 10 overflows of decade 1 (L + 1) overflows, rewriting K is generated, and the rest (10-1), overwriting). At the same time, the overflow signal of decade 9 is fed to the input of decade 16, etc. The code for the number of overflows accumulated in decade 16 by the comparison element 17 is compared with the code of the number M stored in memory element 18. The equality signal from the output of the comparison element 17 is fed to the control trigger input 15, and the resolution signal and the input of the comparison element 10 receives the code of the number ll stored in the memory element 12. The rewriting cycle obviously changes - out of every 10 seconds & overflows of the overflow of decade 1, the first b is called in this decade. , and rewriting the code | k | a causes the rest (1O - L) overflows. The invention The device for dividing the number of pulses, containing sequentially connected binary-decimal decade and memory elements, characterized in that, with the aim of improving the accuracy of dividing with a small number of input pulses, OR elements are introduced, AND elements, elements compared, the trigger and the control trigger; the overflow output of the first binary decade decade is connected through the first element OR to the first inputs of the first and second elements AND, to the second inputs of which the outputs of the two first elements are connected in memory, to the third inputs — the write trigger outputs, and to the outputs — through the second element OR inputs of the bit record of the first binary-decade decade, the overflow output of the second binary-decade decade is connected to one of the recording trigger inputs, the other input connected to the output of the first comparison unit connected by the input to the output of the second binary decimal decade and to the outputs of the third and fourth elements I, the first inputs of which are connected to the outputs of the third and fourth elements, and the second inputs to the outputs of the control trigger tim, the first input of which is connected to the output of the third binary-coded decimal decade, and the second input - to the output of the second comparing element, the first input coupled to an output of the third binary-coded decimal decade, and the second input - to the output of a fifth memory element. Sources of information taken into account in the examination: 1. German Patent No. 1928327, cl. 21 l 36/22, 01.05.72. 2.Budinsky P. Ya. Transistor switching circuits. M., Svy, 1965, p. 343-344, fig. 252 (prototype).