SU451190A1 - Voltage converter to code - Google Patents

Description

The invention relates to computing technology and can be used to convert voltage into code when entering information into a digital computer.

A converter is known that contains a comparison circuit connected to the output of a code to voltage converter, a register consisting of flip-flops connected to the initial setup channel, a pulse generator, a group of AND circuits whose inputs are connected to the output of the comparison circuit and outputs are connected to zero. the inputs of the corresponding register triggers.

However, the known transducer contains a lot of equipment for building a pulse distributor, which is either a shift register or a counter along with a decoder. In the first case, for each bit of the converter, there is a circuit of one section of the shift register; in the case of the equipment of the distributor and the pulses per bit of the converter, it is also large,

The aim of the invention is to reduce the amount of equipment.

To do this, in the converter, in each bit of the register j except the senior one, two additional

circuit K, the first inputs of which are connected to the output of the first additional circuit AND the previous register bit, and the second inputs, respectively, to zero and one

the outputs of the trigger trigger, the output of one additional circuit AND is connected to another input of the circuit AND the register discharge and the single trigger input of the next least significant bit

registra, the output of another additional circuit AND is connected to one input of additional circuits AND the next bit, and some inputs of additional circuits AND younger

bit connected to the output of the pulse generator, and in the older bit of the de register entered one additional circuit AND, the inputs of which are connected respectively to the output of the first additional circuit AND the previous bit and the single output of the discharge trigger, and the output connected to another input of the circuit and the older bit of the register a. The drawing shows the Olok converter circuit, the voltage converter in the code contains a comparison circuit Ij connected to the code converter in voltage 2 and the source of the voltage to be converted 3, Analogs The input of the code converter to the voltage H is connected to the output of the source of the reference voltage 4, and digital to the output of the register 5, consisting of triggers 6 connected to the initial setting channel 7. The output of the generator 8 is connected to the inputs of two additional circuits AND 9jiU , the second inputs of which are connected respectively to the zero and single trigger output of the first (low) register bit, the output of the additional circuit AND Yu is connected to the input of the circuit AND II, The output of the additional circuit AND 9 is connected to the inputs of two additional circuits AND 2, 13, orye inputs of which are connected respectively to zero and the trigger output unit of the second discharge register 5; the output of the additional circuit I 1c is connected to the input of the circuit I 14 and with the single trigger input of the first register bit the output of the additional circuit I 12 is connected to the additional circuits vi 15, 16 connected to the third bit of the register with the circuit I 17 at the input and so on. d. to the additional circuit And 18, the second input of which is connected to the single output of the fourth (senior) trigger, and the output is connected to the And 19 circuit and the single input of the previous (third) discharge; the output of the comparison circuit I is connected to the inputs of the AND II, 14, 17 circuits. Thus, in the proposed device, the pulse distributor is excluded, and instead of it a group of additional circuits AND 9, 10, 12, 13, 15, 16, 18 is entered. The converter works as follows . Before the start of operation, a unit (7) in the most senior (fourth) de reg register 5 is set to unit and in the remaining bits - zero. The code obtained on register 5 is converted using a code converter into voltage 2 into a reference voltage, which is compared with the input voltage. After that, the pulse from the pulse generator 8 passes through additional circuits 9,12,15, to the second inputs of which potentials from the zero outputs of the respective triggers, and the third bit of the register is set to one and, depending on the signal from the comparison circuit, I suppress the high bit through the I 19 circuit. The next pulse from the pulse generator 8 is passes through additional circuits AND 9jI25i6 and ToDo ds installation in the unit of the lower digit of the register, after which the pulse from the pulse generator passes through the additional circuit AND 1i and depending on the signal from the comparison circuit I fed to the second input of the circuit IIJ can pass through it and set the low-order bit to zero. SUMMARY OF THE INVENTION A voltage to voltage converter comprising a comparison circuit connected to the output of the code to voltage converter, a register consisting of the flip-flops connected to. the initial setup channel, a pulse generator, a group of circuits And, one inputs of which are connected to the output of the comparison circuit, and the outputs are connected to the zero inputs of the corresponding register triggers, characterized in that, in order to reduce the equipment in it, in each bit of the register, except the senior one Two additional circuits I are entered, the first inputs of which are connected to the output of the first additional circuit AND of the previous register bit, and the second inputs respectively to the zero and single outputs of the discharge trigger, the output of one additional second AND gate with, one with the other output of AND gate discharge register and the trigger input unit adjacent the least significant bit register output dopolnptelno111skhemy other and connected to one inputs of AND circuits next additional discharge, wherein, one

the additional inputs of the low and the low bit are connected to the output of the pulse generator, and in the high bit of the de register there is one additional AND circuit, the inputs of which are connected, respectively, S. BYKHO

the house of the first additional circuit M of the previous bit and the single output of the trigger of the bit, and the output is connected to another input of the high bit of the register