SU437079A1 - Device for multiplying probability functions - Google Patents

Description

I

The invention relates to digital computing and is intended to convert the distribution functions of two input number sequences into a third, the distribution function of which is equal to the product of the distribution functions of the original sequences.

The known devices containing coincidence circuits, a collective circuit, triggers, shift registers have two shift registers, which significantly complicates them.

The purpose of the invention is to simplify the device by eliminating shift registers.

This is achieved by the fact that the outputs of the input circuits "And connected to the inputs of the intermediate circuits" PI, as well as through the circuit "OR connected to a single trigger input, zero input which is connected to the device reset layer.

The basis of the device's action is the well-known result of probability theory: if out of two input numbers with given distribution functions, more is passed to the output, then the distribution function of the output number sequence is equal to the product of the source distribution functions.

The drawing shows a functional diagram of an apparatus for multiplying probability distribution functions.

The input binary 1 of the device receives a primary binary number sequence, the input 2 of the device receives a second binary number sequence, and input 3 of the device receives a reset signal.

The device contains circuits “AND 4-9 for two inputs, circuits“ NOT 10, 11, circuits “OR, 12, 13, triggers 14, 15, output 16 of the device. The device works as follows.

Through the inputs I, 2 devices, multi-bit binary numerical sequences with given probability distribution functions are received by successive codes, starting with the high-order bits at the inputs of the circuits

"AND 4, 5 circuits" NOT 10,. X and schemes "OR 12 input numbers are bitwise compared. At the output of the "OR 12" circuit, pulses are generated at times of unequal values of the bits to be compared. The trigger 14 in the initial state was set by a reset signal on input 3 to the zero state, therefore the signal at its zero output allows the passage of pulses from the outputs of the circuits And 4 and 5 through the circuits And 7, to the inputs of the trigger 15.

Prior to the commencement of the comparison, the trigger 15 may be in any state, and while the same high-order bits are sent to the inputs 1 and 2 of the device and the signal of unequalities is not generated by the "OR 12" circuit, the values of these

identical bits through output circuits

"And, 8, 9 scheme" OR 13 arrive at the output of the device 16.

At the moment when disparity appears in the higher-order pulses from the outputs of the AND 4 and 5 circuits, the trigger 15 is set to the position at which the AND, 8 or 9, opens, and the code of the larger number arrives. Formed at this time, the signal of inequality overturns the trigger 14, which in turn prohibits the passage of pulses through the circuit "And 6, 7 to the inputs of the trigger 15.

After the completion of the comparison, the reset pulse at input 3 sets the trigger 14 to "O" and the device is ready for the next comparison cycle.

Subject invention

A device for multiplying the probability distribution functions, containing the first AND and NOT circuits, whose inputs are connected to the first input of the device, the second AND and NOT circuits, whose inputs are connected to the second input of the device, and the outputs of the first and second circuits are NOT connected with the other inputs, respectively, of the second and first circuits “And, the first and second triggers, zero and single inputs and outputs of the last of which are connected respectively to the outputs of the third, fourth, and inputs of the fifth, sixth circuits“ And, the outputs of the fifth and sixth circuits ” And through the first The OR circuit is connected to the output of the device, characterized in that, in order to simplify the device, it comprises a second OR circuit, the first input of which is connected to the first output and the fourth input of the AND circuit, the second input of the second AND circuit, is connected to the output the second and the input of the third circuit "And, and the output of the second circuit" OR is connected to the single input of the first trigger, the zero output of which is connected to the second inputs of the third and fourth circuits "And, and the second inputs of the fifth and sixth circuits" And are connected respectively to the second and the first inputs of the device.

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