SU408270A1 - DEVICE FOR OBTAINING DERIVATIVE - Google Patents

Description

one

The invention relates to automatic control and can be used to derive a derivative of a signal specified in parallel binary code in discrete automatic control systems.

A device is known for obtaining a derivative in discrete automatic control systems, which contain its master oscillator, the output of which is connected to the first input of the first rewriting unit and through the delay circuit to the first inputs of the second, third and fourth rewriting blocks. whose second input is connected to another input of the second rewriting unit, the output of which is connected via a memory register to another input of the first rewriting unit, the first output is an adder and through a trigger it is connected to the second inputs of the third and fourth rewriting blocks, the third inputs of which are connected to the corresponding outputs of the adder, and the outputs — to the corresponding inputs of the converter code — voltage.

The known device is characterized by the impossibility of differentiation of slowly varying signals, the limited amplitude range of operation of the device.

The purpose of the invention is to expand the frequency and amplitude ranges of the device.

For this, the proposed device contains an additional rewriting unit, an OR-connected circuit and an additional delay circuit, a NOT circuit and a pulse counter, one input of which is connected via a circuit to the output of the master oscillator and another input to the output of an additional delay circuit, one output of the counter the pulses are connected to another input of the circuit, its other output through an additional rewriting unit is connected to the corresponding inputs of the converter code - voltage, another input of the additional rewriting unit connected to the output circuit "OR, whose inputs are connected to respective outputs of the third and fourth rewriting blocks.

The drawing shows a block diagram of the proposed device.

The circuit contains the master oscillator 1, which operates synchronously with the clock frequency of the signal, adder 2, memory register 3. The signal under study is fed to rewriter 4 and to the input of adder 2. Generator 1 output is connected to control inputs of rewrite unit 5 and through a delay circuit 6 - with control inputs of rewriting blocks 4, 7 and 8, used to write code to memory register, from memory register to adder and to overwrite the difference discrete from adder to converter register code - voltage 9.

The zero and single outputs of the trigger 10 characters of the adder 3 are connected respectively with the enabling inputs 7 and 8. The lower bits of the blocks 7 and 8 are not connected to the converter code - voltage. The output of the generator 1 is connected, in addition, with the counting input of the pulse counter 11 through the circuit 12, and the single outputs of the triggers of the counter 11 are connected to the inputs of the circuit serving to lock the input of the counter during the overflow of the One terminal, and the zero outputs of its triggers through the rewriter block 13 for feedback code entries are associated with the single inputs of the flip-flops of the converter 9.

The control inputs of block 13 are connected to the output of the OR 14 circuit, the inputs of which are connected to the outputs of blocks 7 and 8. The output of the OR circuit is also connected to the separate inputs of the installation 11 through the delay circuit 15.

The device works as follows.

The discrete signal in the parallel binary code is fed to the inputs of the adder 2 and the gates of block 4. The master oscillator 1 opens the gates of the block 5, and the code from the register 3 enters the counting inputs of the trigger of the adder 2. At the same time, the pulse from the generator goes to the counting input of the counter II, through the circuit delays 6 opens the creeps of block 4, writing off the current value of the signal to register 3, and opens the creeps of blocks 7 and 8, depending on the state of the 0 sign trigger, writing to the register of the converter 9 the difference between the current and the previous of the input signal from adder 2. If raspost is not zero, the OR 14 circuit triggers, the signal from its output opens the gates of block 13, and the reverse code of the number from counter 11 is written to the corresponding bits of the register 9 of the converter. the delay circuit puts the triggers of counter 11 into “O.

The number in counter 11 corresponds to the number of ticks before the signal arrives. “The difference between the current and previous sampling of the signal does not equal the bullet from the OR circuit, that is, corresponds to the time nT, where n is the number of ticks.

T - interval of discreteness. Writing this number in reverse code to the register, converter 9, a voltage proportional to the rate of change of the signal is obtained at its output. Iri level} of the spine is determined by the magnitude of the difference in the discrete signal of the signal, when the level is paired back to the proporiopalep time pT.

And the invention

A device for obtaining a derivative in discrete automatic control systems, comprising a master oscillator, the output of which is connected to the first input of the first rewriting unit and through a delay circuit with the first inputs of the second, third and fourth rewriting blocks, the output of the first rewriting block is connected to the first input

an adder, the second input of which is connected to another input of the second rewriting unit, the output of which is connected to another input of the first rewriting unit through a register; and the outputs - with the corresponding inputs of the converter code - voltage, characterized in that, in order to expand the frequency and amnilitudy ranges of operation of the device, it contains rewriting unit, connected in series “OR or additional scheme

delays, a pulse counter and a pulse counter, one input of which is connected via the circuit to the output of the master oscillator, and another input to the output of an additional delay circuit; one output of the pulse counter is connected to another input of the circuit, the other output of the pulse counter is connected to the corresponding inputs of the converter the code is nanotec, another input of the additional rewriting unit is connected to the output of the OR circuit, whose inputs are connected to the corresponding outputs of the third and fourth rewriting blocks.

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