SU365702A1 - ALL-UNION [iirti till. Cl. G 06f 5 / 02УДК 681.332.65 (088.8) Authors - Google Patents

Description

The invention relates to the field of automation and computational techniques.

The known converters of binary code to Gre code are constructed using active elements, therefore their disadvantage is a large power consumption.

The aim of the invention is to create a simple and economical in terms of power consumed by the MO TsNOST converter.

The essence of the invention is that two output windings for the next transfluxor are introduced into the transducer on transfluxors, the first output winding of the discharge fluxor at one end is connected and in series with the second output winding of the previous fluxor, a. .the other end is connected to the anode of the diode, the cathode of which is connected to the output bus of this bit L1 to one plate of a capacitor, the other plate of which and the other end of the second output of the 1st winding are connected to a common w Noah.

The drawing shows a converter circuit for three bits.

The proposed converter includes soder / kit transfluxors 1–4, diodes 5–7, capacitors 8–10, first output, windings 11–13, read windings 14–17, input windings 18–20 for writing numbers in binary code.

I

the second output 1s winding 21-23, the reset winding (records "O) 24-27, the reset connection bus 28, the connection bus 29 of the reference signal, common spindle-30, the outputs 31-33 bits in the GRE code.

The number to convert to. The code is entered into a register that is written on two hole transfl oxors.

Each of the transfluxors 1-3 has a setting winding, 18-20 matches 1O for understudy in the binary code.

Everything about 24–27 of the installation in “About,” passing through the large openings of transfluxors, sequentially and with, 215. The feed to 28 of the negative impulse is used to set in "About all bits of the register.

The read windings 14–17 of all transfluxors and the successor of the i key are 1 to 29. The feed into the windings) C 1T 1 of 1 1 pulses, the readout signal is transformed into the output windings 11–13 and 21–23 of unlocked traces of cables.

The setting in "1 (unlocking trasfluxors) is done individually, depending on the code entered in the register number, but obtomotkam 18-20.

Output scans 2J, 11 traisfluxors 1, 2, winding 22, 12 transfluxors 2, 3,

windings 23, 13, transfluxors 3, 4 are connected in pairs and counter and through diodes 5-7 are connected respectively to the storage capacitors 8-10.

If the transfluxors for each pair of adjacent bits are in the same condition, then when the read signal is applied, the voltage on the storage capacitor will not be in this bit, since due to the opposite turn-on of the output windings of the transluxors, equal output signals are subtracted.

If the transfluxors for each pair of adjacent bits are in different states, then when the read signal is applied in this p; There is a charge of storage capacitor from the output winding of the unlocked transfluxor.

The charge time of a capacitor with selected elements of the circuit is determined by the power of the read pulses and their frequency. The capacitor is charged up to the amplitude value of the output winding pulses and when the read signal is continuously applied, a permanent negative potential is accumulated on the packet capacitor, which is fed to the output of the device. The set of potentials at the outputs 31-33 is the physical implementation of the Gre code.

Due to the absence of active elements in the circuit, it does not require power supply of THEIR voltage for its operation. The presence of packet capacitors in the circuit allows for a potential output.

Prediction et; s about b with with and.

A binary code converter into the Gre code containing transfluxors with reset windings, counters, input and output windings, diodes and capacitors, characterized in that, in order to reduce the consumption of my own, two output windings for each transluxor are introduced into it, and the output winding is first of the transfluxor of this bit with one end connected in series with the second winding of the transfluxor of the previous bit, and with the other end connected to the anode of the diode, the cathode of which is connected to the output bus e of the discharge and to one plate of the capacitor, and the other plate of which the other end of the second output winding coupled to the obi; s shshyuy.

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