SU1753603A2 - Device for supervisory control of repeater stations of communication system - Google Patents

Abstract

The invention relates to telecommunications. The purpose of the invention is to increase the bandwidth of the telecontrol. The device contains at the transmitting and each intermediate stations the registers of the shift, the sync signal, the stop signal, the address, the data, the generator of clock pulses, and the driver of the strobe signal. In addition, at each intermediate station there are a receiving register, a buffer register, a second clock generator, two estimators, a trigger, and AND NOT delay elements. At the receiving station, the device contains a synchro and stop signal decoder, a trigger, a data register, and a clock generator. The device provides the ability to allocate a free period of time for the transmission of additional information. 1 il.

Description

The invention relates to telecommunications, can be used for telecontrol of communication lines with intermediate stations installed on it and is an improvement of the invention according to the author. St. No. 1674385.

A device comprising an alarm signal detector, a sync signal decoder, an address generator, clock generators, a receiving shift register, an address register, stop and start signal registers, a gate signal generator, a trigger, blocks for selecting a sync signal and a stop signal, elements of HE is known for each intermediate station. , element And and the counter, at the transmitting station - transmitting the shift register, the stop and clock signal registers, the address register, the counter, the clock pulse generator, the zade ratio, the gate signal generator, an AND, signal detector alarm at the receiving station - unit and the isolation of the stop clock signal, a trigger generator, a buffer register, a memory block.

The purpose of the invention is to increase the bandwidth of the telecontrol.

The goal is achieved by the fact that a switch is connected to the device at each intermediate station, connected between the output of the second brake light register and the input of the shift register, and a serially connected divider, a second counter and a decoder, the outputs of which are connected to the control inputs of the switch, and the input divider connected to the output of the clock generator, and the trigger output is connected to the set inputs of the second counter and the receiving shift register.

The drawing shows a structural electrical circuit of the proposed device,

The device for telecontrol of the intermediate stations of the communication system contains a transmitting station 1: a synchronization register 2, a data register 3, a stop-signal register 4

delay, delay line 5, address register 6, element 17, generator 8 clock pulses, alarm signal detector 9, address generator 10, counter 11, gate signal generator 12, shift register 13, at each intermediate station 14 15, delay line 16, first clock generator 17, clock decoder 18, stop signal decoder 19, trigger 20, shift register 21, address register 22, address driver 23, gate signal generator 24, second generator

25-cycle pulses receiving register

26 shift, buffer register 27, data register 28, first stop signal register 29, stop signal generator 30, second stop signal register 31, HE element 32, alarm signal detector 33, clock register 34, counter 35, at receiving station 36 - receive shift register 37, data register 38, clock generator 39, trigger 40, sync decoder 41, stop signal decoder 42. The intermediate station also includes a motor 43, a counter 44, a decoder 45, and a switch 46.

The device works as follows.

Registers 2–4 of transmitting station 1 and all intermediate stations 14 permanently record the clock signal code, and in registers 6 and 22 the address code generated (for example, typed and recorded manually using switching elements of switches) by driver 10,

The registers 38, 3 and 28 of the data contain information received from the detectors 9 and 33 of the alarm signals.

In driver 30, a stop signal code is recorded, which at transmitter station 1 is written into register 4, at intermediate station 14 into registers 29 or 31.

Information is transmitted from transmitting station 1 as follows.

From the output of the first generator 8, the clock pulses are fed to the input of the counter 11 with the coefficient of recalculation of the MV of clock cycles

МЗ П + (m + k) N + I, where N is the total number of stations.

With the arrival of the MV clock, at the output of counter 11, an impulse appears, which, entering the input of the record of the shift register 13, permits the recording of information from its information inputs. At the same time, the following signal is recorded: a sync signal into bits D0 - Dn; addresses — in bits Dn + i - Da, where a n + rn; data state - in bits Da + i - Oh, where

b p + m + k; stop signal - in bits O-i - - DC, where c n + m + k + l.

After the time At required to record information in the shift register 13, a high potential impulse arrives from the output of the delay line 5 to the input of the gate signal generator 12, allowing the formation of a high potential gate signal with duration T1. This duration is determined by the amount of information transmitted by the device in terminal station mode, and is

T1 n + (m + k) +,

5 From the output of the imaging unit 12, a pulse of duration T1 arrives at the second input of the element I 7, thereby allowing the passage of the clock pulses to the clock input of the register 13, thus ensuring the advancement of the digital information signal into the communication line.

Through M1 clocks at the output of the formation / body 12, the potential is low and the reading of information into the line stops.

5After counting by the counter 11 of the new number of MVs of x clock cycles, updated data will be recorded in register 13 and the transmission will be repeated.

The intermediate station operates as follows.

When the output of the communication line (input of a device installed at an intermediate station) appears on the digital information signal during

5, a clock signal is extracted from the state of the driver 12 and the counter 11 by the decoder 18, and a start signal of the second generator of 25-stroke pulses is generated, from the output of which the clock pulses arrive at

0 the second clock input of the receive shift register 26, which ensures that the input of digital information with a duration W of clock cycles W is (m + k) Li, which

5 where LI is the number of previous stations transmitting information.

After passing each (m + k) pulses, a signal will appear at the output of divider 43, which flips counter 44 to the next state. Thus, the counter 44 will count the number of information words, i.e. the number of stations U from which information is received.

8 according to the output signals

5, the counter 44 (code of the number of stations) will generate a signal at one of the outputs of the decoder 45. This signal in the switch 46 will ensure that the register 31 is connected to the corresponding inputs of the register 21 so that the stop signal from the register 31 is recorded immediately after the packet of information from this and previous stations. Setting the counter 44 to the initial state is accomplished by a negative signal drop from the output of the trigger 20.

The stop signal selected by the decoder 19 transfers the flip-flop 20 to a single state and a high potential appears at its output, which, arriving at the first input of the buffer register 27, where a deflection can be additionally installed, permits the recording of information arriving at its second inputs from the outputs of the receiving register 26. The same signal sets the first register 29 to the zero state and, having passed through the element NO 32, prohibits the recording of information into it, and entering the first input of the second register 31, allows recording information into it Forming 30 stop lights. At the same time, the second clock pulse generator 25 is stopped.

At the same time, a high potential from the output of the trigger 20 goes to the fourth input of the imaging unit 24, which, in accordance with this signal and the station address, coming from the imaging unit 23. will ensure the formation of a Ti.A signal at its output.

Ti n + (m + k) L + I g M g.

The recording signal coming from the output of the counter 35 to the input of the recording of the register 21 provides for recording information from its information inputs into it. In this case, the recording is made of: a sync signal — into the Do — Dn bits; addresses - in bits O---- - Da, where a n + m; these states are in bits Da-M - Ob, where b n + m + k; addresses and data from previous stations - to bits Ob + 1 - Dd, where d n + rn + k + + m + k + (m + k) (U-1); stop signals in bits Dd + 1 - Dg, where g n + + m + k + W + I n + (m + k) Li + I.

After the time At required to record information into the register 21, from the output of the delay line 16, the third input of the imaging unit 24 will receive a high potential pulse allowing the formation of a high potential gate signal of duration T1.

From the output of the gate signal generator 24, a high potential arrives at the second input of the element 15, thereby allowing the passage of the M1 clock pulses from the output of the first generator 17 to the clock input of the register 21, thus ensuring the advancement of the digital information signal to the input of the communication line.

Through the Mi clocks at the output of the gate signal generator 24, a low potential prohibits the transmission of information to the communication line.

With this high potential impulse

from the output of the delay line 16 enters the first input of the trigger 20 and throws it to the zero state. At the output of the trigger 20, a low potential appears and the entire device is reset.

If in the process of the reception or

transmitting stations will fail (or

communication line is broken, then the one closest to

there will be no intermediate station 14

5 accept digital sequence. After writing to register 21 and transmitting data on the status of previous stations received last time before the accident, the trigger 20 will remain in the zero state,

0 A low potential from the output of the trigger 20 prohibits the recording of information in the register 31 and the buffer registers 27. At the same time, this element NOT 32 forms a signal to set the buffer register 27 and

5, the first register 31 is in the zero state and allows the recording of the stop signal to the second register 29.

Therefore, a low potential will be present at the third input of the imaging unit 24, and when a signal arrives at its output from the delay line 16, a strobe signal of duration T1 will be formed.

T1 n + (m + k) + I, i.e. as at transmitting station 1.

5 Intermediate station 14 will begin to transmit data only on the status of its funds and in essence will work as a terminal.

Reception at receiving station 36 is as follows,

When receiving the stop signal by the decoder 41, the trigger 40 is activated and starts the generator 39, the clock pulses from the output of which provide reception of the signal to

5 lines and its entry into the receiving register 37. After receiving the stop signal by the decoder 42, the generator 39 stops and the data from the receiving register 37 is written to the data register 38.

0C, the output of the information register 38 can be transmitted to a display device or a device for further processing of information.

At the transmitting station 1 signals with

5 detector 9 through the register 3 is fed to the sixth input of the register 13 of the shift. The register generates a phto-signal and, via register 13, transmits it to the communication line. The generator 8 controls the operation of the register 3, the elements 7 and the counter 11. The signal from the output of the imaging unit 10 through the register 6 is fed to the second input of the register 13,

At the intermediate station 14, the clock signal is recorded in the register 34 and is fed to the sixth input of the register 21. The signal from the output of the forming unit 23 is fed to the input of the forming device 24 and through the register 32 to the second input of the register 21, to the clock input of which the signal comes from the output of the element 15.

The main purpose of the receive register 26 is to ensure that the received information is recorded so that the register is filled from the initial bits. It is necessary that in case of incomplete filling of register 26 and rewriting information from it into register 27 and 21, the empty bits would remain at the end of register 21.

Claims (1)

The invention The device for telecontrol of intermediate stations of the communication system according to the author. St. No. 1674385, characterized in that, with in order to increase the bandwidth of the telecontrol channel, at each intermediate station the output of the second stop signal register is connected to the fifth input of the shift register through the input switch, the additional outputs of which are connected to the additional inputs of the shift register, the output of the second clock generator is connected to the control inputs of the switch via serially connected divisor, additional counter and decoder number, and the trigger output is connected to the installation inputs of the additional counter and receiving shift register.